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-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c2
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h14
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c6
-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
-rw-r--r--drivers/gpu/drm/i915/intel_uncore.c4
5 files changed, 21 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 165a38f36009..479e0c119111 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2347,7 +2347,7 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
2347 case POWER_DOMAIN_INIT: 2347 case POWER_DOMAIN_INIT:
2348 return "INIT"; 2348 return "INIT";
2349 default: 2349 default:
2350 WARN_ON(1); 2350 MISSING_CASE(domain);
2351 return "?"; 2351 return "?";
2352 } 2352 }
2353} 2353}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c74dc946cbf6..5f4cca3ef01c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -58,7 +58,19 @@
58#define DRIVER_DATE "20141205" 58#define DRIVER_DATE "20141205"
59 59
60#undef WARN_ON 60#undef WARN_ON
61#define WARN_ON(x) WARN(x, "WARN_ON(" #x ")") 61/* Many gcc seem to no see through this and fall over :( */
62#if 0
63#define WARN_ON(x) ({ \
64 bool __i915_warn_cond = (x); \
65 if (__builtin_constant_p(__i915_warn_cond)) \
66 BUILD_BUG_ON(__i915_warn_cond); \
67 WARN(__i915_warn_cond, "WARN_ON(" #x ")"); })
68#else
69#define WARN_ON(x) WARN((x), "WARN_ON(" #x ")")
70#endif
71
72#define MISSING_CASE(x) WARN(1, "Missing switch case (%lu) in %s\n", \
73 (long) (x), __func__);
62 74
63enum pipe { 75enum pipe {
64 INVALID_PIPE = -1, 76 INVALID_PIPE = -1,
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ac03a382000b..ce4e46c443a1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -132,7 +132,7 @@ static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
132 pte |= GEN6_PTE_UNCACHED; 132 pte |= GEN6_PTE_UNCACHED;
133 break; 133 break;
134 default: 134 default:
135 WARN_ON(1); 135 MISSING_CASE(level);
136 } 136 }
137 137
138 return pte; 138 return pte;
@@ -156,7 +156,7 @@ static gen6_gtt_pte_t ivb_pte_encode(dma_addr_t addr,
156 pte |= GEN6_PTE_UNCACHED; 156 pte |= GEN6_PTE_UNCACHED;
157 break; 157 break;
158 default: 158 default:
159 WARN_ON(1); 159 MISSING_CASE(level);
160 } 160 }
161 161
162 return pte; 162 return pte;
@@ -1146,7 +1146,7 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
1146 else if (INTEL_INFO(dev)->gen >= 8) 1146 else if (INTEL_INFO(dev)->gen >= 8)
1147 gen8_ppgtt_enable(dev); 1147 gen8_ppgtt_enable(dev);
1148 else 1148 else
1149 WARN_ON(1); 1149 MISSING_CASE(INTEL_INFO(dev)->gen);
1150 1150
1151 if (ppgtt) { 1151 if (ppgtt) {
1152 for_each_ring(ring, dev_priv, i) { 1152 for_each_ring(ring, dev_priv, i) {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 841af6c1f50b..878c4857ff49 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4847,7 +4847,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk)
4847 cmd = 0; 4847 cmd = 0;
4848 break; 4848 break;
4849 default: 4849 default:
4850 WARN_ON(1); 4850 MISSING_CASE(cdclk);
4851 return; 4851 return;
4852 } 4852 }
4853 4853
@@ -8224,7 +8224,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
8224 cntl |= CURSOR_MODE_256_ARGB_AX; 8224 cntl |= CURSOR_MODE_256_ARGB_AX;
8225 break; 8225 break;
8226 default: 8226 default:
8227 WARN_ON(1); 8227 MISSING_CASE(intel_crtc->cursor_width);
8228 return; 8228 return;
8229 } 8229 }
8230 cntl |= pipe << 28; /* Connect to correct pipe */ 8230 cntl |= pipe << 28; /* Connect to correct pipe */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 46de8d75b4bf..883d2febb705 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1202,7 +1202,7 @@ void intel_uncore_init(struct drm_device *dev)
1202 1202
1203 switch (INTEL_INFO(dev)->gen) { 1203 switch (INTEL_INFO(dev)->gen) {
1204 default: 1204 default:
1205 WARN_ON(1); 1205 MISSING_CASE(INTEL_INFO(dev)->gen);
1206 return; 1206 return;
1207 case 9: 1207 case 9:
1208 ASSIGN_WRITE_MMIO_VFUNCS(gen9); 1208 ASSIGN_WRITE_MMIO_VFUNCS(gen9);
@@ -1300,7 +1300,7 @@ int i915_reg_read_ioctl(struct drm_device *dev,
1300 reg->val = I915_READ8(reg->offset); 1300 reg->val = I915_READ8(reg->offset);
1301 break; 1301 break;
1302 default: 1302 default:
1303 WARN_ON(1); 1303 MISSING_CASE(entry->size);
1304 ret = -EINVAL; 1304 ret = -EINVAL;
1305 goto out; 1305 goto out;
1306 } 1306 }