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-rw-r--r--Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt95
-rw-r--r--drivers/pinctrl/Kconfig4
-rw-r--r--drivers/pinctrl/Makefile1
-rw-r--r--drivers/pinctrl/pinctrl-armada-370.c421
4 files changed, 521 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
new file mode 100644
index 000000000000..01ef408e205f
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
@@ -0,0 +1,95 @@
1* Marvell Armada 370 SoC pinctrl driver for mpp
2
3Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
4part and usage.
5
6Required properties:
7- compatible: "marvell,88f6710-pinctrl"
8
9Available mpp pins/groups and functions:
10Note: brackets (x) are not part of the mpp name for marvell,function and given
11only for more detailed description in this document.
12
13name pins functions
14================================================================================
15mpp0 0 gpio, uart0(rxd)
16mpp1 1 gpo, uart0(txd)
17mpp2 2 gpio, i2c0(sck), uart0(txd)
18mpp3 3 gpio, i2c0(sda), uart0(rxd)
19mpp4 4 gpio, cpu_pd(vdd)
20mpp5 5 gpo, ge0(txclko), uart1(txd), spi1(clk), audio(mclk)
21mpp6 6 gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)
22mpp7 7 gpo, ge0(txd1), tdm(tdx), audio(lrclk)
23mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
24mpp9 9 gpo, ge0(txd3), uart1(txd), sd0(clk), audio(spdifo)
25mpp10 10 gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)
26mpp11 11 gpio, ge0(rxd0), uart1(rxd), sd0(cmd), spi0(cs1),
27 sata1(prsnt), spi1(cs1)
28mpp12 12 gpio, ge0(rxd1), i2c1(sda), sd0(d0), spi1(cs0),
29 audio(spdifi)
30mpp13 13 gpio, ge0(rxd2), i2c1(sck), sd0(d1), tdm(pclk),
31 audio(rmclk)
32mpp14 14 gpio, ge0(rxd3), pcie(clkreq0), sd0(d2), spi1(mosi),
33 spi0(cs2)
34mpp15 15 gpio, ge0(rxctl), pcie(clkreq1), sd0(d3), spi1(miso),
35 spi0(cs3)
36mpp16 16 gpio, ge0(rxclk), uart1(rxd), tdm(int), audio(extclk)
37mpp17 17 gpo, ge(mdc)
38mpp18 18 gpio, ge(mdio)
39mpp19 19 gpio, ge0(txclk), ge1(txclkout), tdm(pclk)
40mpp20 20 gpo, ge0(txd4), ge1(txd0)
41mpp21 21 gpo, ge0(txd5), ge1(txd1), uart1(txd)
42mpp22 22 gpo, ge0(txd6), ge1(txd2), uart0(rts)
43mpp23 23 gpo, ge0(txd7), ge1(txd3), spi1(mosi)
44mpp24 24 gpio, ge0(col), ge1(txctl), spi1(cs0)
45mpp25 25 gpio, ge0(rxerr), ge1(rxd0), uart1(rxd)
46mpp26 26 gpio, ge0(crs), ge1(rxd1), spi1(miso)
47mpp27 27 gpio, ge0(rxd4), ge1(rxd2), uart0(cts)
48mpp28 28 gpio, ge0(rxd5), ge1(rxd3)
49mpp29 29 gpio, ge0(rxd6), ge1(rxctl), i2c1(sda)
50mpp30 30 gpio, ge0(rxd7), ge1(rxclk), i2c1(sck)
51mpp31 31 gpio, tclk, ge0(txerr)
52mpp32 32 gpio, spi0(cs0)
53mpp33 33 gpio, dev(bootcs), spi0(cs0)
54mpp34 34 gpo, dev(wen0), spi0(mosi)
55mpp35 35 gpo, dev(oen), spi0(sck)
56mpp36 36 gpo, dev(a1), spi0(miso)
57mpp37 37 gpo, dev(a0), sata0(prsnt)
58mpp38 38 gpio, dev(ready), uart1(cts), uart0(cts)
59mpp39 39 gpo, dev(ad0), audio(spdifo)
60mpp40 40 gpio, dev(ad1), uart1(rts), uart0(rts)
61mpp41 41 gpio, dev(ad2), uart1(rxd)
62mpp42 42 gpo, dev(ad3), uart1(txd)
63mpp43 43 gpo, dev(ad4), audio(bclk)
64mpp44 44 gpo, dev(ad5), audio(mclk)
65mpp45 45 gpo, dev(ad6), audio(lrclk)
66mpp46 46 gpo, dev(ad7), audio(sdo)
67mpp47 47 gpo, dev(ad8), sd0(clk), audio(spdifo)
68mpp48 48 gpio, dev(ad9), uart0(rts), sd0(cmd), sata1(prsnt),
69 spi0(cs1)
70mpp49 49 gpio, dev(ad10), pcie(clkreq1), sd0(d0), spi1(cs0),
71 audio(spdifi)
72mpp50 50 gpio, dev(ad11), uart0(cts), sd0(d1), spi1(miso),
73 audio(rmclk)
74mpp51 51 gpio, dev(ad12), i2c1(sda), sd0(d2), spi1(mosi)
75mpp52 52 gpio, dev(ad13), i2c1(sck), sd0(d3), spi1(sck)
76mpp53 53 gpio, dev(ad14), sd0(clk), tdm(pclk), spi0(cs2),
77 pcie(clkreq1)
78mpp54 54 gpo, dev(ad15), tdm(dtx)
79mpp55 55 gpio, dev(cs1), uart1(txd), tdm(rst), sata1(prsnt),
80 sata0(prsnt)
81mpp56 56 gpio, dev(cs2), uart1(cts), uart0(cts), spi0(cs3),
82 pcie(clkreq0), spi1(cs1)
83mpp57 57 gpio, dev(cs3), uart1(rxd), tdm(fsync), sata0(prsnt),
84 audio(sdo)
85mpp58 58 gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk),
86 uart0(rts)
87mpp59 59 gpo, dev(ale0), uart1(rts), uart0(rts), audio(bclk)
88mpp60 60 gpio, dev(ale1), uart1(rxd), sata0(prsnt), pcie(rst-out),
89 audio(sdi)
90mpp61 61 gpo, dev(wen1), uart1(txd), audio(rclk)
91mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),
92 audio(mclk), uart0(cts)
93mpp63 63 gpo, spi0(sck), tclk
94mpp64 64 gpio, spi0(miso), spi0-1(cs1)
95mpp65 65 gpio, spi0(mosi), spi0-1(cs2)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 31c0bbaaf373..e16b8b00d65e 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -159,6 +159,10 @@ config PINCTRL_KIRKWOOD
159 bool 159 bool
160 select PINCTRL_MVEBU 160 select PINCTRL_MVEBU
161 161
162config PINCTRL_ARMADA_370
163 bool
164 select PINCTRL_MVEBU
165
162source "drivers/pinctrl/spear/Kconfig" 166source "drivers/pinctrl/spear/Kconfig"
163 167
164endmenu 168endmenu
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 300629465203..e6d666787d6c 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -32,5 +32,6 @@ obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
32obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o 32obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o
33obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o 33obj-$(CONFIG_PINCTRL_DOVE) += pinctrl-dove.o
34obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o 34obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
35obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
35 36
36obj-$(CONFIG_PLAT_SPEAR) += spear/ 37obj-$(CONFIG_PLAT_SPEAR) += spear/
diff --git a/drivers/pinctrl/pinctrl-armada-370.c b/drivers/pinctrl/pinctrl-armada-370.c
new file mode 100644
index 000000000000..c907647de6ad
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-armada-370.c
@@ -0,0 +1,421 @@
1/*
2 * Marvell Armada 370 pinctrl driver based on mvebu pinctrl core
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/err.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/clk.h>
20#include <linux/of.h>
21#include <linux/of_device.h>
22#include <linux/pinctrl/pinctrl.h>
23
24#include "pinctrl-mvebu.h"
25
26static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
27 MPP_MODE(0,
28 MPP_FUNCTION(0x0, "gpio", NULL),
29 MPP_FUNCTION(0x1, "uart0", "rxd")),
30 MPP_MODE(1,
31 MPP_FUNCTION(0x0, "gpo", NULL),
32 MPP_FUNCTION(0x1, "uart0", "txd")),
33 MPP_MODE(2,
34 MPP_FUNCTION(0x0, "gpio", NULL),
35 MPP_FUNCTION(0x1, "i2c0", "sck"),
36 MPP_FUNCTION(0x2, "uart0", "txd")),
37 MPP_MODE(3,
38 MPP_FUNCTION(0x0, "gpio", NULL),
39 MPP_FUNCTION(0x1, "i2c0", "sda"),
40 MPP_FUNCTION(0x2, "uart0", "rxd")),
41 MPP_MODE(4,
42 MPP_FUNCTION(0x0, "gpio", NULL),
43 MPP_FUNCTION(0x1, "cpu_pd", "vdd")),
44 MPP_MODE(5,
45 MPP_FUNCTION(0x0, "gpo", NULL),
46 MPP_FUNCTION(0x1, "ge0", "txclko"),
47 MPP_FUNCTION(0x2, "uart1", "txd"),
48 MPP_FUNCTION(0x4, "spi1", "clk"),
49 MPP_FUNCTION(0x5, "audio", "mclk")),
50 MPP_MODE(6,
51 MPP_FUNCTION(0x0, "gpio", NULL),
52 MPP_FUNCTION(0x1, "ge0", "txd0"),
53 MPP_FUNCTION(0x2, "sata0", "prsnt"),
54 MPP_FUNCTION(0x4, "tdm", "rst"),
55 MPP_FUNCTION(0x5, "audio", "sdo")),
56 MPP_MODE(7,
57 MPP_FUNCTION(0x0, "gpo", NULL),
58 MPP_FUNCTION(0x1, "ge0", "txd1"),
59 MPP_FUNCTION(0x4, "tdm", "tdx"),
60 MPP_FUNCTION(0x5, "audio", "lrclk")),
61 MPP_MODE(8,
62 MPP_FUNCTION(0x0, "gpio", NULL),
63 MPP_FUNCTION(0x1, "ge0", "txd2"),
64 MPP_FUNCTION(0x2, "uart0", "rts"),
65 MPP_FUNCTION(0x4, "tdm", "drx"),
66 MPP_FUNCTION(0x5, "audio", "bclk")),
67 MPP_MODE(9,
68 MPP_FUNCTION(0x0, "gpo", NULL),
69 MPP_FUNCTION(0x1, "ge0", "txd3"),
70 MPP_FUNCTION(0x2, "uart1", "txd"),
71 MPP_FUNCTION(0x3, "sd0", "clk"),
72 MPP_FUNCTION(0x5, "audio", "spdifo")),
73 MPP_MODE(10,
74 MPP_FUNCTION(0x0, "gpio", NULL),
75 MPP_FUNCTION(0x1, "ge0", "txctl"),
76 MPP_FUNCTION(0x2, "uart0", "cts"),
77 MPP_FUNCTION(0x4, "tdm", "fsync"),
78 MPP_FUNCTION(0x5, "audio", "sdi")),
79 MPP_MODE(11,
80 MPP_FUNCTION(0x0, "gpio", NULL),
81 MPP_FUNCTION(0x1, "ge0", "rxd0"),
82 MPP_FUNCTION(0x2, "uart1", "rxd"),
83 MPP_FUNCTION(0x3, "sd0", "cmd"),
84 MPP_FUNCTION(0x4, "spi0", "cs1"),
85 MPP_FUNCTION(0x5, "sata1", "prsnt"),
86 MPP_FUNCTION(0x6, "spi1", "cs1")),
87 MPP_MODE(12,
88 MPP_FUNCTION(0x0, "gpio", NULL),
89 MPP_FUNCTION(0x1, "ge0", "rxd1"),
90 MPP_FUNCTION(0x2, "i2c1", "sda"),
91 MPP_FUNCTION(0x3, "sd0", "d0"),
92 MPP_FUNCTION(0x4, "spi1", "cs0"),
93 MPP_FUNCTION(0x5, "audio", "spdifi")),
94 MPP_MODE(13,
95 MPP_FUNCTION(0x0, "gpio", NULL),
96 MPP_FUNCTION(0x1, "ge0", "rxd2"),
97 MPP_FUNCTION(0x2, "i2c1", "sck"),
98 MPP_FUNCTION(0x3, "sd0", "d1"),
99 MPP_FUNCTION(0x4, "tdm", "pclk"),
100 MPP_FUNCTION(0x5, "audio", "rmclk")),
101 MPP_MODE(14,
102 MPP_FUNCTION(0x0, "gpio", NULL),
103 MPP_FUNCTION(0x1, "ge0", "rxd3"),
104 MPP_FUNCTION(0x2, "pcie", "clkreq0"),
105 MPP_FUNCTION(0x3, "sd0", "d2"),
106 MPP_FUNCTION(0x4, "spi1", "mosi"),
107 MPP_FUNCTION(0x5, "spi0", "cs2")),
108 MPP_MODE(15,
109 MPP_FUNCTION(0x0, "gpio", NULL),
110 MPP_FUNCTION(0x1, "ge0", "rxctl"),
111 MPP_FUNCTION(0x2, "pcie", "clkreq1"),
112 MPP_FUNCTION(0x3, "sd0", "d3"),
113 MPP_FUNCTION(0x4, "spi1", "miso"),
114 MPP_FUNCTION(0x5, "spi0", "cs3")),
115 MPP_MODE(16,
116 MPP_FUNCTION(0x0, "gpio", NULL),
117 MPP_FUNCTION(0x1, "ge0", "rxclk"),
118 MPP_FUNCTION(0x2, "uart1", "rxd"),
119 MPP_FUNCTION(0x4, "tdm", "int"),
120 MPP_FUNCTION(0x5, "audio", "extclk")),
121 MPP_MODE(17,
122 MPP_FUNCTION(0x0, "gpo", NULL),
123 MPP_FUNCTION(0x1, "ge", "mdc")),
124 MPP_MODE(18,
125 MPP_FUNCTION(0x0, "gpio", NULL),
126 MPP_FUNCTION(0x1, "ge", "mdio")),
127 MPP_MODE(19,
128 MPP_FUNCTION(0x0, "gpio", NULL),
129 MPP_FUNCTION(0x1, "ge0", "txclk"),
130 MPP_FUNCTION(0x2, "ge1", "txclkout"),
131 MPP_FUNCTION(0x4, "tdm", "pclk")),
132 MPP_MODE(20,
133 MPP_FUNCTION(0x0, "gpo", NULL),
134 MPP_FUNCTION(0x1, "ge0", "txd4"),
135 MPP_FUNCTION(0x2, "ge1", "txd0")),
136 MPP_MODE(21,
137 MPP_FUNCTION(0x0, "gpo", NULL),
138 MPP_FUNCTION(0x1, "ge0", "txd5"),
139 MPP_FUNCTION(0x2, "ge1", "txd1"),
140 MPP_FUNCTION(0x4, "uart1", "txd")),
141 MPP_MODE(22,
142 MPP_FUNCTION(0x0, "gpo", NULL),
143 MPP_FUNCTION(0x1, "ge0", "txd6"),
144 MPP_FUNCTION(0x2, "ge1", "txd2"),
145 MPP_FUNCTION(0x4, "uart0", "rts")),
146 MPP_MODE(23,
147 MPP_FUNCTION(0x0, "gpo", NULL),
148 MPP_FUNCTION(0x1, "ge0", "txd7"),
149 MPP_FUNCTION(0x2, "ge1", "txd3"),
150 MPP_FUNCTION(0x4, "spi1", "mosi")),
151 MPP_MODE(24,
152 MPP_FUNCTION(0x0, "gpio", NULL),
153 MPP_FUNCTION(0x1, "ge0", "col"),
154 MPP_FUNCTION(0x2, "ge1", "txctl"),
155 MPP_FUNCTION(0x4, "spi1", "cs0")),
156 MPP_MODE(25,
157 MPP_FUNCTION(0x0, "gpio", NULL),
158 MPP_FUNCTION(0x1, "ge0", "rxerr"),
159 MPP_FUNCTION(0x2, "ge1", "rxd0"),
160 MPP_FUNCTION(0x4, "uart1", "rxd")),
161 MPP_MODE(26,
162 MPP_FUNCTION(0x0, "gpio", NULL),
163 MPP_FUNCTION(0x1, "ge0", "crs"),
164 MPP_FUNCTION(0x2, "ge1", "rxd1"),
165 MPP_FUNCTION(0x4, "spi1", "miso")),
166 MPP_MODE(27,
167 MPP_FUNCTION(0x0, "gpio", NULL),
168 MPP_FUNCTION(0x1, "ge0", "rxd4"),
169 MPP_FUNCTION(0x2, "ge1", "rxd2"),
170 MPP_FUNCTION(0x4, "uart0", "cts")),
171 MPP_MODE(28,
172 MPP_FUNCTION(0x0, "gpio", NULL),
173 MPP_FUNCTION(0x1, "ge0", "rxd5"),
174 MPP_FUNCTION(0x2, "ge1", "rxd3")),
175 MPP_MODE(29,
176 MPP_FUNCTION(0x0, "gpio", NULL),
177 MPP_FUNCTION(0x1, "ge0", "rxd6"),
178 MPP_FUNCTION(0x2, "ge1", "rxctl"),
179 MPP_FUNCTION(0x4, "i2c1", "sda")),
180 MPP_MODE(30,
181 MPP_FUNCTION(0x0, "gpio", NULL),
182 MPP_FUNCTION(0x1, "ge0", "rxd7"),
183 MPP_FUNCTION(0x2, "ge1", "rxclk"),
184 MPP_FUNCTION(0x4, "i2c1", "sck")),
185 MPP_MODE(31,
186 MPP_FUNCTION(0x0, "gpio", NULL),
187 MPP_FUNCTION(0x3, "tclk", NULL),
188 MPP_FUNCTION(0x4, "ge0", "txerr")),
189 MPP_MODE(32,
190 MPP_FUNCTION(0x0, "gpio", NULL),
191 MPP_FUNCTION(0x1, "spi0", "cs0")),
192 MPP_MODE(33,
193 MPP_FUNCTION(0x0, "gpio", NULL),
194 MPP_FUNCTION(0x1, "dev", "bootcs"),
195 MPP_FUNCTION(0x2, "spi0", "cs0")),
196 MPP_MODE(34,
197 MPP_FUNCTION(0x0, "gpo", NULL),
198 MPP_FUNCTION(0x1, "dev", "wen0"),
199 MPP_FUNCTION(0x2, "spi0", "mosi")),
200 MPP_MODE(35,
201 MPP_FUNCTION(0x0, "gpo", NULL),
202 MPP_FUNCTION(0x1, "dev", "oen"),
203 MPP_FUNCTION(0x2, "spi0", "sck")),
204 MPP_MODE(36,
205 MPP_FUNCTION(0x0, "gpo", NULL),
206 MPP_FUNCTION(0x1, "dev", "a1"),
207 MPP_FUNCTION(0x2, "spi0", "miso")),
208 MPP_MODE(37,
209 MPP_FUNCTION(0x0, "gpo", NULL),
210 MPP_FUNCTION(0x1, "dev", "a0"),
211 MPP_FUNCTION(0x2, "sata0", "prsnt")),
212 MPP_MODE(38,
213 MPP_FUNCTION(0x0, "gpio", NULL),
214 MPP_FUNCTION(0x1, "dev", "ready"),
215 MPP_FUNCTION(0x2, "uart1", "cts"),
216 MPP_FUNCTION(0x3, "uart0", "cts")),
217 MPP_MODE(39,
218 MPP_FUNCTION(0x0, "gpo", NULL),
219 MPP_FUNCTION(0x1, "dev", "ad0"),
220 MPP_FUNCTION(0x2, "audio", "spdifo")),
221 MPP_MODE(40,
222 MPP_FUNCTION(0x0, "gpio", NULL),
223 MPP_FUNCTION(0x1, "dev", "ad1"),
224 MPP_FUNCTION(0x2, "uart1", "rts"),
225 MPP_FUNCTION(0x3, "uart0", "rts")),
226 MPP_MODE(41,
227 MPP_FUNCTION(0x0, "gpio", NULL),
228 MPP_FUNCTION(0x1, "dev", "ad2"),
229 MPP_FUNCTION(0x2, "uart1", "rxd")),
230 MPP_MODE(42,
231 MPP_FUNCTION(0x0, "gpo", NULL),
232 MPP_FUNCTION(0x1, "dev", "ad3"),
233 MPP_FUNCTION(0x2, "uart1", "txd")),
234 MPP_MODE(43,
235 MPP_FUNCTION(0x0, "gpo", NULL),
236 MPP_FUNCTION(0x1, "dev", "ad4"),
237 MPP_FUNCTION(0x2, "audio", "bclk")),
238 MPP_MODE(44,
239 MPP_FUNCTION(0x0, "gpo", NULL),
240 MPP_FUNCTION(0x1, "dev", "ad5"),
241 MPP_FUNCTION(0x2, "audio", "mclk")),
242 MPP_MODE(45,
243 MPP_FUNCTION(0x0, "gpo", NULL),
244 MPP_FUNCTION(0x1, "dev", "ad6"),
245 MPP_FUNCTION(0x2, "audio", "lrclk")),
246 MPP_MODE(46,
247 MPP_FUNCTION(0x0, "gpo", NULL),
248 MPP_FUNCTION(0x1, "dev", "ad7"),
249 MPP_FUNCTION(0x2, "audio", "sdo")),
250 MPP_MODE(47,
251 MPP_FUNCTION(0x0, "gpo", NULL),
252 MPP_FUNCTION(0x1, "dev", "ad8"),
253 MPP_FUNCTION(0x3, "sd0", "clk"),
254 MPP_FUNCTION(0x5, "audio", "spdifo")),
255 MPP_MODE(48,
256 MPP_FUNCTION(0x0, "gpio", NULL),
257 MPP_FUNCTION(0x1, "dev", "ad9"),
258 MPP_FUNCTION(0x2, "uart0", "rts"),
259 MPP_FUNCTION(0x3, "sd0", "cmd"),
260 MPP_FUNCTION(0x4, "sata1", "prsnt"),
261 MPP_FUNCTION(0x5, "spi0", "cs1")),
262 MPP_MODE(49,
263 MPP_FUNCTION(0x0, "gpio", NULL),
264 MPP_FUNCTION(0x1, "dev", "ad10"),
265 MPP_FUNCTION(0x2, "pcie", "clkreq1"),
266 MPP_FUNCTION(0x3, "sd0", "d0"),
267 MPP_FUNCTION(0x4, "spi1", "cs0"),
268 MPP_FUNCTION(0x5, "audio", "spdifi")),
269 MPP_MODE(50,
270 MPP_FUNCTION(0x0, "gpio", NULL),
271 MPP_FUNCTION(0x1, "dev", "ad11"),
272 MPP_FUNCTION(0x2, "uart0", "cts"),
273 MPP_FUNCTION(0x3, "sd0", "d1"),
274 MPP_FUNCTION(0x4, "spi1", "miso"),
275 MPP_FUNCTION(0x5, "audio", "rmclk")),
276 MPP_MODE(51,
277 MPP_FUNCTION(0x0, "gpio", NULL),
278 MPP_FUNCTION(0x1, "dev", "ad12"),
279 MPP_FUNCTION(0x2, "i2c1", "sda"),
280 MPP_FUNCTION(0x3, "sd0", "d2"),
281 MPP_FUNCTION(0x4, "spi1", "mosi")),
282 MPP_MODE(52,
283 MPP_FUNCTION(0x0, "gpio", NULL),
284 MPP_FUNCTION(0x1, "dev", "ad13"),
285 MPP_FUNCTION(0x2, "i2c1", "sck"),
286 MPP_FUNCTION(0x3, "sd0", "d3"),
287 MPP_FUNCTION(0x4, "spi1", "sck")),
288 MPP_MODE(53,
289 MPP_FUNCTION(0x0, "gpio", NULL),
290 MPP_FUNCTION(0x1, "dev", "ad14"),
291 MPP_FUNCTION(0x2, "sd0", "clk"),
292 MPP_FUNCTION(0x3, "tdm", "pclk"),
293 MPP_FUNCTION(0x4, "spi0", "cs2"),
294 MPP_FUNCTION(0x5, "pcie", "clkreq1")),
295 MPP_MODE(54,
296 MPP_FUNCTION(0x0, "gpo", NULL),
297 MPP_FUNCTION(0x1, "dev", "ad15"),
298 MPP_FUNCTION(0x3, "tdm", "dtx")),
299 MPP_MODE(55,
300 MPP_FUNCTION(0x0, "gpio", NULL),
301 MPP_FUNCTION(0x1, "dev", "cs1"),
302 MPP_FUNCTION(0x2, "uart1", "txd"),
303 MPP_FUNCTION(0x3, "tdm", "rst"),
304 MPP_FUNCTION(0x4, "sata1", "prsnt"),
305 MPP_FUNCTION(0x5, "sata0", "prsnt")),
306 MPP_MODE(56,
307 MPP_FUNCTION(0x0, "gpio", NULL),
308 MPP_FUNCTION(0x1, "dev", "cs2"),
309 MPP_FUNCTION(0x2, "uart1", "cts"),
310 MPP_FUNCTION(0x3, "uart0", "cts"),
311 MPP_FUNCTION(0x4, "spi0", "cs3"),
312 MPP_FUNCTION(0x5, "pcie", "clkreq0"),
313 MPP_FUNCTION(0x6, "spi1", "cs1")),
314 MPP_MODE(57,
315 MPP_FUNCTION(0x0, "gpio", NULL),
316 MPP_FUNCTION(0x1, "dev", "cs3"),
317 MPP_FUNCTION(0x2, "uart1", "rxd"),
318 MPP_FUNCTION(0x3, "tdm", "fsync"),
319 MPP_FUNCTION(0x4, "sata0", "prsnt"),
320 MPP_FUNCTION(0x5, "audio", "sdo")),
321 MPP_MODE(58,
322 MPP_FUNCTION(0x0, "gpio", NULL),
323 MPP_FUNCTION(0x1, "dev", "cs0"),
324 MPP_FUNCTION(0x2, "uart1", "rts"),
325 MPP_FUNCTION(0x3, "tdm", "int"),
326 MPP_FUNCTION(0x5, "audio", "extclk"),
327 MPP_FUNCTION(0x6, "uart0", "rts")),
328 MPP_MODE(59,
329 MPP_FUNCTION(0x0, "gpo", NULL),
330 MPP_FUNCTION(0x1, "dev", "ale0"),
331 MPP_FUNCTION(0x2, "uart1", "rts"),
332 MPP_FUNCTION(0x3, "uart0", "rts"),
333 MPP_FUNCTION(0x5, "audio", "bclk")),
334 MPP_MODE(60,
335 MPP_FUNCTION(0x0, "gpio", NULL),
336 MPP_FUNCTION(0x1, "dev", "ale1"),
337 MPP_FUNCTION(0x2, "uart1", "rxd"),
338 MPP_FUNCTION(0x3, "sata0", "prsnt"),
339 MPP_FUNCTION(0x4, "pcie", "rst-out"),
340 MPP_FUNCTION(0x5, "audio", "sdi")),
341 MPP_MODE(61,
342 MPP_FUNCTION(0x0, "gpo", NULL),
343 MPP_FUNCTION(0x1, "dev", "wen1"),
344 MPP_FUNCTION(0x2, "uart1", "txd"),
345 MPP_FUNCTION(0x5, "audio", "rclk")),
346 MPP_MODE(62,
347 MPP_FUNCTION(0x0, "gpio", NULL),
348 MPP_FUNCTION(0x1, "dev", "a2"),
349 MPP_FUNCTION(0x2, "uart1", "cts"),
350 MPP_FUNCTION(0x3, "tdm", "drx"),
351 MPP_FUNCTION(0x4, "pcie", "clkreq0"),
352 MPP_FUNCTION(0x5, "audio", "mclk"),
353 MPP_FUNCTION(0x6, "uart0", "cts")),
354 MPP_MODE(63,
355 MPP_FUNCTION(0x0, "gpo", NULL),
356 MPP_FUNCTION(0x1, "spi0", "sck"),
357 MPP_FUNCTION(0x2, "tclk", NULL)),
358 MPP_MODE(64,
359 MPP_FUNCTION(0x0, "gpio", NULL),
360 MPP_FUNCTION(0x1, "spi0", "miso"),
361 MPP_FUNCTION(0x2, "spi0-1", "cs1")),
362 MPP_MODE(65,
363 MPP_FUNCTION(0x0, "gpio", NULL),
364 MPP_FUNCTION(0x1, "spi0", "mosi"),
365 MPP_FUNCTION(0x2, "spi0-1", "cs2")),
366};
367
368static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info;
369
370static struct of_device_id armada_370_pinctrl_of_match[] __devinitdata = {
371 { .compatible = "marvell,mv88f6710-pinctrl" },
372 { },
373};
374
375static struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
376 MPP_REG_CTRL(0, 65),
377};
378
379static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = {
380 MPP_GPIO_RANGE(0, 0, 0, 32),
381 MPP_GPIO_RANGE(1, 32, 32, 32),
382 MPP_GPIO_RANGE(2, 64, 64, 2),
383};
384
385static int __devinit armada_370_pinctrl_probe(struct platform_device *pdev)
386{
387 struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info;
388
389 soc->variant = 0; /* no variants for Armada 370 */
390 soc->controls = mv88f6710_mpp_controls;
391 soc->ncontrols = ARRAY_SIZE(mv88f6710_mpp_controls);
392 soc->modes = mv88f6710_mpp_modes;
393 soc->nmodes = ARRAY_SIZE(mv88f6710_mpp_modes);
394 soc->gpioranges = mv88f6710_mpp_gpio_ranges;
395 soc->ngpioranges = ARRAY_SIZE(mv88f6710_mpp_gpio_ranges);
396
397 pdev->dev.platform_data = soc;
398
399 return mvebu_pinctrl_probe(pdev);
400}
401
402static int __devexit armada_370_pinctrl_remove(struct platform_device *pdev)
403{
404 return mvebu_pinctrl_remove(pdev);
405}
406
407static struct platform_driver armada_370_pinctrl_driver = {
408 .driver = {
409 .name = "armada-370-pinctrl",
410 .owner = THIS_MODULE,
411 .of_match_table = of_match_ptr(armada_370_pinctrl_of_match),
412 },
413 .probe = armada_370_pinctrl_probe,
414 .remove = __devexit_p(armada_370_pinctrl_remove),
415};
416
417module_platform_driver(armada_370_pinctrl_driver);
418
419MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
420MODULE_DESCRIPTION("Marvell Armada 370 pinctrl driver");
421MODULE_LICENSE("GPL v2");
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-28 18:46:04 -0500