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-rw-r--r--drivers/clk/mvebu/common.c6
-rw-r--r--drivers/clk/mvebu/common.h4
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c
index 354bbadb3bce..f902c18f4552 100644
--- a/drivers/clk/mvebu/common.c
+++ b/drivers/clk/mvebu/common.c
@@ -41,7 +41,7 @@ static struct clk_onecell_data clk_data;
41 * chosen following the dt convention: using the first known SoC 41 * chosen following the dt convention: using the first known SoC
42 * compatible with it. 42 * compatible with it.
43 */ 43 */
44u32 kirkwood_fix_sscg_deviation(struct device_node *np, u32 system_clk) 44u32 kirkwood_fix_sscg_deviation(u32 system_clk)
45{ 45{
46 struct device_node *sscg_np = NULL; 46 struct device_node *sscg_np = NULL;
47 void __iomem *sscg_map; 47 void __iomem *sscg_map;
@@ -49,7 +49,7 @@ u32 kirkwood_fix_sscg_deviation(struct device_node *np, u32 system_clk)
49 s32 low_bound, high_bound; 49 s32 low_bound, high_bound;
50 u64 freq_swing_half; 50 u64 freq_swing_half;
51 51
52 sscg_np = of_find_node_by_name(np, "sscg"); 52 sscg_np = of_find_node_by_name(NULL, "sscg");
53 if (sscg_np == NULL) { 53 if (sscg_np == NULL) {
54 pr_err("cannot get SSCG register node\n"); 54 pr_err("cannot get SSCG register node\n");
55 return system_clk; 55 return system_clk;
@@ -142,7 +142,7 @@ void __init mvebu_coreclk_setup(struct device_node *np,
142 142
143 if (desc->is_sscg_enabled && desc->fix_sscg_deviation 143 if (desc->is_sscg_enabled && desc->fix_sscg_deviation
144 && desc->is_sscg_enabled(base)) 144 && desc->is_sscg_enabled(base))
145 rate = desc->fix_sscg_deviation(np, rate); 145 rate = desc->fix_sscg_deviation(rate);
146 146
147 clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL, 147 clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL,
148 CLK_IS_ROOT, rate); 148 CLK_IS_ROOT, rate);
diff --git a/drivers/clk/mvebu/common.h b/drivers/clk/mvebu/common.h
index 59efaa850bde..989ab1464617 100644
--- a/drivers/clk/mvebu/common.h
+++ b/drivers/clk/mvebu/common.h
@@ -29,7 +29,7 @@ struct coreclk_soc_desc {
29 u32 (*get_cpu_freq)(void __iomem *sar); 29 u32 (*get_cpu_freq)(void __iomem *sar);
30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div); 30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div);
31 bool (*is_sscg_enabled)(void __iomem *sar); 31 bool (*is_sscg_enabled)(void __iomem *sar);
32 u32 (*fix_sscg_deviation)(struct device_node *np, u32 system_clk); 32 u32 (*fix_sscg_deviation)(u32 system_clk);
33 const struct coreclk_ratio *ratios; 33 const struct coreclk_ratio *ratios;
34 int num_ratios; 34 int num_ratios;
35}; 35};
@@ -51,5 +51,5 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
51 * This function is shared among the Kirkwood, Armada 370, Armada XP 51 * This function is shared among the Kirkwood, Armada 370, Armada XP
52 * and Armada 375 SoC 52 * and Armada 375 SoC
53 */ 53 */
54u32 kirkwood_fix_sscg_deviation(struct device_node *np, u32 system_clk); 54u32 kirkwood_fix_sscg_deviation(u32 system_clk);
55#endif 55#endif