diff options
| -rw-r--r-- | arch/tile/include/asm/pci.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h index c99ad44233f4..dfedd7ac7298 100644 --- a/arch/tile/include/asm/pci.h +++ b/arch/tile/include/asm/pci.h | |||
| @@ -122,6 +122,11 @@ static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {} | |||
| 122 | * the CPA plus TILE_PCI_MEM_MAP_BASE_OFFSET. To support 32-bit | 122 | * the CPA plus TILE_PCI_MEM_MAP_BASE_OFFSET. To support 32-bit |
| 123 | * devices, we create a separate map region that handles the low | 123 | * devices, we create a separate map region that handles the low |
| 124 | * 4GB. | 124 | * 4GB. |
| 125 | * | ||
| 126 | * This design lets us avoid the "PCI hole" problem where the host bridge | ||
| 127 | * won't pass DMA traffic with target addresses that happen to fall within the | ||
| 128 | * BAR space. This enables us to use all the physical memory for DMA, instead | ||
| 129 | * of wasting the same amount of physical memory as the BAR window size. | ||
| 125 | */ | 130 | */ |
| 126 | #define TILE_PCI_MEM_MAP_BASE_OFFSET (1ULL << CHIP_PA_WIDTH()) | 131 | #define TILE_PCI_MEM_MAP_BASE_OFFSET (1ULL << CHIP_PA_WIDTH()) |
| 127 | 132 | ||