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-rw-r--r--Documentation/ABI/testing/sysfs-bus-pci9
-rw-r--r--arch/x86/include/asm/pci.h2
-rw-r--r--arch/x86/kernel/pci-dma.c64
-rw-r--r--arch/x86/kernel/setup.c1
-rw-r--r--arch/x86/pci/direct.c17
-rw-r--r--arch/x86/pci/irq.c4
-rw-r--r--arch/x86/pci/mmconfig-shared.c10
-rw-r--r--drivers/acpi/pci_root.c14
-rw-r--r--drivers/i2c/busses/i2c-i801.c1
-rw-r--r--drivers/net/e1000e/netdev.c2
-rw-r--r--drivers/pci/access.c18
-rw-r--r--drivers/pci/bus.c6
-rw-r--r--drivers/pci/hotplug/acpiphp_glue.c7
-rw-r--r--drivers/pci/hotplug/pcihp_slot.c45
-rw-r--r--drivers/pci/pci-sysfs.c62
-rw-r--r--drivers/pci/pci.c419
-rw-r--r--drivers/pci/pci.h3
-rw-r--r--drivers/pci/pcie/aer/aer_inject.c2
-rw-r--r--drivers/pci/pcie/aer/aerdrv.h9
-rw-r--r--drivers/pci/pcie/aspm.c21
-rw-r--r--drivers/pci/probe.c43
-rw-r--r--drivers/pci/quirks.c21
-rw-r--r--drivers/pci/remove.c2
-rw-r--r--drivers/pci/setup-bus.c125
-rw-r--r--include/linux/kvm_host.h1
-rw-r--r--include/linux/pci-aspm.h1
-rw-r--r--include/linux/pci.h49
-rw-r--r--include/linux/pci_ids.h2
-rw-r--r--include/linux/pci_regs.h17
-rw-r--r--virt/kvm/assigned-dev.c18
30 files changed, 818 insertions, 177 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci
index 36bf454ba855..349ecf26ce10 100644
--- a/Documentation/ABI/testing/sysfs-bus-pci
+++ b/Documentation/ABI/testing/sysfs-bus-pci
@@ -74,6 +74,15 @@ Description:
74 hot-remove the PCI device and any of its children. 74 hot-remove the PCI device and any of its children.
75 Depends on CONFIG_HOTPLUG. 75 Depends on CONFIG_HOTPLUG.
76 76
77What: /sys/bus/pci/devices/.../pci_bus/.../rescan
78Date: May 2011
79Contact: Linux PCI developers <linux-pci@vger.kernel.org>
80Description:
81 Writing a non-zero value to this attribute will
82 force a rescan of the bus and all child buses,
83 and re-discover devices removed earlier from this
84 part of the device tree. Depends on CONFIG_HOTPLUG.
85
77What: /sys/bus/pci/devices/.../rescan 86What: /sys/bus/pci/devices/.../rescan
78Date: January 2009 87Date: January 2009
79Contact: Linux PCI developers <linux-pci@vger.kernel.org> 88Contact: Linux PCI developers <linux-pci@vger.kernel.org>
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 676129229630..d498943b906c 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -135,8 +135,6 @@ void default_teardown_msi_irqs(struct pci_dev *dev);
135#include "pci_64.h" 135#include "pci_64.h"
136#endif 136#endif
137 137
138void dma32_reserve_bootmem(void);
139
140/* implement the pci_ DMA API in terms of the generic device dma_ one */ 138/* implement the pci_ DMA API in terms of the generic device dma_ one */
141#include <asm-generic/pci-dma-compat.h> 139#include <asm-generic/pci-dma-compat.h>
142 140
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 9ea999a4dcc1..b49d00da2aed 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -68,74 +68,10 @@ int dma_set_mask(struct device *dev, u64 mask)
68} 68}
69EXPORT_SYMBOL(dma_set_mask); 69EXPORT_SYMBOL(dma_set_mask);
70 70
71#if defined(CONFIG_X86_64) && !defined(CONFIG_NUMA)
72static __initdata void *dma32_bootmem_ptr;
73static unsigned long dma32_bootmem_size __initdata = (128ULL<<20);
74
75static int __init parse_dma32_size_opt(char *p)
76{
77 if (!p)
78 return -EINVAL;
79 dma32_bootmem_size = memparse(p, &p);
80 return 0;
81}
82early_param("dma32_size", parse_dma32_size_opt);
83
84void __init dma32_reserve_bootmem(void)
85{
86 unsigned long size, align;
87 if (max_pfn <= MAX_DMA32_PFN)
88 return;
89
90 /*
91 * check aperture_64.c allocate_aperture() for reason about
92 * using 512M as goal
93 */
94 align = 64ULL<<20;
95 size = roundup(dma32_bootmem_size, align);
96 dma32_bootmem_ptr = __alloc_bootmem_nopanic(size, align,
97 512ULL<<20);
98 /*
99 * Kmemleak should not scan this block as it may not be mapped via the
100 * kernel direct mapping.
101 */
102 kmemleak_ignore(dma32_bootmem_ptr);
103 if (dma32_bootmem_ptr)
104 dma32_bootmem_size = size;
105 else
106 dma32_bootmem_size = 0;
107}
108static void __init dma32_free_bootmem(void)
109{
110
111 if (max_pfn <= MAX_DMA32_PFN)
112 return;
113
114 if (!dma32_bootmem_ptr)
115 return;
116
117 free_bootmem(__pa(dma32_bootmem_ptr), dma32_bootmem_size);
118
119 dma32_bootmem_ptr = NULL;
120 dma32_bootmem_size = 0;
121}
122#else
123void __init dma32_reserve_bootmem(void)
124{
125}
126static void __init dma32_free_bootmem(void)
127{
128}
129
130#endif
131
132void __init pci_iommu_alloc(void) 71void __init pci_iommu_alloc(void)
133{ 72{
134 struct iommu_table_entry *p; 73 struct iommu_table_entry *p;
135 74
136 /* free the range so iommu could get some range less than 4G */
137 dma32_free_bootmem();
138
139 sort_iommu_table(__iommu_table, __iommu_table_end); 75 sort_iommu_table(__iommu_table, __iommu_table_end);
140 check_iommu_entries(__iommu_table, __iommu_table_end); 76 check_iommu_entries(__iommu_table, __iommu_table_end);
141 77
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index c3050af9306d..605e5ae19c7f 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -964,7 +964,6 @@ void __init setup_arch(char **cmdline_p)
964 964
965 initmem_init(); 965 initmem_init();
966 memblock_find_dma_reserve(); 966 memblock_find_dma_reserve();
967 dma32_reserve_bootmem();
968 967
969#ifdef CONFIG_KVM_CLOCK 968#ifdef CONFIG_KVM_CLOCK
970 kvmclock_init(); 969 kvmclock_init();
diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c
index bd33620b0071..e6fd8473fb7b 100644
--- a/arch/x86/pci/direct.c
+++ b/arch/x86/pci/direct.c
@@ -280,12 +280,9 @@ void __init pci_direct_init(int type)
280 280
281int __init pci_direct_probe(void) 281int __init pci_direct_probe(void)
282{ 282{
283 struct resource *region, *region2;
284
285 if ((pci_probe & PCI_PROBE_CONF1) == 0) 283 if ((pci_probe & PCI_PROBE_CONF1) == 0)
286 goto type2; 284 goto type2;
287 region = request_region(0xCF8, 8, "PCI conf1"); 285 if (!request_region(0xCF8, 8, "PCI conf1"))
288 if (!region)
289 goto type2; 286 goto type2;
290 287
291 if (pci_check_type1()) { 288 if (pci_check_type1()) {
@@ -293,16 +290,14 @@ int __init pci_direct_probe(void)
293 port_cf9_safe = true; 290 port_cf9_safe = true;
294 return 1; 291 return 1;
295 } 292 }
296 release_resource(region); 293 release_region(0xCF8, 8);
297 294
298 type2: 295 type2:
299 if ((pci_probe & PCI_PROBE_CONF2) == 0) 296 if ((pci_probe & PCI_PROBE_CONF2) == 0)
300 return 0; 297 return 0;
301 region = request_region(0xCF8, 4, "PCI conf2"); 298 if (!request_region(0xCF8, 4, "PCI conf2"))
302 if (!region)
303 return 0; 299 return 0;
304 region2 = request_region(0xC000, 0x1000, "PCI conf2"); 300 if (!request_region(0xC000, 0x1000, "PCI conf2"))
305 if (!region2)
306 goto fail2; 301 goto fail2;
307 302
308 if (pci_check_type2()) { 303 if (pci_check_type2()) {
@@ -311,8 +306,8 @@ int __init pci_direct_probe(void)
311 return 2; 306 return 2;
312 } 307 }
313 308
314 release_resource(region2); 309 release_region(0xC000, 0x1000);
315 fail2: 310 fail2:
316 release_resource(region); 311 release_region(0xCF8, 4);
317 return 0; 312 return 0;
318} 313}
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index 8201165bae28..372e9b8989b3 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -602,7 +602,9 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
602 || (device >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN && 602 || (device >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN &&
603 device <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX) 603 device <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX)
604 || (device >= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN && 604 || (device >= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN &&
605 device <= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX)) { 605 device <= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX)
606 || (device >= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN &&
607 device <= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX)) {
606 r->name = "PIIX/ICH"; 608 r->name = "PIIX/ICH";
607 r->get = pirq_piix_get; 609 r->get = pirq_piix_get;
608 r->set = pirq_piix_set; 610 r->set = pirq_piix_set;
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index e282886616a0..750c346ef50a 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -606,6 +606,16 @@ static void __init __pci_mmcfg_init(int early)
606 if (list_empty(&pci_mmcfg_list)) 606 if (list_empty(&pci_mmcfg_list))
607 return; 607 return;
608 608
609 if (pcibios_last_bus < 0) {
610 const struct pci_mmcfg_region *cfg;
611
612 list_for_each_entry(cfg, &pci_mmcfg_list, list) {
613 if (cfg->segment)
614 break;
615 pcibios_last_bus = cfg->end_bus;
616 }
617 }
618
609 if (pci_mmcfg_arch_init()) 619 if (pci_mmcfg_arch_init())
610 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; 620 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
611 else { 621 else {
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index f911a2f8cc34..d06078d660ad 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -596,12 +596,18 @@ static int __devinit acpi_pci_root_add(struct acpi_device *device)
596 dev_info(root->bus->bridge, 596 dev_info(root->bus->bridge,
597 "ACPI _OSC control (0x%02x) granted\n", flags); 597 "ACPI _OSC control (0x%02x) granted\n", flags);
598 } else { 598 } else {
599 dev_dbg(root->bus->bridge, 599 dev_info(root->bus->bridge,
600 "ACPI _OSC request failed (code %d)\n", status); 600 "ACPI _OSC request failed (%s), "
601 printk(KERN_INFO "Unable to assume _OSC PCIe control. " 601 "returned control mask: 0x%02x\n",
602 "Disabling ASPM\n"); 602 acpi_format_exception(status), flags);
603 pr_info("ACPI _OSC control for PCIe not granted, "
604 "disabling ASPM\n");
603 pcie_no_aspm(); 605 pcie_no_aspm();
604 } 606 }
607 } else {
608 dev_info(root->bus->bridge,
609 "Unable to request _OSC control "
610 "(_OSC support mask: 0x%02x)\n", flags);
605 } 611 }
606 612
607 pci_acpi_add_bus_pm_notifier(device, root->bus); 613 pci_acpi_add_bus_pm_notifier(device, root->bus);
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 455e909bc768..ec36208c9977 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -137,6 +137,7 @@
137/* Older devices have their ID defined in <linux/pci_ids.h> */ 137/* Older devices have their ID defined in <linux/pci_ids.h> */
138#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 138#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22
139#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 139#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
140#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22
140/* Patsburg also has three 'Integrated Device Function' SMBus controllers */ 141/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
141#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70 142#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
142#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71 143#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index d9600566a1fc..3310c3d477d7 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -5361,7 +5361,7 @@ static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5361#ifdef CONFIG_PCIEASPM 5361#ifdef CONFIG_PCIEASPM
5362static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5362static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5363{ 5363{
5364 pci_disable_link_state(pdev, state); 5364 pci_disable_link_state_locked(pdev, state);
5365} 5365}
5366#else 5366#else
5367static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5367static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 531bc697d800..fdaa42aac7c6 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -143,33 +143,41 @@ static noinline void pci_wait_ucfg(struct pci_dev *dev)
143 __remove_wait_queue(&pci_ucfg_wait, &wait); 143 __remove_wait_queue(&pci_ucfg_wait, &wait);
144} 144}
145 145
146/* Returns 0 on success, negative values indicate error. */
146#define PCI_USER_READ_CONFIG(size,type) \ 147#define PCI_USER_READ_CONFIG(size,type) \
147int pci_user_read_config_##size \ 148int pci_user_read_config_##size \
148 (struct pci_dev *dev, int pos, type *val) \ 149 (struct pci_dev *dev, int pos, type *val) \
149{ \ 150{ \
150 int ret = 0; \ 151 int ret = 0; \
151 u32 data = -1; \ 152 u32 data = -1; \
152 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ 153 if (PCI_##size##_BAD) \
154 return -EINVAL; \
153 raw_spin_lock_irq(&pci_lock); \ 155 raw_spin_lock_irq(&pci_lock); \
154 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \ 156 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
155 ret = dev->bus->ops->read(dev->bus, dev->devfn, \ 157 ret = dev->bus->ops->read(dev->bus, dev->devfn, \
156 pos, sizeof(type), &data); \ 158 pos, sizeof(type), &data); \
157 raw_spin_unlock_irq(&pci_lock); \ 159 raw_spin_unlock_irq(&pci_lock); \
158 *val = (type)data; \ 160 *val = (type)data; \
161 if (ret > 0) \
162 ret = -EINVAL; \
159 return ret; \ 163 return ret; \
160} 164}
161 165
166/* Returns 0 on success, negative values indicate error. */
162#define PCI_USER_WRITE_CONFIG(size,type) \ 167#define PCI_USER_WRITE_CONFIG(size,type) \
163int pci_user_write_config_##size \ 168int pci_user_write_config_##size \
164 (struct pci_dev *dev, int pos, type val) \ 169 (struct pci_dev *dev, int pos, type val) \
165{ \ 170{ \
166 int ret = -EIO; \ 171 int ret = -EIO; \
167 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ 172 if (PCI_##size##_BAD) \
173 return -EINVAL; \
168 raw_spin_lock_irq(&pci_lock); \ 174 raw_spin_lock_irq(&pci_lock); \
169 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \ 175 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
170 ret = dev->bus->ops->write(dev->bus, dev->devfn, \ 176 ret = dev->bus->ops->write(dev->bus, dev->devfn, \
171 pos, sizeof(type), val); \ 177 pos, sizeof(type), val); \
172 raw_spin_unlock_irq(&pci_lock); \ 178 raw_spin_unlock_irq(&pci_lock); \
179 if (ret > 0) \
180 ret = -EINVAL; \
173 return ret; \ 181 return ret; \
174} 182}
175 183
@@ -197,6 +205,8 @@ struct pci_vpd_pci22 {
197 * This code has to spin since there is no other notification from the PCI 205 * This code has to spin since there is no other notification from the PCI
198 * hardware. Since the VPD is often implemented by serial attachment to an 206 * hardware. Since the VPD is often implemented by serial attachment to an
199 * EEPROM, it may take many milliseconds to complete. 207 * EEPROM, it may take many milliseconds to complete.
208 *
209 * Returns 0 on success, negative values indicate error.
200 */ 210 */
201static int pci_vpd_pci22_wait(struct pci_dev *dev) 211static int pci_vpd_pci22_wait(struct pci_dev *dev)
202{ 212{
@@ -212,7 +222,7 @@ static int pci_vpd_pci22_wait(struct pci_dev *dev)
212 for (;;) { 222 for (;;) {
213 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR, 223 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
214 &status); 224 &status);
215 if (ret) 225 if (ret < 0)
216 return ret; 226 return ret;
217 227
218 if ((status & PCI_VPD_ADDR_F) == vpd->flag) { 228 if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
@@ -324,6 +334,8 @@ static ssize_t pci_vpd_pci22_write(struct pci_dev *dev, loff_t pos, size_t count
324 vpd->busy = true; 334 vpd->busy = true;
325 vpd->flag = 0; 335 vpd->flag = 0;
326 ret = pci_vpd_pci22_wait(dev); 336 ret = pci_vpd_pci22_wait(dev);
337 if (ret < 0)
338 break;
327 339
328 pos += sizeof(u32); 340 pos += sizeof(u32);
329 } 341 }
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 69546e9213dd..1e2ad92a4752 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -163,12 +163,6 @@ int pci_bus_add_child(struct pci_bus *bus)
163 163
164 bus->is_added = 1; 164 bus->is_added = 1;
165 165
166 retval = device_create_file(&bus->dev, &dev_attr_cpuaffinity);
167 if (retval)
168 return retval;
169
170 retval = device_create_file(&bus->dev, &dev_attr_cpulistaffinity);
171
172 /* Create legacy_io and legacy_mem files for this bus */ 166 /* Create legacy_io and legacy_mem files for this bus */
173 pci_create_legacy_files(bus); 167 pci_create_legacy_files(bus);
174 168
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index 2f67e9bc2f96..a70fa89f76fd 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -827,6 +827,13 @@ static int __ref enable_device(struct acpiphp_slot *slot)
827 acpiphp_set_hpp_values(bus); 827 acpiphp_set_hpp_values(bus);
828 acpiphp_set_acpi_region(slot); 828 acpiphp_set_acpi_region(slot);
829 pci_enable_bridges(bus); 829 pci_enable_bridges(bus);
830
831 list_for_each_entry(dev, &bus->devices, bus_list) {
832 /* Assume that newly added devices are powered on already. */
833 if (!dev->is_added)
834 dev->current_state = PCI_D0;
835 }
836
830 pci_bus_add_devices(bus); 837 pci_bus_add_devices(bus);
831 838
832 list_for_each_entry(func, &slot->funcs, sibling) { 839 list_for_each_entry(func, &slot->funcs, sibling) {
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c
index 80b461c98557..749fdf070319 100644
--- a/drivers/pci/hotplug/pcihp_slot.c
+++ b/drivers/pci/hotplug/pcihp_slot.c
@@ -158,6 +158,47 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
158 */ 158 */
159} 159}
160 160
161/* Program PCIE MaxPayload setting on device: ensure parent maxpayload <= device */
162static int pci_set_payload(struct pci_dev *dev)
163{
164 int pos, ppos;
165 u16 pctl, psz;
166 u16 dctl, dsz, dcap, dmax;
167 struct pci_dev *parent;
168
169 parent = dev->bus->self;
170 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
171 if (!pos)
172 return 0;
173
174 /* Read Device MaxPayload capability and setting */
175 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &dctl);
176 pci_read_config_word(dev, pos + PCI_EXP_DEVCAP, &dcap);
177 dsz = (dctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
178 dmax = (dcap & PCI_EXP_DEVCAP_PAYLOAD);
179
180 /* Read Parent MaxPayload setting */
181 ppos = pci_find_capability(parent, PCI_CAP_ID_EXP);
182 if (!ppos)
183 return 0;
184 pci_read_config_word(parent, ppos + PCI_EXP_DEVCTL, &pctl);
185 psz = (pctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
186
187 /* If parent payload > device max payload -> error
188 * If parent payload > device payload -> set speed
189 * If parent payload <= device payload -> do nothing
190 */
191 if (psz > dmax)
192 return -1;
193 else if (psz > dsz) {
194 dev_info(&dev->dev, "Setting MaxPayload to %d\n", 128 << psz);
195 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
196 (dctl & ~PCI_EXP_DEVCTL_PAYLOAD) +
197 (psz << 5));
198 }
199 return 0;
200}
201
161void pci_configure_slot(struct pci_dev *dev) 202void pci_configure_slot(struct pci_dev *dev)
162{ 203{
163 struct pci_dev *cdev; 204 struct pci_dev *cdev;
@@ -169,6 +210,10 @@ void pci_configure_slot(struct pci_dev *dev)
169 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI))) 210 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
170 return; 211 return;
171 212
213 ret = pci_set_payload(dev);
214 if (ret)
215 dev_warn(&dev->dev, "could not set device max payload\n");
216
172 memset(&hpp, 0, sizeof(hpp)); 217 memset(&hpp, 0, sizeof(hpp));
173 ret = pci_get_hp_params(dev, &hpp); 218 ret = pci_get_hp_params(dev, &hpp);
174 if (ret) 219 if (ret)
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index f8deb3e380a2..7bcf12adced7 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -108,6 +108,40 @@ static ssize_t local_cpulist_show(struct device *dev,
108 return len; 108 return len;
109} 109}
110 110
111/*
112 * PCI Bus Class Devices
113 */
114static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
115 int type,
116 struct device_attribute *attr,
117 char *buf)
118{
119 int ret;
120 const struct cpumask *cpumask;
121
122 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
123 ret = type ?
124 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
125 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
126 buf[ret++] = '\n';
127 buf[ret] = '\0';
128 return ret;
129}
130
131static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
132 struct device_attribute *attr,
133 char *buf)
134{
135 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
136}
137
138static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
139 struct device_attribute *attr,
140 char *buf)
141{
142 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
143}
144
111/* show resources */ 145/* show resources */
112static ssize_t 146static ssize_t
113resource_show(struct device * dev, struct device_attribute *attr, char * buf) 147resource_show(struct device * dev, struct device_attribute *attr, char * buf)
@@ -318,6 +352,25 @@ remove_store(struct device *dev, struct device_attribute *dummy,
318 count = ret; 352 count = ret;
319 return count; 353 return count;
320} 354}
355
356static ssize_t
357dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
358 const char *buf, size_t count)
359{
360 unsigned long val;
361 struct pci_bus *bus = to_pci_bus(dev);
362
363 if (strict_strtoul(buf, 0, &val) < 0)
364 return -EINVAL;
365
366 if (val) {
367 mutex_lock(&pci_remove_rescan_mutex);
368 pci_rescan_bus(bus);
369 mutex_unlock(&pci_remove_rescan_mutex);
370 }
371 return count;
372}
373
321#endif 374#endif
322 375
323struct device_attribute pci_dev_attrs[] = { 376struct device_attribute pci_dev_attrs[] = {
@@ -347,6 +400,15 @@ struct device_attribute pci_dev_attrs[] = {
347 __ATTR_NULL, 400 __ATTR_NULL,
348}; 401};
349 402
403struct device_attribute pcibus_dev_attrs[] = {
404#ifdef CONFIG_HOTPLUG
405 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
406#endif
407 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
408 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
409 __ATTR_NULL,
410};
411
350static ssize_t 412static ssize_t
351boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) 413boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
352{ 414{
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 2472e7177b4b..22c9b27fdd8d 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -830,7 +830,7 @@ static int pci_save_pcie_state(struct pci_dev *dev)
830 dev_err(&dev->dev, "buffer not found in %s\n", __func__); 830 dev_err(&dev->dev, "buffer not found in %s\n", __func__);
831 return -ENOMEM; 831 return -ENOMEM;
832 } 832 }
833 cap = (u16 *)&save_state->data[0]; 833 cap = (u16 *)&save_state->cap.data[0];
834 834
835 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags); 835 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
836 836
@@ -863,7 +863,7 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
863 pos = pci_find_capability(dev, PCI_CAP_ID_EXP); 863 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
864 if (!save_state || pos <= 0) 864 if (!save_state || pos <= 0)
865 return; 865 return;
866 cap = (u16 *)&save_state->data[0]; 866 cap = (u16 *)&save_state->cap.data[0];
867 867
868 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags); 868 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
869 869
@@ -899,7 +899,8 @@ static int pci_save_pcix_state(struct pci_dev *dev)
899 return -ENOMEM; 899 return -ENOMEM;
900 } 900 }
901 901
902 pci_read_config_word(dev, pos + PCI_X_CMD, (u16 *)save_state->data); 902 pci_read_config_word(dev, pos + PCI_X_CMD,
903 (u16 *)save_state->cap.data);
903 904
904 return 0; 905 return 0;
905} 906}
@@ -914,7 +915,7 @@ static void pci_restore_pcix_state(struct pci_dev *dev)
914 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); 915 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
915 if (!save_state || pos <= 0) 916 if (!save_state || pos <= 0)
916 return; 917 return;
917 cap = (u16 *)&save_state->data[0]; 918 cap = (u16 *)&save_state->cap.data[0];
918 919
919 pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]); 920 pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]);
920} 921}
@@ -975,6 +976,104 @@ void pci_restore_state(struct pci_dev *dev)
975 dev->state_saved = false; 976 dev->state_saved = false;
976} 977}
977 978
979struct pci_saved_state {
980 u32 config_space[16];
981 struct pci_cap_saved_data cap[0];
982};
983
984/**
985 * pci_store_saved_state - Allocate and return an opaque struct containing
986 * the device saved state.
987 * @dev: PCI device that we're dealing with
988 *
989 * Rerturn NULL if no state or error.
990 */
991struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev)
992{
993 struct pci_saved_state *state;
994 struct pci_cap_saved_state *tmp;
995 struct pci_cap_saved_data *cap;
996 struct hlist_node *pos;
997 size_t size;
998
999 if (!dev->state_saved)
1000 return NULL;
1001
1002 size = sizeof(*state) + sizeof(struct pci_cap_saved_data);
1003
1004 hlist_for_each_entry(tmp, pos, &dev->saved_cap_space, next)
1005 size += sizeof(struct pci_cap_saved_data) + tmp->cap.size;
1006
1007 state = kzalloc(size, GFP_KERNEL);
1008 if (!state)
1009 return NULL;
1010
1011 memcpy(state->config_space, dev->saved_config_space,
1012 sizeof(state->config_space));
1013
1014 cap = state->cap;
1015 hlist_for_each_entry(tmp, pos, &dev->saved_cap_space, next) {
1016 size_t len = sizeof(struct pci_cap_saved_data) + tmp->cap.size;
1017 memcpy(cap, &tmp->cap, len);
1018 cap = (struct pci_cap_saved_data *)((u8 *)cap + len);
1019 }
1020 /* Empty cap_save terminates list */
1021
1022 return state;
1023}
1024EXPORT_SYMBOL_GPL(pci_store_saved_state);
1025
1026/**
1027 * pci_load_saved_state - Reload the provided save state into struct pci_dev.
1028 * @dev: PCI device that we're dealing with
1029 * @state: Saved state returned from pci_store_saved_state()
1030 */
1031int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state)
1032{
1033 struct pci_cap_saved_data *cap;
1034
1035 dev->state_saved = false;
1036
1037 if (!state)
1038 return 0;
1039
1040 memcpy(dev->saved_config_space, state->config_space,
1041 sizeof(state->config_space));
1042
1043 cap = state->cap;
1044 while (cap->size) {
1045 struct pci_cap_saved_state *tmp;
1046
1047 tmp = pci_find_saved_cap(dev, cap->cap_nr);
1048 if (!tmp || tmp->cap.size != cap->size)
1049 return -EINVAL;
1050
1051 memcpy(tmp->cap.data, cap->data, tmp->cap.size);
1052 cap = (struct pci_cap_saved_data *)((u8 *)cap +
1053 sizeof(struct pci_cap_saved_data) + cap->size);
1054 }
1055
1056 dev->state_saved = true;
1057 return 0;
1058}
1059EXPORT_SYMBOL_GPL(pci_load_saved_state);
1060
1061/**
1062 * pci_load_and_free_saved_state - Reload the save state pointed to by state,
1063 * and free the memory allocated for it.
1064 * @dev: PCI device that we're dealing with
1065 * @state: Pointer to saved state returned from pci_store_saved_state()
1066 */
1067int pci_load_and_free_saved_state(struct pci_dev *dev,
1068 struct pci_saved_state **state)
1069{
1070 int ret = pci_load_saved_state(dev, *state);
1071 kfree(*state);
1072 *state = NULL;
1073 return ret;
1074}
1075EXPORT_SYMBOL_GPL(pci_load_and_free_saved_state);
1076
978static int do_pci_enable_device(struct pci_dev *dev, int bars) 1077static int do_pci_enable_device(struct pci_dev *dev, int bars)
979{ 1078{
980 int err; 1079 int err;
@@ -1771,7 +1870,8 @@ static int pci_add_cap_save_buffer(
1771 if (!save_state) 1870 if (!save_state)
1772 return -ENOMEM; 1871 return -ENOMEM;
1773 1872
1774 save_state->cap_nr = cap; 1873 save_state->cap.cap_nr = cap;
1874 save_state->cap.size = size;
1775 pci_add_saved_cap(dev, save_state); 1875 pci_add_saved_cap(dev, save_state);
1776 1876
1777 return 0; 1877 return 0;
@@ -1834,6 +1934,300 @@ void pci_enable_ari(struct pci_dev *dev)
1834 bridge->ari_enabled = 1; 1934 bridge->ari_enabled = 1;
1835} 1935}
1836 1936
1937/**
1938 * pci_enable_ido - enable ID-based ordering on a device
1939 * @dev: the PCI device
1940 * @type: which types of IDO to enable
1941 *
1942 * Enable ID-based ordering on @dev. @type can contain the bits
1943 * %PCI_EXP_IDO_REQUEST and/or %PCI_EXP_IDO_COMPLETION to indicate
1944 * which types of transactions are allowed to be re-ordered.
1945 */
1946void pci_enable_ido(struct pci_dev *dev, unsigned long type)
1947{
1948 int pos;
1949 u16 ctrl;
1950
1951 pos = pci_pcie_cap(dev);
1952 if (!pos)
1953 return;
1954
1955 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
1956 if (type & PCI_EXP_IDO_REQUEST)
1957 ctrl |= PCI_EXP_IDO_REQ_EN;
1958 if (type & PCI_EXP_IDO_COMPLETION)
1959 ctrl |= PCI_EXP_IDO_CMP_EN;
1960 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
1961}
1962EXPORT_SYMBOL(pci_enable_ido);
1963
1964/**
1965 * pci_disable_ido - disable ID-based ordering on a device
1966 * @dev: the PCI device
1967 * @type: which types of IDO to disable
1968 */
1969void pci_disable_ido(struct pci_dev *dev, unsigned long type)
1970{
1971 int pos;
1972 u16 ctrl;
1973
1974 if (!pci_is_pcie(dev))
1975 return;
1976
1977 pos = pci_pcie_cap(dev);
1978 if (!pos)
1979 return;
1980
1981 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
1982 if (type & PCI_EXP_IDO_REQUEST)
1983 ctrl &= ~PCI_EXP_IDO_REQ_EN;
1984 if (type & PCI_EXP_IDO_COMPLETION)
1985 ctrl &= ~PCI_EXP_IDO_CMP_EN;
1986 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
1987}
1988EXPORT_SYMBOL(pci_disable_ido);
1989
1990/**
1991 * pci_enable_obff - enable optimized buffer flush/fill
1992 * @dev: PCI device
1993 * @type: type of signaling to use
1994 *
1995 * Try to enable @type OBFF signaling on @dev. It will try using WAKE#
1996 * signaling if possible, falling back to message signaling only if
1997 * WAKE# isn't supported. @type should indicate whether the PCIe link
1998 * be brought out of L0s or L1 to send the message. It should be either
1999 * %PCI_EXP_OBFF_SIGNAL_ALWAYS or %PCI_OBFF_SIGNAL_L0.
2000 *
2001 * If your device can benefit from receiving all messages, even at the
2002 * power cost of bringing the link back up from a low power state, use
2003 * %PCI_EXP_OBFF_SIGNAL_ALWAYS. Otherwise, use %PCI_OBFF_SIGNAL_L0 (the
2004 * preferred type).
2005 *
2006 * RETURNS:
2007 * Zero on success, appropriate error number on failure.
2008 */
2009int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type)
2010{
2011 int pos;
2012 u32 cap;
2013 u16 ctrl;
2014 int ret;
2015
2016 if (!pci_is_pcie(dev))
2017 return -ENOTSUPP;
2018
2019 pos = pci_pcie_cap(dev);
2020 if (!pos)
2021 return -ENOTSUPP;
2022
2023 pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
2024 if (!(cap & PCI_EXP_OBFF_MASK))
2025 return -ENOTSUPP; /* no OBFF support at all */
2026
2027 /* Make sure the topology supports OBFF as well */
2028 if (dev->bus) {
2029 ret = pci_enable_obff(dev->bus->self, type);
2030 if (ret)
2031 return ret;
2032 }
2033
2034 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
2035 if (cap & PCI_EXP_OBFF_WAKE)
2036 ctrl |= PCI_EXP_OBFF_WAKE_EN;
2037 else {
2038 switch (type) {
2039 case PCI_EXP_OBFF_SIGNAL_L0:
2040 if (!(ctrl & PCI_EXP_OBFF_WAKE_EN))
2041 ctrl |= PCI_EXP_OBFF_MSGA_EN;
2042 break;
2043 case PCI_EXP_OBFF_SIGNAL_ALWAYS:
2044 ctrl &= ~PCI_EXP_OBFF_WAKE_EN;
2045 ctrl |= PCI_EXP_OBFF_MSGB_EN;
2046 break;
2047 default:
2048 WARN(1, "bad OBFF signal type\n");
2049 return -ENOTSUPP;
2050 }
2051 }
2052 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
2053
2054 return 0;
2055}
2056EXPORT_SYMBOL(pci_enable_obff);
2057
2058/**
2059 * pci_disable_obff - disable optimized buffer flush/fill
2060 * @dev: PCI device
2061 *
2062 * Disable OBFF on @dev.
2063 */
2064void pci_disable_obff(struct pci_dev *dev)
2065{
2066 int pos;
2067 u16 ctrl;
2068
2069 if (!pci_is_pcie(dev))
2070 return;
2071
2072 pos = pci_pcie_cap(dev);
2073 if (!pos)
2074 return;
2075
2076 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
2077 ctrl &= ~PCI_EXP_OBFF_WAKE_EN;
2078 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
2079}
2080EXPORT_SYMBOL(pci_disable_obff);
2081
2082/**
2083 * pci_ltr_supported - check whether a device supports LTR
2084 * @dev: PCI device
2085 *
2086 * RETURNS:
2087 * True if @dev supports latency tolerance reporting, false otherwise.
2088 */
2089bool pci_ltr_supported(struct pci_dev *dev)
2090{
2091 int pos;
2092 u32 cap;
2093
2094 if (!pci_is_pcie(dev))
2095 return false;
2096
2097 pos = pci_pcie_cap(dev);
2098 if (!pos)
2099 return false;
2100
2101 pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
2102
2103 return cap & PCI_EXP_DEVCAP2_LTR;
2104}
2105EXPORT_SYMBOL(pci_ltr_supported);
2106
2107/**
2108 * pci_enable_ltr - enable latency tolerance reporting
2109 * @dev: PCI device
2110 *
2111 * Enable LTR on @dev if possible, which means enabling it first on
2112 * upstream ports.
2113 *
2114 * RETURNS:
2115 * Zero on success, errno on failure.
2116 */
2117int pci_enable_ltr(struct pci_dev *dev)
2118{
2119 int pos;
2120 u16 ctrl;
2121 int ret;
2122
2123 if (!pci_ltr_supported(dev))
2124 return -ENOTSUPP;
2125
2126 pos = pci_pcie_cap(dev);
2127 if (!pos)
2128 return -ENOTSUPP;
2129
2130 /* Only primary function can enable/disable LTR */
2131 if (PCI_FUNC(dev->devfn) != 0)
2132 return -EINVAL;
2133
2134 /* Enable upstream ports first */
2135 if (dev->bus) {
2136 ret = pci_enable_ltr(dev->bus->self);
2137 if (ret)
2138 return ret;
2139 }
2140
2141 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
2142 ctrl |= PCI_EXP_LTR_EN;
2143 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
2144
2145 return 0;
2146}
2147EXPORT_SYMBOL(pci_enable_ltr);
2148
2149/**
2150 * pci_disable_ltr - disable latency tolerance reporting
2151 * @dev: PCI device
2152 */
2153void pci_disable_ltr(struct pci_dev *dev)
2154{
2155 int pos;
2156 u16 ctrl;
2157
2158 if (!pci_ltr_supported(dev))
2159 return;
2160
2161 pos = pci_pcie_cap(dev);
2162 if (!pos)
2163 return;
2164
2165 /* Only primary function can enable/disable LTR */
2166 if (PCI_FUNC(dev->devfn) != 0)
2167 return;
2168
2169 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
2170 ctrl &= ~PCI_EXP_LTR_EN;
2171 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
2172}
2173EXPORT_SYMBOL(pci_disable_ltr);
2174
2175static int __pci_ltr_scale(int *val)
2176{
2177 int scale = 0;
2178
2179 while (*val > 1023) {
2180 *val = (*val + 31) / 32;
2181 scale++;
2182 }
2183 return scale;
2184}
2185
2186/**
2187 * pci_set_ltr - set LTR latency values
2188 * @dev: PCI device
2189 * @snoop_lat_ns: snoop latency in nanoseconds
2190 * @nosnoop_lat_ns: nosnoop latency in nanoseconds
2191 *
2192 * Figure out the scale and set the LTR values accordingly.
2193 */
2194int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns)
2195{
2196 int pos, ret, snoop_scale, nosnoop_scale;
2197 u16 val;
2198
2199 if (!pci_ltr_supported(dev))
2200 return -ENOTSUPP;
2201
2202 snoop_scale = __pci_ltr_scale(&snoop_lat_ns);
2203 nosnoop_scale = __pci_ltr_scale(&nosnoop_lat_ns);
2204
2205 if (snoop_lat_ns > PCI_LTR_VALUE_MASK ||
2206 nosnoop_lat_ns > PCI_LTR_VALUE_MASK)
2207 return -EINVAL;
2208
2209 if ((snoop_scale > (PCI_LTR_SCALE_MASK >> PCI_LTR_SCALE_SHIFT)) ||
2210 (nosnoop_scale > (PCI_LTR_SCALE_MASK >> PCI_LTR_SCALE_SHIFT)))
2211 return -EINVAL;
2212
2213 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);
2214 if (!pos)
2215 return -ENOTSUPP;
2216
2217 val = (snoop_scale << PCI_LTR_SCALE_SHIFT) | snoop_lat_ns;
2218 ret = pci_write_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT, val);
2219 if (ret != 4)
2220 return -EIO;
2221
2222 val = (nosnoop_scale << PCI_LTR_SCALE_SHIFT) | nosnoop_lat_ns;
2223 ret = pci_write_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT, val);
2224 if (ret != 4)
2225 return -EIO;
2226
2227 return 0;
2228}
2229EXPORT_SYMBOL(pci_set_ltr);
2230
1837static int pci_acs_enable; 2231static int pci_acs_enable;
1838 2232
1839/** 2233/**
@@ -2479,6 +2873,21 @@ clear:
2479 return 0; 2873 return 0;
2480} 2874}
2481 2875
2876/**
2877 * pci_pm_reset - Put device into PCI_D3 and back into PCI_D0.
2878 * @dev: Device to reset.
2879 * @probe: If set, only check if the device can be reset this way.
2880 *
2881 * If @dev supports native PCI PM and its PCI_PM_CTRL_NO_SOFT_RESET flag is
2882 * unset, it will be reinitialized internally when going from PCI_D3hot to
2883 * PCI_D0. If that's the case and the device is not in a low-power state
2884 * already, force it into PCI_D3hot and back to PCI_D0, causing it to be reset.
2885 *
2886 * NOTE: This causes the caller to sleep for twice the device power transition
2887 * cooldown period, which for the D0->D3hot and D3hot->D0 transitions is 10 ms
2888 * by devault (i.e. unless the @dev's d3_delay field has a different value).
2889 * Moreover, only devices in D0 can be reset by this function.
2890 */
2482static int pci_pm_reset(struct pci_dev *dev, int probe) 2891static int pci_pm_reset(struct pci_dev *dev, int probe)
2483{ 2892{
2484 u16 csr; 2893 u16 csr;
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 4020025f854e..731e20265ace 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -156,8 +156,7 @@ static inline int pci_no_d1d2(struct pci_dev *dev)
156 156
157} 157}
158extern struct device_attribute pci_dev_attrs[]; 158extern struct device_attribute pci_dev_attrs[];
159extern struct device_attribute dev_attr_cpuaffinity; 159extern struct device_attribute pcibus_dev_attrs[];
160extern struct device_attribute dev_attr_cpulistaffinity;
161#ifdef CONFIG_HOTPLUG 160#ifdef CONFIG_HOTPLUG
162extern struct bus_attribute pci_bus_attrs[]; 161extern struct bus_attribute pci_bus_attrs[];
163#else 162#else
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index f62079ff06dd..95489cd9a555 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -326,7 +326,7 @@ static int aer_inject(struct aer_error_inj *einj)
326 unsigned long flags; 326 unsigned long flags;
327 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn); 327 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
328 int pos_cap_err, rp_pos_cap_err; 328 int pos_cap_err, rp_pos_cap_err;
329 u32 sever, cor_mask, uncor_mask, cor_mask_orig, uncor_mask_orig; 329 u32 sever, cor_mask, uncor_mask, cor_mask_orig = 0, uncor_mask_orig = 0;
330 int ret = 0; 330 int ret = 0;
331 331
332 dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn); 332 dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn);
diff --git a/drivers/pci/pcie/aer/aerdrv.h b/drivers/pci/pcie/aer/aerdrv.h
index 3eb77080366a..94a7598eb262 100644
--- a/drivers/pci/pcie/aer/aerdrv.h
+++ b/drivers/pci/pcie/aer/aerdrv.h
@@ -114,15 +114,6 @@ extern void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);
114extern void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info); 114extern void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info);
115extern irqreturn_t aer_irq(int irq, void *context); 115extern irqreturn_t aer_irq(int irq, void *context);
116 116
117#ifdef CONFIG_ACPI
118extern int aer_osc_setup(struct pcie_device *pciedev);
119#else
120static inline int aer_osc_setup(struct pcie_device *pciedev)
121{
122 return 0;
123}
124#endif
125
126#ifdef CONFIG_ACPI_APEI 117#ifdef CONFIG_ACPI_APEI
127extern int pcie_aer_get_firmware_first(struct pci_dev *pci_dev); 118extern int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
128#else 119#else
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index eee09f756ec9..6892601fc76f 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -608,7 +608,7 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
608 * the BIOS's expectation, we'll do so once pci_enable_device() is 608 * the BIOS's expectation, we'll do so once pci_enable_device() is
609 * called. 609 * called.
610 */ 610 */
611 if (aspm_policy != POLICY_POWERSAVE) { 611 if (aspm_policy != POLICY_POWERSAVE || aspm_clear_state) {
612 pcie_config_aspm_path(link); 612 pcie_config_aspm_path(link);
613 pcie_set_clkpm(link, policy_to_clkpm_state(link)); 613 pcie_set_clkpm(link, policy_to_clkpm_state(link));
614 } 614 }
@@ -734,7 +734,7 @@ void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
734 * pci_disable_link_state - disable pci device's link state, so the link will 734 * pci_disable_link_state - disable pci device's link state, so the link will
735 * never enter specific states 735 * never enter specific states
736 */ 736 */
737void pci_disable_link_state(struct pci_dev *pdev, int state) 737static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem)
738{ 738{
739 struct pci_dev *parent = pdev->bus->self; 739 struct pci_dev *parent = pdev->bus->self;
740 struct pcie_link_state *link; 740 struct pcie_link_state *link;
@@ -747,7 +747,8 @@ void pci_disable_link_state(struct pci_dev *pdev, int state)
747 if (!parent || !parent->link_state) 747 if (!parent || !parent->link_state)
748 return; 748 return;
749 749
750 down_read(&pci_bus_sem); 750 if (sem)
751 down_read(&pci_bus_sem);
751 mutex_lock(&aspm_lock); 752 mutex_lock(&aspm_lock);
752 link = parent->link_state; 753 link = parent->link_state;
753 if (state & PCIE_LINK_STATE_L0S) 754 if (state & PCIE_LINK_STATE_L0S)
@@ -761,7 +762,19 @@ void pci_disable_link_state(struct pci_dev *pdev, int state)
761 pcie_set_clkpm(link, 0); 762 pcie_set_clkpm(link, 0);
762 } 763 }
763 mutex_unlock(&aspm_lock); 764 mutex_unlock(&aspm_lock);
764 up_read(&pci_bus_sem); 765 if (sem)
766 up_read(&pci_bus_sem);
767}
768
769void pci_disable_link_state_locked(struct pci_dev *pdev, int state)
770{
771 __pci_disable_link_state(pdev, state, false);
772}
773EXPORT_SYMBOL(pci_disable_link_state_locked);
774
775void pci_disable_link_state(struct pci_dev *pdev, int state)
776{
777 __pci_disable_link_state(pdev, state, true);
765} 778}
766EXPORT_SYMBOL(pci_disable_link_state); 779EXPORT_SYMBOL(pci_disable_link_state);
767 780
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 44cbbbaa499d..48849ffdd672 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -43,43 +43,6 @@ int no_pci_devices(void)
43EXPORT_SYMBOL(no_pci_devices); 43EXPORT_SYMBOL(no_pci_devices);
44 44
45/* 45/*
46 * PCI Bus Class Devices
47 */
48static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
49 int type,
50 struct device_attribute *attr,
51 char *buf)
52{
53 int ret;
54 const struct cpumask *cpumask;
55
56 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
57 ret = type?
58 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
59 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
60 buf[ret++] = '\n';
61 buf[ret] = '\0';
62 return ret;
63}
64
65static ssize_t inline pci_bus_show_cpumaskaffinity(struct device *dev,
66 struct device_attribute *attr,
67 char *buf)
68{
69 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
70}
71
72static ssize_t inline pci_bus_show_cpulistaffinity(struct device *dev,
73 struct device_attribute *attr,
74 char *buf)
75{
76 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
77}
78
79DEVICE_ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL);
80DEVICE_ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL);
81
82/*
83 * PCI Bus Class 46 * PCI Bus Class
84 */ 47 */
85static void release_pcibus_dev(struct device *dev) 48static void release_pcibus_dev(struct device *dev)
@@ -95,6 +58,7 @@ static void release_pcibus_dev(struct device *dev)
95static struct class pcibus_class = { 58static struct class pcibus_class = {
96 .name = "pci_bus", 59 .name = "pci_bus",
97 .dev_release = &release_pcibus_dev, 60 .dev_release = &release_pcibus_dev,
61 .dev_attrs = pcibus_dev_attrs,
98}; 62};
99 63
100static int __init pcibus_class_init(void) 64static int __init pcibus_class_init(void)
@@ -1455,9 +1419,6 @@ struct pci_bus * pci_create_bus(struct device *parent,
1455 error = device_register(&b->dev); 1419 error = device_register(&b->dev);
1456 if (error) 1420 if (error)
1457 goto class_dev_reg_err; 1421 goto class_dev_reg_err;
1458 error = device_create_file(&b->dev, &dev_attr_cpuaffinity);
1459 if (error)
1460 goto dev_create_file_err;
1461 1422
1462 /* Create legacy_io and legacy_mem files for this bus */ 1423 /* Create legacy_io and legacy_mem files for this bus */
1463 pci_create_legacy_files(b); 1424 pci_create_legacy_files(b);
@@ -1468,8 +1429,6 @@ struct pci_bus * pci_create_bus(struct device *parent,
1468 1429
1469 return b; 1430 return b;
1470 1431
1471dev_create_file_err:
1472 device_unregister(&b->dev);
1473class_dev_reg_err: 1432class_dev_reg_err:
1474 device_unregister(dev); 1433 device_unregister(dev);
1475dev_reg_err: 1434dev_reg_err:
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 5129ed6d8fa7..e8a140669f90 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -606,7 +606,7 @@ static void __devinit ich6_lpc_acpi_gpio(struct pci_dev *dev)
606 } 606 }
607 607
608 pci_read_config_byte(dev, ICH6_GPIO_CNTL, &enable); 608 pci_read_config_byte(dev, ICH6_GPIO_CNTL, &enable);
609 if (enable & ICH4_GPIO_EN) { 609 if (enable & ICH6_GPIO_EN) {
610 pci_read_config_dword(dev, ICH6_GPIOBASE, &region); 610 pci_read_config_dword(dev, ICH6_GPIOBASE, &region);
611 region &= PCI_BASE_ADDRESS_IO_MASK; 611 region &= PCI_BASE_ADDRESS_IO_MASK;
612 if (region >= PCIBIOS_MIN_IO) 612 if (region >= PCIBIOS_MIN_IO)
@@ -681,7 +681,7 @@ static void __devinit ich7_lpc_generic_decode(struct pci_dev *dev, unsigned reg,
681/* ICH7-10 has the same common LPC generic IO decode registers */ 681/* ICH7-10 has the same common LPC generic IO decode registers */
682static void __devinit quirk_ich7_lpc(struct pci_dev *dev) 682static void __devinit quirk_ich7_lpc(struct pci_dev *dev)
683{ 683{
684 /* We share the common ACPI/DPIO decode with ICH6 */ 684 /* We share the common ACPI/GPIO decode with ICH6 */
685 ich6_lpc_acpi_gpio(dev); 685 ich6_lpc_acpi_gpio(dev);
686 686
687 /* And have 4 ICH7+ generic decodes */ 687 /* And have 4 ICH7+ generic decodes */
@@ -2349,8 +2349,11 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE,
2349 */ 2349 */
2350static void __devinit nvenet_msi_disable(struct pci_dev *dev) 2350static void __devinit nvenet_msi_disable(struct pci_dev *dev)
2351{ 2351{
2352 if (dmi_name_in_vendors("P5N32-SLI PREMIUM") || 2352 const char *board_name = dmi_get_system_info(DMI_BOARD_NAME);
2353 dmi_name_in_vendors("P5N32-E SLI")) { 2353
2354 if (board_name &&
2355 (strstr(board_name, "P5N32-SLI PREMIUM") ||
2356 strstr(board_name, "P5N32-E SLI"))) {
2354 dev_info(&dev->dev, 2357 dev_info(&dev->dev,
2355 "Disabling msi for MCP55 NIC on P5N32-SLI\n"); 2358 "Disabling msi for MCP55 NIC on P5N32-SLI\n");
2356 dev->no_msi = 1; 2359 dev->no_msi = 1;
@@ -2784,6 +2787,16 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x342e, vtd_mask_spec_errors);
2784DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors); 2787DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors);
2785#endif 2788#endif
2786 2789
2790static void __devinit fixup_ti816x_class(struct pci_dev* dev)
2791{
2792 /* TI 816x devices do not have class code set when in PCIe boot mode */
2793 if (dev->class == PCI_CLASS_NOT_DEFINED) {
2794 dev_info(&dev->dev, "Setting PCI class for 816x PCIe device\n");
2795 dev->class = PCI_CLASS_MULTIMEDIA_VIDEO;
2796 }
2797}
2798DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_TI, 0xb800, fixup_ti816x_class);
2799
2787static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, 2800static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
2788 struct pci_fixup *end) 2801 struct pci_fixup *end)
2789{ 2802{
diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c
index 176615e7231f..7f87beed35ac 100644
--- a/drivers/pci/remove.c
+++ b/drivers/pci/remove.c
@@ -73,8 +73,6 @@ void pci_remove_bus(struct pci_bus *pci_bus)
73 return; 73 return;
74 74
75 pci_remove_legacy_files(pci_bus); 75 pci_remove_legacy_files(pci_bus);
76 device_remove_file(&pci_bus->dev, &dev_attr_cpuaffinity);
77 device_remove_file(&pci_bus->dev, &dev_attr_cpulistaffinity);
78 device_unregister(&pci_bus->dev); 76 device_unregister(&pci_bus->dev);
79} 77}
80EXPORT_SYMBOL(pci_remove_bus); 78EXPORT_SYMBOL(pci_remove_bus);
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index a806cb321d2e..1e9e5a5b8c81 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -991,30 +991,139 @@ static void pci_bus_dump_resources(struct pci_bus *bus)
991 } 991 }
992} 992}
993 993
994static int __init pci_bus_get_depth(struct pci_bus *bus)
995{
996 int depth = 0;
997 struct pci_dev *dev;
998
999 list_for_each_entry(dev, &bus->devices, bus_list) {
1000 int ret;
1001 struct pci_bus *b = dev->subordinate;
1002 if (!b)
1003 continue;
1004
1005 ret = pci_bus_get_depth(b);
1006 if (ret + 1 > depth)
1007 depth = ret + 1;
1008 }
1009
1010 return depth;
1011}
1012static int __init pci_get_max_depth(void)
1013{
1014 int depth = 0;
1015 struct pci_bus *bus;
1016
1017 list_for_each_entry(bus, &pci_root_buses, node) {
1018 int ret;
1019
1020 ret = pci_bus_get_depth(bus);
1021 if (ret > depth)
1022 depth = ret;
1023 }
1024
1025 return depth;
1026}
1027
1028/*
1029 * first try will not touch pci bridge res
1030 * second and later try will clear small leaf bridge res
1031 * will stop till to the max deepth if can not find good one
1032 */
994void __init 1033void __init
995pci_assign_unassigned_resources(void) 1034pci_assign_unassigned_resources(void)
996{ 1035{
997 struct pci_bus *bus; 1036 struct pci_bus *bus;
998 struct resource_list_x add_list; /* list of resources that 1037 struct resource_list_x add_list; /* list of resources that
999 want additional resources */ 1038 want additional resources */
1039 int tried_times = 0;
1040 enum release_type rel_type = leaf_only;
1041 struct resource_list_x head, *list;
1042 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
1043 IORESOURCE_PREFETCH;
1044 unsigned long failed_type;
1045 int max_depth = pci_get_max_depth();
1046 int pci_try_num;
1047
1048
1049 head.next = NULL;
1000 add_list.next = NULL; 1050 add_list.next = NULL;
1051
1052 pci_try_num = max_depth + 1;
1053 printk(KERN_DEBUG "PCI: max bus depth: %d pci_try_num: %d\n",
1054 max_depth, pci_try_num);
1055
1056again:
1001 /* Depth first, calculate sizes and alignments of all 1057 /* Depth first, calculate sizes and alignments of all
1002 subordinate buses. */ 1058 subordinate buses. */
1003 list_for_each_entry(bus, &pci_root_buses, node) { 1059 list_for_each_entry(bus, &pci_root_buses, node)
1004 __pci_bus_size_bridges(bus, &add_list); 1060 __pci_bus_size_bridges(bus, &add_list);
1005 }
1006 1061
1007 /* Depth last, allocate resources and update the hardware. */ 1062 /* Depth last, allocate resources and update the hardware. */
1008 list_for_each_entry(bus, &pci_root_buses, node) { 1063 list_for_each_entry(bus, &pci_root_buses, node)
1009 __pci_bus_assign_resources(bus, &add_list, NULL); 1064 __pci_bus_assign_resources(bus, &add_list, &head);
1010 pci_enable_bridges(bus);
1011 }
1012 BUG_ON(add_list.next); 1065 BUG_ON(add_list.next);
1066 tried_times++;
1067
1068 /* any device complain? */
1069 if (!head.next)
1070 goto enable_and_dump;
1071 failed_type = 0;
1072 for (list = head.next; list;) {
1073 failed_type |= list->flags;
1074 list = list->next;
1075 }
1076 /*
1077 * io port are tight, don't try extra
1078 * or if reach the limit, don't want to try more
1079 */
1080 failed_type &= type_mask;
1081 if ((failed_type == IORESOURCE_IO) || (tried_times >= pci_try_num)) {
1082 free_list(resource_list_x, &head);
1083 goto enable_and_dump;
1084 }
1085
1086 printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
1087 tried_times + 1);
1088
1089 /* third times and later will not check if it is leaf */
1090 if ((tried_times + 1) > 2)
1091 rel_type = whole_subtree;
1092
1093 /*
1094 * Try to release leaf bridge's resources that doesn't fit resource of
1095 * child device under that bridge
1096 */
1097 for (list = head.next; list;) {
1098 bus = list->dev->bus;
1099 pci_bus_release_bridge_resources(bus, list->flags & type_mask,
1100 rel_type);
1101 list = list->next;
1102 }
1103 /* restore size and flags */
1104 for (list = head.next; list;) {
1105 struct resource *res = list->res;
1106
1107 res->start = list->start;
1108 res->end = list->end;
1109 res->flags = list->flags;
1110 if (list->dev->subordinate)
1111 res->flags = 0;
1112
1113 list = list->next;
1114 }
1115 free_list(resource_list_x, &head);
1116
1117 goto again;
1118
1119enable_and_dump:
1120 /* Depth last, update the hardware. */
1121 list_for_each_entry(bus, &pci_root_buses, node)
1122 pci_enable_bridges(bus);
1013 1123
1014 /* dump the resource on buses */ 1124 /* dump the resource on buses */
1015 list_for_each_entry(bus, &pci_root_buses, node) { 1125 list_for_each_entry(bus, &pci_root_buses, node)
1016 pci_bus_dump_resources(bus); 1126 pci_bus_dump_resources(bus);
1017 }
1018} 1127}
1019 1128
1020void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge) 1129void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index b9c3299c6a55..31ebb59cbd2f 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -517,6 +517,7 @@ struct kvm_assigned_dev_kernel {
517 struct kvm *kvm; 517 struct kvm *kvm;
518 spinlock_t intx_lock; 518 spinlock_t intx_lock;
519 char irq_name[32]; 519 char irq_name[32];
520 struct pci_saved_state *pci_saved_state;
520}; 521};
521 522
522struct kvm_irq_mask_notifier { 523struct kvm_irq_mask_notifier {
diff --git a/include/linux/pci-aspm.h b/include/linux/pci-aspm.h
index 67cb3ae38016..7cea7b6c1413 100644
--- a/include/linux/pci-aspm.h
+++ b/include/linux/pci-aspm.h
@@ -28,6 +28,7 @@ extern void pcie_aspm_exit_link_state(struct pci_dev *pdev);
28extern void pcie_aspm_pm_state_change(struct pci_dev *pdev); 28extern void pcie_aspm_pm_state_change(struct pci_dev *pdev);
29extern void pcie_aspm_powersave_config_link(struct pci_dev *pdev); 29extern void pcie_aspm_powersave_config_link(struct pci_dev *pdev);
30extern void pci_disable_link_state(struct pci_dev *pdev, int state); 30extern void pci_disable_link_state(struct pci_dev *pdev, int state);
31extern void pci_disable_link_state_locked(struct pci_dev *pdev, int state);
31extern void pcie_clear_aspm(void); 32extern void pcie_clear_aspm(void);
32extern void pcie_no_aspm(void); 33extern void pcie_no_aspm(void);
33#else 34#else
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 96f70d7e058d..4604d1d5514d 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -214,12 +214,17 @@ enum pci_bus_speed {
214 PCI_SPEED_UNKNOWN = 0xff, 214 PCI_SPEED_UNKNOWN = 0xff,
215}; 215};
216 216
217struct pci_cap_saved_state { 217struct pci_cap_saved_data {
218 struct hlist_node next;
219 char cap_nr; 218 char cap_nr;
219 unsigned int size;
220 u32 data[0]; 220 u32 data[0];
221}; 221};
222 222
223struct pci_cap_saved_state {
224 struct hlist_node next;
225 struct pci_cap_saved_data cap;
226};
227
223struct pcie_link_state; 228struct pcie_link_state;
224struct pci_vpd; 229struct pci_vpd;
225struct pci_sriov; 230struct pci_sriov;
@@ -366,7 +371,7 @@ static inline struct pci_cap_saved_state *pci_find_saved_cap(
366 struct hlist_node *pos; 371 struct hlist_node *pos;
367 372
368 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) { 373 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
369 if (tmp->cap_nr == cap) 374 if (tmp->cap.cap_nr == cap)
370 return tmp; 375 return tmp;
371 } 376 }
372 return NULL; 377 return NULL;
@@ -807,6 +812,10 @@ size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
807/* Power management related routines */ 812/* Power management related routines */
808int pci_save_state(struct pci_dev *dev); 813int pci_save_state(struct pci_dev *dev);
809void pci_restore_state(struct pci_dev *dev); 814void pci_restore_state(struct pci_dev *dev);
815struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
816int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state);
817int pci_load_and_free_saved_state(struct pci_dev *dev,
818 struct pci_saved_state **state);
810int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state); 819int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
811int pci_set_power_state(struct pci_dev *dev, pci_power_t state); 820int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
812pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); 821pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
@@ -828,6 +837,23 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
828 return __pci_enable_wake(dev, state, false, enable); 837 return __pci_enable_wake(dev, state, false, enable);
829} 838}
830 839
840#define PCI_EXP_IDO_REQUEST (1<<0)
841#define PCI_EXP_IDO_COMPLETION (1<<1)
842void pci_enable_ido(struct pci_dev *dev, unsigned long type);
843void pci_disable_ido(struct pci_dev *dev, unsigned long type);
844
845enum pci_obff_signal_type {
846 PCI_EXP_OBFF_SIGNAL_L0,
847 PCI_EXP_OBFF_SIGNAL_ALWAYS,
848};
849int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type);
850void pci_disable_obff(struct pci_dev *dev);
851
852bool pci_ltr_supported(struct pci_dev *dev);
853int pci_enable_ltr(struct pci_dev *dev);
854void pci_disable_ltr(struct pci_dev *dev);
855int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns);
856
831/* For use by arch with custom probe code */ 857/* For use by arch with custom probe code */
832void set_pcie_port_type(struct pci_dev *pdev); 858void set_pcie_port_type(struct pci_dev *pdev);
833void set_pcie_hotplug_bridge(struct pci_dev *pdev); 859void set_pcie_hotplug_bridge(struct pci_dev *pdev);
@@ -1207,6 +1233,23 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1207 return 0; 1233 return 0;
1208} 1234}
1209 1235
1236static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type)
1237{
1238}
1239
1240static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type)
1241{
1242}
1243
1244static inline int pci_enable_obff(struct pci_dev *dev, unsigned long type)
1245{
1246 return 0;
1247}
1248
1249static inline void pci_disable_obff(struct pci_dev *dev)
1250{
1251}
1252
1210static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) 1253static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1211{ 1254{
1212 return -EIO; 1255 return -EIO;
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 8652a4fa3fe2..24787b751286 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2483,6 +2483,8 @@
2483#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f 2483#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
2484#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40 2484#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40
2485#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1 0x1d41 2485#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1 0x1d41
2486#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e40
2487#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f
2486#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN 0x2310 2488#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN 0x2310
2487#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX 0x231f 2489#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX 0x231f
2488#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 2490#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index be01380f798a..e8840964aca1 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -508,8 +508,18 @@
508#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */ 508#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */
509#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */ 509#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
510#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */ 510#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
511#define PCI_EXP_DEVCAP2_LTR 0x800 /* Latency tolerance reporting */
512#define PCI_EXP_OBFF_MASK 0xc0000 /* OBFF support mechanism */
513#define PCI_EXP_OBFF_MSG 0x40000 /* New message signaling */
514#define PCI_EXP_OBFF_WAKE 0x80000 /* Re-use WAKE# for OBFF */
511#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */ 515#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
512#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */ 516#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
517#define PCI_EXP_IDO_REQ_EN 0x100 /* ID-based ordering request enable */
518#define PCI_EXP_IDO_CMP_EN 0x200 /* ID-based ordering completion enable */
519#define PCI_EXP_LTR_EN 0x400 /* Latency tolerance reporting */
520#define PCI_EXP_OBFF_MSGA_EN 0x2000 /* OBFF enable with Message type A */
521#define PCI_EXP_OBFF_MSGB_EN 0x4000 /* OBFF enable with Message type B */
522#define PCI_EXP_OBFF_WAKE_EN 0x6000 /* OBFF using WAKE# signaling */
513#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ 523#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
514#define PCI_EXP_SLTCTL2 56 /* Slot Control 2 */ 524#define PCI_EXP_SLTCTL2 56 /* Slot Control 2 */
515 525
@@ -527,6 +537,7 @@
527#define PCI_EXT_CAP_ID_ARI 14 537#define PCI_EXT_CAP_ID_ARI 14
528#define PCI_EXT_CAP_ID_ATS 15 538#define PCI_EXT_CAP_ID_ATS 15
529#define PCI_EXT_CAP_ID_SRIOV 16 539#define PCI_EXT_CAP_ID_SRIOV 16
540#define PCI_EXT_CAP_ID_LTR 24
530 541
531/* Advanced Error Reporting */ 542/* Advanced Error Reporting */
532#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */ 543#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */
@@ -683,6 +694,12 @@
683#define PCI_SRIOV_VFM_MO 0x2 /* Active.MigrateOut */ 694#define PCI_SRIOV_VFM_MO 0x2 /* Active.MigrateOut */
684#define PCI_SRIOV_VFM_AV 0x3 /* Active.Available */ 695#define PCI_SRIOV_VFM_AV 0x3 /* Active.Available */
685 696
697#define PCI_LTR_MAX_SNOOP_LAT 0x4
698#define PCI_LTR_MAX_NOSNOOP_LAT 0x6
699#define PCI_LTR_VALUE_MASK 0x000003ff
700#define PCI_LTR_SCALE_MASK 0x00001c00
701#define PCI_LTR_SCALE_SHIFT 10
702
686/* Access Control Service */ 703/* Access Control Service */
687#define PCI_ACS_CAP 0x04 /* ACS Capability Register */ 704#define PCI_ACS_CAP 0x04 /* ACS Capability Register */
688#define PCI_ACS_SV 0x01 /* Source Validation */ 705#define PCI_ACS_SV 0x01 /* Source Validation */
diff --git a/virt/kvm/assigned-dev.c b/virt/kvm/assigned-dev.c
index ae72ae604c89..6cc4b97ec458 100644
--- a/virt/kvm/assigned-dev.c
+++ b/virt/kvm/assigned-dev.c
@@ -197,8 +197,13 @@ static void kvm_free_assigned_device(struct kvm *kvm,
197{ 197{
198 kvm_free_assigned_irq(kvm, assigned_dev); 198 kvm_free_assigned_irq(kvm, assigned_dev);
199 199
200 __pci_reset_function(assigned_dev->dev); 200 pci_reset_function(assigned_dev->dev);
201 pci_restore_state(assigned_dev->dev); 201 if (pci_load_and_free_saved_state(assigned_dev->dev,
202 &assigned_dev->pci_saved_state))
203 printk(KERN_INFO "%s: Couldn't reload %s saved state\n",
204 __func__, dev_name(&assigned_dev->dev->dev));
205 else
206 pci_restore_state(assigned_dev->dev);
202 207
203 pci_release_regions(assigned_dev->dev); 208 pci_release_regions(assigned_dev->dev);
204 pci_disable_device(assigned_dev->dev); 209 pci_disable_device(assigned_dev->dev);
@@ -516,7 +521,10 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
516 521
517 pci_reset_function(dev); 522 pci_reset_function(dev);
518 pci_save_state(dev); 523 pci_save_state(dev);
519 524 match->pci_saved_state = pci_store_saved_state(dev);
525 if (!match->pci_saved_state)
526 printk(KERN_DEBUG "%s: Couldn't store %s saved state\n",
527 __func__, dev_name(&dev->dev));
520 match->assigned_dev_id = assigned_dev->assigned_dev_id; 528 match->assigned_dev_id = assigned_dev->assigned_dev_id;
521 match->host_segnr = assigned_dev->segnr; 529 match->host_segnr = assigned_dev->segnr;
522 match->host_busnr = assigned_dev->busnr; 530 match->host_busnr = assigned_dev->busnr;
@@ -546,7 +554,9 @@ out:
546 mutex_unlock(&kvm->lock); 554 mutex_unlock(&kvm->lock);
547 return r; 555 return r;
548out_list_del: 556out_list_del:
549 pci_restore_state(dev); 557 if (pci_load_and_free_saved_state(dev, &match->pci_saved_state))
558 printk(KERN_INFO "%s: Couldn't reload %s saved state\n",
559 __func__, dev_name(&dev->dev));
550 list_del(&match->list); 560 list_del(&match->list);
551 pci_release_regions(dev); 561 pci_release_regions(dev);
552out_disable: 562out_disable:
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-27 07:16:45 -0400