1 files changed, 7 insertions, 7 deletions

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index c85b0d8ee727..370cd5ad111c 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -67,6 +67,7 @@ static unsigned int fmax = 515633;
  * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register
  * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl
  *                   register
+ * @datactrl_mask_sdio: SDIO enable mask in datactrl register
  * @pwrreg_powerup: power up value for MMCIPOWER register
  * @f_max: maximum clk frequency supported by the controller.
  * @signal_direction: input/out direction of bus signals can be indicated
@@ -88,6 +89,7 @@ struct variant_data {
         unsigned int            fifohalfsize;
         unsigned int            data_cmd_enable;
         unsigned int            datactrl_mask_ddrmode;
+        unsigned int            datactrl_mask_sdio;
         bool                    sdio;
         bool                    st_clkdiv;
         bool                    blksz_datactrl16;
@@ -136,6 +138,7 @@ static struct variant_data variant_u300 = {
         .clkreg_enable          = MCI_ST_U300_HWFCEN,
         .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS,
         .datalength_bits        = 16,
+        .datactrl_mask_sdio     = MCI_ST_DPSM_SDIOEN,
         .sdio                   = true,
         .pwrreg_powerup         = MCI_PWR_ON,
         .f_max                  = 100000000,
@@ -149,6 +152,7 @@ static struct variant_data variant_nomadik = {
         .fifohalfsize           = 8 * 4,
         .clkreg                 = MCI_CLK_ENABLE,
         .datalength_bits        = 24,
+        .datactrl_mask_sdio     = MCI_ST_DPSM_SDIOEN,
         .sdio                   = true,
         .st_clkdiv              = true,
         .pwrreg_powerup         = MCI_PWR_ON,
@@ -166,6 +170,7 @@ static struct variant_data variant_ux500 = {
         .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS,
         .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE,
         .datalength_bits        = 24,
+        .datactrl_mask_sdio     = MCI_ST_DPSM_SDIOEN,
         .sdio                   = true,
         .st_clkdiv              = true,
         .pwrreg_powerup         = MCI_PWR_ON,
@@ -185,6 +190,7 @@ static struct variant_data variant_ux500v2 = {
         .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE,
         .datactrl_mask_ddrmode  = MCI_ST_DPSM_DDRMODE,
         .datalength_bits        = 24,
+        .datactrl_mask_sdio     = MCI_ST_DPSM_SDIOEN,
         .sdio                   = true,
         .st_clkdiv              = true,
         .blksz_datactrl16       = true,
@@ -808,16 +814,10 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
         if (data->flags & MMC_DATA_READ)
                 datactrl |= MCI_DPSM_DIRECTION;
 
-        /* The ST Micro variants has a special bit to enable SDIO */
         if (variant->sdio && host->mmc->card)
                 if (mmc_card_sdio(host->mmc->card)) {
-                        /*
-                         * The ST Micro variants has a special bit
-                         * to enable SDIO.
-                         */
                         u32 clk;
-
-                        datactrl |= MCI_ST_DPSM_SDIOEN;
+                        datactrl |= variant->datactrl_mask_sdio;
 
                         /*
                          * The ST Micro variant for SDIO small write transfers