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-rw-r--r--arch/powerpc/platforms/pseries/Makefile2
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c295
-rw-r--r--arch/powerpc/platforms/pseries/eeh_cache.c317
-rw-r--r--include/asm-powerpc/ppc-pci.h8
4 files changed, 328 insertions, 294 deletions
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index 0b7d5cb64177..61616d144072 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -4,7 +4,7 @@ obj-$(CONFIG_SMP) += smp.o
4obj-$(CONFIG_IBMVIO) += vio.o 4obj-$(CONFIG_IBMVIO) += vio.o
5obj-$(CONFIG_XICS) += xics.o 5obj-$(CONFIG_XICS) += xics.o
6obj-$(CONFIG_SCANLOG) += scanlog.o 6obj-$(CONFIG_SCANLOG) += scanlog.o
7obj-$(CONFIG_EEH) += eeh.o eeh_driver.o eeh_event.o 7obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o
8 8
9obj-$(CONFIG_HVC_CONSOLE) += hvconsole.o 9obj-$(CONFIG_HVC_CONSOLE) += hvconsole.o
10obj-$(CONFIG_HVCS) += hvcserver.o 10obj-$(CONFIG_HVCS) += hvcserver.o
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index d6560c45637b..57bef2c2f325 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -76,9 +76,6 @@
76 */ 76 */
77#define EEH_MAX_FAILS 100000 77#define EEH_MAX_FAILS 100000
78 78
79/* Misc forward declaraions */
80static void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn);
81
82/* RTAS tokens */ 79/* RTAS tokens */
83static int ibm_set_eeh_option; 80static int ibm_set_eeh_option;
84static int ibm_set_slot_reset; 81static int ibm_set_slot_reset;
@@ -107,296 +104,8 @@ static DEFINE_PER_CPU(unsigned long, false_positives);
107static DEFINE_PER_CPU(unsigned long, ignored_failures); 104static DEFINE_PER_CPU(unsigned long, ignored_failures);
108static DEFINE_PER_CPU(unsigned long, slot_resets); 105static DEFINE_PER_CPU(unsigned long, slot_resets);
109 106
110/**
111 * The pci address cache subsystem. This subsystem places
112 * PCI device address resources into a red-black tree, sorted
113 * according to the address range, so that given only an i/o
114 * address, the corresponding PCI device can be **quickly**
115 * found. It is safe to perform an address lookup in an interrupt
116 * context; this ability is an important feature.
117 *
118 * Currently, the only customer of this code is the EEH subsystem;
119 * thus, this code has been somewhat tailored to suit EEH better.
120 * In particular, the cache does *not* hold the addresses of devices
121 * for which EEH is not enabled.
122 *
123 * (Implementation Note: The RB tree seems to be better/faster
124 * than any hash algo I could think of for this problem, even
125 * with the penalty of slow pointer chases for d-cache misses).
126 */
127struct pci_io_addr_range
128{
129 struct rb_node rb_node;
130 unsigned long addr_lo;
131 unsigned long addr_hi;
132 struct pci_dev *pcidev;
133 unsigned int flags;
134};
135
136static struct pci_io_addr_cache
137{
138 struct rb_root rb_root;
139 spinlock_t piar_lock;
140} pci_io_addr_cache_root;
141
142static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
143{
144 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
145
146 while (n) {
147 struct pci_io_addr_range *piar;
148 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
149
150 if (addr < piar->addr_lo) {
151 n = n->rb_left;
152 } else {
153 if (addr > piar->addr_hi) {
154 n = n->rb_right;
155 } else {
156 pci_dev_get(piar->pcidev);
157 return piar->pcidev;
158 }
159 }
160 }
161
162 return NULL;
163}
164
165/**
166 * pci_get_device_by_addr - Get device, given only address
167 * @addr: mmio (PIO) phys address or i/o port number
168 *
169 * Given an mmio phys address, or a port number, find a pci device
170 * that implements this address. Be sure to pci_dev_put the device
171 * when finished. I/O port numbers are assumed to be offset
172 * from zero (that is, they do *not* have pci_io_addr added in).
173 * It is safe to call this function within an interrupt.
174 */
175static struct pci_dev *pci_get_device_by_addr(unsigned long addr)
176{
177 struct pci_dev *dev;
178 unsigned long flags;
179
180 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
181 dev = __pci_get_device_by_addr(addr);
182 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
183 return dev;
184}
185
186#ifdef DEBUG
187/*
188 * Handy-dandy debug print routine, does nothing more
189 * than print out the contents of our addr cache.
190 */
191static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
192{
193 struct rb_node *n;
194 int cnt = 0;
195
196 n = rb_first(&cache->rb_root);
197 while (n) {
198 struct pci_io_addr_range *piar;
199 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
200 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
201 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
202 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
203 cnt++;
204 n = rb_next(n);
205 }
206}
207#endif
208
209/* Insert address range into the rb tree. */
210static struct pci_io_addr_range *
211pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
212 unsigned long ahi, unsigned int flags)
213{
214 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
215 struct rb_node *parent = NULL;
216 struct pci_io_addr_range *piar;
217
218 /* Walk tree, find a place to insert into tree */
219 while (*p) {
220 parent = *p;
221 piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
222 if (ahi < piar->addr_lo) {
223 p = &parent->rb_left;
224 } else if (alo > piar->addr_hi) {
225 p = &parent->rb_right;
226 } else {
227 if (dev != piar->pcidev ||
228 alo != piar->addr_lo || ahi != piar->addr_hi) {
229 printk(KERN_WARNING "PIAR: overlapping address range\n");
230 }
231 return piar;
232 }
233 }
234 piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
235 if (!piar)
236 return NULL;
237
238 piar->addr_lo = alo;
239 piar->addr_hi = ahi;
240 piar->pcidev = dev;
241 piar->flags = flags;
242
243#ifdef DEBUG
244 printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
245 alo, ahi, pci_name (dev));
246#endif
247
248 rb_link_node(&piar->rb_node, parent, p);
249 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
250
251 return piar;
252}
253
254static void __pci_addr_cache_insert_device(struct pci_dev *dev)
255{
256 struct device_node *dn;
257 struct pci_dn *pdn;
258 int i;
259 int inserted = 0;
260
261 dn = pci_device_to_OF_node(dev);
262 if (!dn) {
263 printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
264 return;
265 }
266
267 /* Skip any devices for which EEH is not enabled. */
268 pdn = PCI_DN(dn);
269 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
270 pdn->eeh_mode & EEH_MODE_NOCHECK) {
271#ifdef DEBUG
272 printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
273 pci_name(dev), pdn->node->full_name);
274#endif
275 return;
276 }
277
278 /* The cache holds a reference to the device... */
279 pci_dev_get(dev);
280
281 /* Walk resources on this device, poke them into the tree */
282 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
283 unsigned long start = pci_resource_start(dev,i);
284 unsigned long end = pci_resource_end(dev,i);
285 unsigned int flags = pci_resource_flags(dev,i);
286
287 /* We are interested only bus addresses, not dma or other stuff */
288 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
289 continue;
290 if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
291 continue;
292 pci_addr_cache_insert(dev, start, end, flags);
293 inserted = 1;
294 }
295
296 /* If there was nothing to add, the cache has no reference... */
297 if (!inserted)
298 pci_dev_put(dev);
299}
300
301/**
302 * pci_addr_cache_insert_device - Add a device to the address cache
303 * @dev: PCI device whose I/O addresses we are interested in.
304 *
305 * In order to support the fast lookup of devices based on addresses,
306 * we maintain a cache of devices that can be quickly searched.
307 * This routine adds a device to that cache.
308 */
309static void pci_addr_cache_insert_device(struct pci_dev *dev)
310{
311 unsigned long flags;
312
313 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
314 __pci_addr_cache_insert_device(dev);
315 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
316}
317
318static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
319{
320 struct rb_node *n;
321 int removed = 0;
322
323restart:
324 n = rb_first(&pci_io_addr_cache_root.rb_root);
325 while (n) {
326 struct pci_io_addr_range *piar;
327 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
328
329 if (piar->pcidev == dev) {
330 rb_erase(n, &pci_io_addr_cache_root.rb_root);
331 removed = 1;
332 kfree(piar);
333 goto restart;
334 }
335 n = rb_next(n);
336 }
337
338 /* The cache no longer holds its reference to this device... */
339 if (removed)
340 pci_dev_put(dev);
341}
342
343/**
344 * pci_addr_cache_remove_device - remove pci device from addr cache
345 * @dev: device to remove
346 *
347 * Remove a device from the addr-cache tree.
348 * This is potentially expensive, since it will walk
349 * the tree multiple times (once per resource).
350 * But so what; device removal doesn't need to be that fast.
351 */
352static void pci_addr_cache_remove_device(struct pci_dev *dev)
353{
354 unsigned long flags;
355
356 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
357 __pci_addr_cache_remove_device(dev);
358 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
359}
360
361/**
362 * pci_addr_cache_build - Build a cache of I/O addresses
363 *
364 * Build a cache of pci i/o addresses. This cache will be used to
365 * find the pci device that corresponds to a given address.
366 * This routine scans all pci busses to build the cache.
367 * Must be run late in boot process, after the pci controllers
368 * have been scaned for devices (after all device resources are known).
369 */
370void __init pci_addr_cache_build(void)
371{
372 struct device_node *dn;
373 struct pci_dev *dev = NULL;
374
375 if (!eeh_subsystem_enabled)
376 return;
377
378 spin_lock_init(&pci_io_addr_cache_root.piar_lock);
379
380 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
381 /* Ignore PCI bridges ( XXX why ??) */
382 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) {
383 continue;
384 }
385 pci_addr_cache_insert_device(dev);
386
387 /* Save the BAR's; firmware doesn't restore these after EEH reset */
388 dn = pci_device_to_OF_node(dev);
389 eeh_save_bars(dev, PCI_DN(dn));
390 }
391
392#ifdef DEBUG
393 /* Verify tree built up above, echo back the list of addrs. */
394 pci_addr_cache_print(&pci_io_addr_cache_root);
395#endif
396}
397
398/* --------------------------------------------------------------- */ 107/* --------------------------------------------------------------- */
399/* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */ 108/* Below lies the EEH event infrastructure */
400 109
401void eeh_slot_error_detail (struct pci_dn *pdn, int severity) 110void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
402{ 111{
@@ -880,7 +589,7 @@ void eeh_restore_bars(struct pci_dn *pdn)
880 * PCI devices are added individuallly; but, for the restore, 589 * PCI devices are added individuallly; but, for the restore,
881 * an entire slot is reset at a time. 590 * an entire slot is reset at a time.
882 */ 591 */
883static void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn) 592void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn)
884{ 593{
885 int i; 594 int i;
886 595
diff --git a/arch/powerpc/platforms/pseries/eeh_cache.c b/arch/powerpc/platforms/pseries/eeh_cache.c
new file mode 100644
index 000000000000..9fe2a7de04c0
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/eeh_cache.c
@@ -0,0 +1,317 @@
1/*
2 * eeh_cache.c
3 * PCI address cache; allows the lookup of PCI devices based on I/O address
4 *
5 * Copyright (C) 2004 Linas Vepstas <linas@austin.ibm.com> IBM Corporation
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/list.h>
23#include <linux/pci.h>
24#include <linux/rbtree.h>
25#include <linux/spinlock.h>
26#include <asm/atomic.h>
27#include <asm/pci-bridge.h>
28#include <asm/ppc-pci.h>
29#include <asm/systemcfg.h>
30
31#undef DEBUG
32
33/**
34 * The pci address cache subsystem. This subsystem places
35 * PCI device address resources into a red-black tree, sorted
36 * according to the address range, so that given only an i/o
37 * address, the corresponding PCI device can be **quickly**
38 * found. It is safe to perform an address lookup in an interrupt
39 * context; this ability is an important feature.
40 *
41 * Currently, the only customer of this code is the EEH subsystem;
42 * thus, this code has been somewhat tailored to suit EEH better.
43 * In particular, the cache does *not* hold the addresses of devices
44 * for which EEH is not enabled.
45 *
46 * (Implementation Note: The RB tree seems to be better/faster
47 * than any hash algo I could think of for this problem, even
48 * with the penalty of slow pointer chases for d-cache misses).
49 */
50struct pci_io_addr_range
51{
52 struct rb_node rb_node;
53 unsigned long addr_lo;
54 unsigned long addr_hi;
55 struct pci_dev *pcidev;
56 unsigned int flags;
57};
58
59static struct pci_io_addr_cache
60{
61 struct rb_root rb_root;
62 spinlock_t piar_lock;
63} pci_io_addr_cache_root;
64
65static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
66{
67 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
68
69 while (n) {
70 struct pci_io_addr_range *piar;
71 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
72
73 if (addr < piar->addr_lo) {
74 n = n->rb_left;
75 } else {
76 if (addr > piar->addr_hi) {
77 n = n->rb_right;
78 } else {
79 pci_dev_get(piar->pcidev);
80 return piar->pcidev;
81 }
82 }
83 }
84
85 return NULL;
86}
87
88/**
89 * pci_get_device_by_addr - Get device, given only address
90 * @addr: mmio (PIO) phys address or i/o port number
91 *
92 * Given an mmio phys address, or a port number, find a pci device
93 * that implements this address. Be sure to pci_dev_put the device
94 * when finished. I/O port numbers are assumed to be offset
95 * from zero (that is, they do *not* have pci_io_addr added in).
96 * It is safe to call this function within an interrupt.
97 */
98struct pci_dev *pci_get_device_by_addr(unsigned long addr)
99{
100 struct pci_dev *dev;
101 unsigned long flags;
102
103 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
104 dev = __pci_get_device_by_addr(addr);
105 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
106 return dev;
107}
108
109#ifdef DEBUG
110/*
111 * Handy-dandy debug print routine, does nothing more
112 * than print out the contents of our addr cache.
113 */
114static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
115{
116 struct rb_node *n;
117 int cnt = 0;
118
119 n = rb_first(&cache->rb_root);
120 while (n) {
121 struct pci_io_addr_range *piar;
122 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
123 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
124 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
125 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
126 cnt++;
127 n = rb_next(n);
128 }
129}
130#endif
131
132/* Insert address range into the rb tree. */
133static struct pci_io_addr_range *
134pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
135 unsigned long ahi, unsigned int flags)
136{
137 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
138 struct rb_node *parent = NULL;
139 struct pci_io_addr_range *piar;
140
141 /* Walk tree, find a place to insert into tree */
142 while (*p) {
143 parent = *p;
144 piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
145 if (ahi < piar->addr_lo) {
146 p = &parent->rb_left;
147 } else if (alo > piar->addr_hi) {
148 p = &parent->rb_right;
149 } else {
150 if (dev != piar->pcidev ||
151 alo != piar->addr_lo || ahi != piar->addr_hi) {
152 printk(KERN_WARNING "PIAR: overlapping address range\n");
153 }
154 return piar;
155 }
156 }
157 piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
158 if (!piar)
159 return NULL;
160
161 piar->addr_lo = alo;
162 piar->addr_hi = ahi;
163 piar->pcidev = dev;
164 piar->flags = flags;
165
166#ifdef DEBUG
167 printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
168 alo, ahi, pci_name (dev));
169#endif
170
171 rb_link_node(&piar->rb_node, parent, p);
172 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
173
174 return piar;
175}
176
177static void __pci_addr_cache_insert_device(struct pci_dev *dev)
178{
179 struct device_node *dn;
180 struct pci_dn *pdn;
181 int i;
182 int inserted = 0;
183
184 dn = pci_device_to_OF_node(dev);
185 if (!dn) {
186 printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
187 return;
188 }
189
190 /* Skip any devices for which EEH is not enabled. */
191 pdn = PCI_DN(dn);
192 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
193 pdn->eeh_mode & EEH_MODE_NOCHECK) {
194#ifdef DEBUG
195 printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
196 pci_name(dev), pdn->node->full_name);
197#endif
198 return;
199 }
200
201 /* The cache holds a reference to the device... */
202 pci_dev_get(dev);
203
204 /* Walk resources on this device, poke them into the tree */
205 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
206 unsigned long start = pci_resource_start(dev,i);
207 unsigned long end = pci_resource_end(dev,i);
208 unsigned int flags = pci_resource_flags(dev,i);
209
210 /* We are interested only bus addresses, not dma or other stuff */
211 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
212 continue;
213 if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
214 continue;
215 pci_addr_cache_insert(dev, start, end, flags);
216 inserted = 1;
217 }
218
219 /* If there was nothing to add, the cache has no reference... */
220 if (!inserted)
221 pci_dev_put(dev);
222}
223
224/**
225 * pci_addr_cache_insert_device - Add a device to the address cache
226 * @dev: PCI device whose I/O addresses we are interested in.
227 *
228 * In order to support the fast lookup of devices based on addresses,
229 * we maintain a cache of devices that can be quickly searched.
230 * This routine adds a device to that cache.
231 */
232void pci_addr_cache_insert_device(struct pci_dev *dev)
233{
234 unsigned long flags;
235
236 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
237 __pci_addr_cache_insert_device(dev);
238 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
239}
240
241static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
242{
243 struct rb_node *n;
244 int removed = 0;
245
246restart:
247 n = rb_first(&pci_io_addr_cache_root.rb_root);
248 while (n) {
249 struct pci_io_addr_range *piar;
250 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
251
252 if (piar->pcidev == dev) {
253 rb_erase(n, &pci_io_addr_cache_root.rb_root);
254 removed = 1;
255 kfree(piar);
256 goto restart;
257 }
258 n = rb_next(n);
259 }
260
261 /* The cache no longer holds its reference to this device... */
262 if (removed)
263 pci_dev_put(dev);
264}
265
266/**
267 * pci_addr_cache_remove_device - remove pci device from addr cache
268 * @dev: device to remove
269 *
270 * Remove a device from the addr-cache tree.
271 * This is potentially expensive, since it will walk
272 * the tree multiple times (once per resource).
273 * But so what; device removal doesn't need to be that fast.
274 */
275void pci_addr_cache_remove_device(struct pci_dev *dev)
276{
277 unsigned long flags;
278
279 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
280 __pci_addr_cache_remove_device(dev);
281 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
282}
283
284/**
285 * pci_addr_cache_build - Build a cache of I/O addresses
286 *
287 * Build a cache of pci i/o addresses. This cache will be used to
288 * find the pci device that corresponds to a given address.
289 * This routine scans all pci busses to build the cache.
290 * Must be run late in boot process, after the pci controllers
291 * have been scaned for devices (after all device resources are known).
292 */
293void __init pci_addr_cache_build(void)
294{
295 struct device_node *dn;
296 struct pci_dev *dev = NULL;
297
298 spin_lock_init(&pci_io_addr_cache_root.piar_lock);
299
300 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
301 /* Ignore PCI bridges */
302 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
303 continue;
304
305 pci_addr_cache_insert_device(dev);
306
307 /* Save the BAR's; firmware doesn't restore these after EEH reset */
308 dn = pci_device_to_OF_node(dev);
309 eeh_save_bars(dev, PCI_DN(dn));
310 }
311
312#ifdef DEBUG
313 /* Verify tree built up above, echo back the list of addrs. */
314 pci_addr_cache_print(&pci_io_addr_cache_root);
315#endif
316}
317
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index caf67a3bcb78..79239a200f18 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -52,6 +52,14 @@ extern unsigned long pci_probe_only;
52 52
53/* ---- EEH internal-use-only related routines ---- */ 53/* ---- EEH internal-use-only related routines ---- */
54#ifdef CONFIG_EEH 54#ifdef CONFIG_EEH
55
56void pci_addr_cache_insert_device(struct pci_dev *dev);
57void pci_addr_cache_remove_device(struct pci_dev *dev);
58void pci_addr_cache_build(void);
59struct pci_dev *pci_get_device_by_addr(unsigned long addr);
60
61void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn);
62
55/** 63/**
56 * eeh_slot_error_detail -- record and EEH error condition to the log 64 * eeh_slot_error_detail -- record and EEH error condition to the log
57 * @severity: 1 if temporary, 2 if permanent failure. 65 * @severity: 1 if temporary, 2 if permanent failure.
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 07:24:54 -0500