diff options
| -rw-r--r-- | arch/arm/boot/dts/imx25-pinfunc.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx25-pinfunc.h b/arch/arm/boot/dts/imx25-pinfunc.h index 58f3ae3544b5..7c4b9f2f9aad 100644 --- a/arch/arm/boot/dts/imx25-pinfunc.h +++ b/arch/arm/boot/dts/imx25-pinfunc.h | |||
| @@ -154,20 +154,25 @@ | |||
| 154 | #define MX25_PAD_D15__D15 0x088 0x280 0x000 0x00 0x000 | 154 | #define MX25_PAD_D15__D15 0x088 0x280 0x000 0x00 0x000 |
| 155 | #define MX25_PAD_D15__LD16 0x088 0x280 0x000 0x01 0x000 | 155 | #define MX25_PAD_D15__LD16 0x088 0x280 0x000 0x01 0x000 |
| 156 | #define MX25_PAD_D15__GPIO_4_5 0x088 0x280 0x000 0x05 0x000 | 156 | #define MX25_PAD_D15__GPIO_4_5 0x088 0x280 0x000 0x05 0x000 |
| 157 | #define MX25_PAD_D15__SDHC1_DAT7 0x088 0x280 0x4d8 0x06 0x000 | ||
| 157 | 158 | ||
| 158 | #define MX25_PAD_D14__D14 0x08c 0x284 0x000 0x00 0x000 | 159 | #define MX25_PAD_D14__D14 0x08c 0x284 0x000 0x00 0x000 |
| 159 | #define MX25_PAD_D14__LD17 0x08c 0x284 0x000 0x01 0x000 | 160 | #define MX25_PAD_D14__LD17 0x08c 0x284 0x000 0x01 0x000 |
| 160 | #define MX25_PAD_D14__GPIO_4_6 0x08c 0x284 0x000 0x05 0x000 | 161 | #define MX25_PAD_D14__GPIO_4_6 0x08c 0x284 0x000 0x05 0x000 |
| 162 | #define MX25_PAD_D14__SDHC1_DAT6 0x08c 0x284 0x4d4 0x06 0x000 | ||
| 161 | 163 | ||
| 162 | #define MX25_PAD_D13__D13 0x090 0x288 0x000 0x00 0x000 | 164 | #define MX25_PAD_D13__D13 0x090 0x288 0x000 0x00 0x000 |
| 163 | #define MX25_PAD_D13__LD18 0x090 0x288 0x000 0x01 0x000 | 165 | #define MX25_PAD_D13__LD18 0x090 0x288 0x000 0x01 0x000 |
| 164 | #define MX25_PAD_D13__GPIO_4_7 0x090 0x288 0x000 0x05 0x000 | 166 | #define MX25_PAD_D13__GPIO_4_7 0x090 0x288 0x000 0x05 0x000 |
| 167 | #define MX25_PAD_D13__SDHC1_DAT5 0x090 0x288 0x4d0 0x06 0x000 | ||
| 165 | 168 | ||
| 166 | #define MX25_PAD_D12__D12 0x094 0x28c 0x000 0x00 0x000 | 169 | #define MX25_PAD_D12__D12 0x094 0x28c 0x000 0x00 0x000 |
| 167 | #define MX25_PAD_D12__GPIO_4_8 0x094 0x28c 0x000 0x05 0x000 | 170 | #define MX25_PAD_D12__GPIO_4_8 0x094 0x28c 0x000 0x05 0x000 |
| 171 | #define MX25_PAD_D12__SDHC1_DAT4 0x094 0x28c 0x4cc 0x06 0x000 | ||
| 168 | 172 | ||
| 169 | #define MX25_PAD_D11__D11 0x098 0x290 0x000 0x00 0x000 | 173 | #define MX25_PAD_D11__D11 0x098 0x290 0x000 0x00 0x000 |
| 170 | #define MX25_PAD_D11__GPIO_4_9 0x098 0x290 0x000 0x05 0x000 | 174 | #define MX25_PAD_D11__GPIO_4_9 0x098 0x290 0x000 0x05 0x000 |
| 175 | #define MX25_PAD_D11__USBOTG_PWR 0x098 0x290 0x000 0x06 0x000 | ||
| 171 | 176 | ||
| 172 | #define MX25_PAD_D10__D10 0x09c 0x294 0x000 0x00 0x000 | 177 | #define MX25_PAD_D10__D10 0x09c 0x294 0x000 0x00 0x000 |
| 173 | #define MX25_PAD_D10__GPIO_4_10 0x09c 0x294 0x000 0x05 0x000 | 178 | #define MX25_PAD_D10__GPIO_4_10 0x09c 0x294 0x000 0x05 0x000 |
| @@ -233,26 +238,33 @@ | |||
| 233 | 238 | ||
| 234 | #define MX25_PAD_LD8__LD8 0x0e8 0x2e0 0x000 0x10 0x000 | 239 | #define MX25_PAD_LD8__LD8 0x0e8 0x2e0 0x000 0x10 0x000 |
| 235 | #define MX25_PAD_LD8__FEC_TX_ERR 0x0e8 0x2e0 0x000 0x15 0x000 | 240 | #define MX25_PAD_LD8__FEC_TX_ERR 0x0e8 0x2e0 0x000 0x15 0x000 |
| 241 | #define MX25_PAD_LD8__SDHC2_CMD 0x0e8 0x2e0 0x4e0 0x06 0x000 | ||
| 236 | 242 | ||
| 237 | #define MX25_PAD_LD9__LD9 0x0ec 0x2e4 0x000 0x10 0x000 | 243 | #define MX25_PAD_LD9__LD9 0x0ec 0x2e4 0x000 0x10 0x000 |
| 238 | #define MX25_PAD_LD9__FEC_COL 0x0ec 0x2e4 0x504 0x15 0x001 | 244 | #define MX25_PAD_LD9__FEC_COL 0x0ec 0x2e4 0x504 0x15 0x001 |
| 245 | #define MX25_PAD_LD9__SDHC2_CLK 0x0ec 0x2e4 0x4dc 0x06 0x000 | ||
| 239 | 246 | ||
| 240 | #define MX25_PAD_LD10__LD10 0x0f0 0x2e8 0x000 0x10 0x000 | 247 | #define MX25_PAD_LD10__LD10 0x0f0 0x2e8 0x000 0x10 0x000 |
| 241 | #define MX25_PAD_LD10__FEC_RX_ERR 0x0f0 0x2e8 0x518 0x15 0x001 | 248 | #define MX25_PAD_LD10__FEC_RX_ERR 0x0f0 0x2e8 0x518 0x15 0x001 |
| 242 | 249 | ||
| 243 | #define MX25_PAD_LD11__LD11 0x0f4 0x2ec 0x000 0x10 0x000 | 250 | #define MX25_PAD_LD11__LD11 0x0f4 0x2ec 0x000 0x10 0x000 |
| 244 | #define MX25_PAD_LD11__FEC_RDATA2 0x0f4 0x2ec 0x50c 0x15 0x001 | 251 | #define MX25_PAD_LD11__FEC_RDATA2 0x0f4 0x2ec 0x50c 0x15 0x001 |
| 252 | #define MX25_PAD_LD11__SDHC2_DAT1 0x0f4 0x2ec 0x4e8 0x06 0x000 | ||
| 245 | 253 | ||
| 246 | #define MX25_PAD_LD12__LD12 0x0f8 0x2f0 0x000 0x10 0x000 | 254 | #define MX25_PAD_LD12__LD12 0x0f8 0x2f0 0x000 0x10 0x000 |
| 255 | #define MX25_PAD_LD12__CSPI2_MOSI 0x0f8 0x2f0 0x4a0 0x02 0x000 | ||
| 247 | #define MX25_PAD_LD12__FEC_RDATA3 0x0f8 0x2f0 0x510 0x15 0x001 | 256 | #define MX25_PAD_LD12__FEC_RDATA3 0x0f8 0x2f0 0x510 0x15 0x001 |
| 248 | 257 | ||
| 249 | #define MX25_PAD_LD13__LD13 0x0fc 0x2f4 0x000 0x10 0x000 | 258 | #define MX25_PAD_LD13__LD13 0x0fc 0x2f4 0x000 0x10 0x000 |
| 259 | #define MX25_PAD_LD13__CSPI2_MISO 0x0fc 0x2f4 0x49c 0x02 0x000 | ||
| 250 | #define MX25_PAD_LD13__FEC_TDATA2 0x0fc 0x2f4 0x000 0x15 0x000 | 260 | #define MX25_PAD_LD13__FEC_TDATA2 0x0fc 0x2f4 0x000 0x15 0x000 |
| 251 | 261 | ||
| 252 | #define MX25_PAD_LD14__LD14 0x100 0x2f8 0x000 0x10 0x000 | 262 | #define MX25_PAD_LD14__LD14 0x100 0x2f8 0x000 0x10 0x000 |
| 263 | #define MX25_PAD_LD14__CSPI2_SCLK 0x100 0x2f8 0x494 0x02 0x000 | ||
| 253 | #define MX25_PAD_LD14__FEC_TDATA3 0x100 0x2f8 0x000 0x15 0x000 | 264 | #define MX25_PAD_LD14__FEC_TDATA3 0x100 0x2f8 0x000 0x15 0x000 |
| 254 | 265 | ||
| 255 | #define MX25_PAD_LD15__LD15 0x104 0x2fc 0x000 0x10 0x000 | 266 | #define MX25_PAD_LD15__LD15 0x104 0x2fc 0x000 0x10 0x000 |
| 267 | #define MX25_PAD_LD15__CSPI2_RDY 0x104 0x2fc 0x498 0x02 0x000 | ||
| 256 | #define MX25_PAD_LD15__FEC_RX_CLK 0x104 0x2fc 0x514 0x15 0x001 | 268 | #define MX25_PAD_LD15__FEC_RX_CLK 0x104 0x2fc 0x514 0x15 0x001 |
| 257 | 269 | ||
| 258 | #define MX25_PAD_HSYNC__HSYNC 0x108 0x300 0x000 0x10 0x000 | 270 | #define MX25_PAD_HSYNC__HSYNC 0x108 0x300 0x000 0x10 0x000 |
| @@ -265,6 +277,7 @@ | |||
| 265 | #define MX25_PAD_LSCLK__GPIO_1_24 0x110 0x308 0x000 0x15 0x000 | 277 | #define MX25_PAD_LSCLK__GPIO_1_24 0x110 0x308 0x000 0x15 0x000 |
| 266 | 278 | ||
| 267 | #define MX25_PAD_OE_ACD__OE_ACD 0x114 0x30c 0x000 0x10 0x000 | 279 | #define MX25_PAD_OE_ACD__OE_ACD 0x114 0x30c 0x000 0x10 0x000 |
| 280 | #define MX25_PAD_OE_ACD__CSPI2_SS0 0x114 0x30c 0x4a4 0x02 0x000 | ||
| 268 | #define MX25_PAD_OE_ACD__GPIO_1_25 0x114 0x30c 0x000 0x15 0x000 | 281 | #define MX25_PAD_OE_ACD__GPIO_1_25 0x114 0x30c 0x000 0x15 0x000 |
| 269 | 282 | ||
| 270 | #define MX25_PAD_CONTRAST__CONTRAST 0x118 0x310 0x000 0x10 0x000 | 283 | #define MX25_PAD_CONTRAST__CONTRAST 0x118 0x310 0x000 0x10 0x000 |
| @@ -278,26 +291,31 @@ | |||
| 278 | 291 | ||
| 279 | #define MX25_PAD_CSI_D2__CSI_D2 0x120 0x318 0x000 0x10 0x000 | 292 | #define MX25_PAD_CSI_D2__CSI_D2 0x120 0x318 0x000 0x10 0x000 |
| 280 | #define MX25_PAD_CSI_D2__UART5_RXD_MUX 0x120 0x318 0x578 0x11 0x001 | 293 | #define MX25_PAD_CSI_D2__UART5_RXD_MUX 0x120 0x318 0x578 0x11 0x001 |
| 294 | #define MX25_PAD_CSI_D2__SIM1_CLK0 0x120 0x318 0x000 0x04 0x000 | ||
| 281 | #define MX25_PAD_CSI_D2__GPIO_1_27 0x120 0x318 0x000 0x15 0x000 | 295 | #define MX25_PAD_CSI_D2__GPIO_1_27 0x120 0x318 0x000 0x15 0x000 |
| 282 | #define MX25_PAD_CSI_D2__CSPI3_MOSI 0x120 0x318 0x000 0x17 0x000 | 296 | #define MX25_PAD_CSI_D2__CSPI3_MOSI 0x120 0x318 0x000 0x17 0x000 |
| 283 | 297 | ||
| 284 | #define MX25_PAD_CSI_D3__CSI_D3 0x124 0x31c 0x000 0x10 0x000 | 298 | #define MX25_PAD_CSI_D3__CSI_D3 0x124 0x31c 0x000 0x10 0x000 |
| 285 | #define MX25_PAD_CSI_D3__UART5_TXD_MUX 0x124 0x31c 0x000 0x11 0x000 | 299 | #define MX25_PAD_CSI_D3__UART5_TXD_MUX 0x124 0x31c 0x000 0x11 0x000 |
| 300 | #define MX25_PAD_CSI_D3__SIM1_RST0 0x124 0x31c 0x000 0x04 0x000 | ||
| 286 | #define MX25_PAD_CSI_D3__GPIO_1_28 0x124 0x31c 0x000 0x15 0x000 | 301 | #define MX25_PAD_CSI_D3__GPIO_1_28 0x124 0x31c 0x000 0x15 0x000 |
| 287 | #define MX25_PAD_CSI_D3__CSPI3_MISO 0x124 0x31c 0x4b4 0x17 0x001 | 302 | #define MX25_PAD_CSI_D3__CSPI3_MISO 0x124 0x31c 0x4b4 0x17 0x001 |
| 288 | 303 | ||
| 289 | #define MX25_PAD_CSI_D4__CSI_D4 0x128 0x320 0x000 0x10 0x000 | 304 | #define MX25_PAD_CSI_D4__CSI_D4 0x128 0x320 0x000 0x10 0x000 |
| 290 | #define MX25_PAD_CSI_D4__UART5_RTS 0x128 0x320 0x574 0x11 0x001 | 305 | #define MX25_PAD_CSI_D4__UART5_RTS 0x128 0x320 0x574 0x11 0x001 |
| 306 | #define MX25_PAD_CSI_D4__SIM1_VEN0 0x128 0x320 0x000 0x04 0x000 | ||
| 291 | #define MX25_PAD_CSI_D4__GPIO_1_29 0x128 0x320 0x000 0x15 0x000 | 307 | #define MX25_PAD_CSI_D4__GPIO_1_29 0x128 0x320 0x000 0x15 0x000 |
| 292 | #define MX25_PAD_CSI_D4__CSPI3_SCLK 0x128 0x320 0x000 0x17 0x000 | 308 | #define MX25_PAD_CSI_D4__CSPI3_SCLK 0x128 0x320 0x000 0x17 0x000 |
| 293 | 309 | ||
| 294 | #define MX25_PAD_CSI_D5__CSI_D5 0x12c 0x324 0x000 0x10 0x000 | 310 | #define MX25_PAD_CSI_D5__CSI_D5 0x12c 0x324 0x000 0x10 0x000 |
| 295 | #define MX25_PAD_CSI_D5__UART5_CTS 0x12c 0x324 0x000 0x11 0x000 | 311 | #define MX25_PAD_CSI_D5__UART5_CTS 0x12c 0x324 0x000 0x11 0x000 |
| 312 | #define MX25_PAD_CSI_D5__SIM1_TX0 0x12c 0x324 0x000 0x04 0x000 | ||
| 296 | #define MX25_PAD_CSI_D5__GPIO_1_30 0x12c 0x324 0x000 0x15 0x000 | 313 | #define MX25_PAD_CSI_D5__GPIO_1_30 0x12c 0x324 0x000 0x15 0x000 |
| 297 | #define MX25_PAD_CSI_D5__CSPI3_RDY 0x12c 0x324 0x000 0x17 0x000 | 314 | #define MX25_PAD_CSI_D5__CSPI3_RDY 0x12c 0x324 0x000 0x17 0x000 |
| 298 | 315 | ||
| 299 | #define MX25_PAD_CSI_D6__CSI_D6 0x130 0x328 0x000 0x10 0x000 | 316 | #define MX25_PAD_CSI_D6__CSI_D6 0x130 0x328 0x000 0x10 0x000 |
| 300 | #define MX25_PAD_CSI_D6__SDHC2_CMD 0x130 0x328 0x4e0 0x12 0x001 | 317 | #define MX25_PAD_CSI_D6__SDHC2_CMD 0x130 0x328 0x4e0 0x12 0x001 |
| 318 | #define MX25_PAD_CSI_D6__SIM1_PD0 0x130 0x328 0x000 0x04 0x000 | ||
| 301 | #define MX25_PAD_CSI_D6__GPIO_1_31 0x130 0x328 0x000 0x15 0x000 | 319 | #define MX25_PAD_CSI_D6__GPIO_1_31 0x130 0x328 0x000 0x15 0x000 |
| 302 | 320 | ||
| 303 | #define MX25_PAD_CSI_D7__CSI_D7 0x134 0x32c 0x000 0x10 0x000 | 321 | #define MX25_PAD_CSI_D7__CSI_D7 0x134 0x32c 0x000 0x10 0x000 |
| @@ -476,9 +494,18 @@ | |||
| 476 | #define MX25_PAD_FEC_RDATA0__GPIO_3_10 0x1dc 0x3d4 0x000 0x15 0x000 | 494 | #define MX25_PAD_FEC_RDATA0__GPIO_3_10 0x1dc 0x3d4 0x000 0x15 0x000 |
| 477 | 495 | ||
| 478 | #define MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x1e0 0x3d8 0x000 0x10 0x000 | 496 | #define MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x1e0 0x3d8 0x000 0x10 0x000 |
| 497 | /* | ||
| 498 | * According to the i.MX25 Reference manual (IMX25RM, Rev. 2, | ||
| 499 | * 01/2011) this is CAN1_TX but that's wrong. | ||
| 500 | */ | ||
| 501 | #define MX25_PAD_FEC_RDATA1__CAN2_TX 0x1e0 0x3d8 0x000 0x14 0x000 | ||
| 479 | #define MX25_PAD_FEC_RDATA1__GPIO_3_11 0x1e0 0x3d8 0x000 0x15 0x000 | 502 | #define MX25_PAD_FEC_RDATA1__GPIO_3_11 0x1e0 0x3d8 0x000 0x15 0x000 |
| 480 | 503 | ||
| 481 | #define MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x1e4 0x3dc 0x000 0x10 0x000 | 504 | #define MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x1e4 0x3dc 0x000 0x10 0x000 |
| 505 | /* | ||
| 506 | * According to the i.MX25 Reference manual (IMX25RM, Rev. 2, | ||
| 507 | * 01/2011) this is CAN1_RX but that's wrong. | ||
| 508 | */ | ||
| 482 | #define MX25_PAD_FEC_RX_DV__CAN2_RX 0x1e4 0x3dc 0x484 0x14 0x000 | 509 | #define MX25_PAD_FEC_RX_DV__CAN2_RX 0x1e4 0x3dc 0x484 0x14 0x000 |
| 483 | #define MX25_PAD_FEC_RX_DV__GPIO_3_12 0x1e4 0x3dc 0x000 0x15 0x000 | 510 | #define MX25_PAD_FEC_RX_DV__GPIO_3_12 0x1e4 0x3dc 0x000 0x15 0x000 |
| 484 | 511 | ||
| @@ -514,10 +541,12 @@ | |||
| 514 | #define MX25_PAD_GPIO_E__I2C3_CLK 0x204 0x400 0x524 0x11 0x002 | 541 | #define MX25_PAD_GPIO_E__I2C3_CLK 0x204 0x400 0x524 0x11 0x002 |
| 515 | #define MX25_PAD_GPIO_E__LD16 0x204 0x400 0x000 0x12 0x000 | 542 | #define MX25_PAD_GPIO_E__LD16 0x204 0x400 0x000 0x12 0x000 |
| 516 | #define MX25_PAD_GPIO_E__AUD7_TXD 0x204 0x400 0x000 0x14 0x000 | 543 | #define MX25_PAD_GPIO_E__AUD7_TXD 0x204 0x400 0x000 0x14 0x000 |
| 544 | #define MX25_PAD_GPIO_E__UART4_RXD 0x204 0x400 0x570 0x16 0x002 | ||
| 517 | 545 | ||
| 518 | #define MX25_PAD_GPIO_F__GPIO_F 0x208 0x404 0x000 0x10 0x000 | 546 | #define MX25_PAD_GPIO_F__GPIO_F 0x208 0x404 0x000 0x10 0x000 |
| 519 | #define MX25_PAD_GPIO_F__LD17 0x208 0x404 0x000 0x12 0x000 | 547 | #define MX25_PAD_GPIO_F__LD17 0x208 0x404 0x000 0x12 0x000 |
| 520 | #define MX25_PAD_GPIO_F__AUD7_TXC 0x208 0x404 0x000 0x14 0x000 | 548 | #define MX25_PAD_GPIO_F__AUD7_TXC 0x208 0x404 0x000 0x14 0x000 |
| 549 | #define MX25_PAD_GPIO_F__UART4_TXD 0x208 0x404 0x000 0x16 0x000 | ||
| 521 | 550 | ||
| 522 | #define MX25_PAD_EXT_ARMCLK__EXT_ARMCLK 0x20c 0x000 0x000 0x10 0x000 | 551 | #define MX25_PAD_EXT_ARMCLK__EXT_ARMCLK 0x20c 0x000 0x000 0x10 0x000 |
| 523 | #define MX25_PAD_EXT_ARMCLK__GPIO_3_15 0x20c 0x000 0x000 0x15 0x000 | 552 | #define MX25_PAD_EXT_ARMCLK__GPIO_3_15 0x20c 0x000 0x000 0x15 0x000 |