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-rw-r--r--arch/arm/boot/dts/r8a73a4.dtsi18
-rw-r--r--arch/arm/boot/dts/r8a7790-lager.dts83
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi86
-rw-r--r--arch/arm/boot/dts/r8a7791-koelsch.dts86
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi83
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi21
-rw-r--r--arch/arm/boot/dts/sh73a0-kzm9g-reference.dts4
-rw-r--r--arch/arm/boot/dts/sh73a0.dtsi10
-rw-r--r--include/dt-bindings/clock/r8a7790-clock.h2
-rw-r--r--include/dt-bindings/clock/r8a7791-clock.h2
-rw-r--r--include/dt-bindings/clock/r8a7794-clock.h9
11 files changed, 370 insertions, 34 deletions
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 7f57dc7f392a..5ac57babc3b9 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -106,7 +106,7 @@
106 i2c5: i2c@e60b0000 { 106 i2c5: i2c@e60b0000 {
107 #address-cells = <1>; 107 #address-cells = <1>;
108 #size-cells = <0>; 108 #size-cells = <0>;
109 compatible = "renesas,rmobile-iic"; 109 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
110 reg = <0 0xe60b0000 0 0x428>; 110 reg = <0 0xe60b0000 0 0x428>;
111 interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>; 111 interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
112 112
@@ -205,7 +205,7 @@
205 i2c0: i2c@e6500000 { 205 i2c0: i2c@e6500000 {
206 #address-cells = <1>; 206 #address-cells = <1>;
207 #size-cells = <0>; 207 #size-cells = <0>;
208 compatible = "renesas,rmobile-iic"; 208 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
209 reg = <0 0xe6500000 0 0x428>; 209 reg = <0 0xe6500000 0 0x428>;
210 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; 210 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
211 status = "disabled"; 211 status = "disabled";
@@ -214,7 +214,7 @@
214 i2c1: i2c@e6510000 { 214 i2c1: i2c@e6510000 {
215 #address-cells = <1>; 215 #address-cells = <1>;
216 #size-cells = <0>; 216 #size-cells = <0>;
217 compatible = "renesas,rmobile-iic"; 217 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
218 reg = <0 0xe6510000 0 0x428>; 218 reg = <0 0xe6510000 0 0x428>;
219 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; 219 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
220 status = "disabled"; 220 status = "disabled";
@@ -223,7 +223,7 @@
223 i2c2: i2c@e6520000 { 223 i2c2: i2c@e6520000 {
224 #address-cells = <1>; 224 #address-cells = <1>;
225 #size-cells = <0>; 225 #size-cells = <0>;
226 compatible = "renesas,rmobile-iic"; 226 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
227 reg = <0 0xe6520000 0 0x428>; 227 reg = <0 0xe6520000 0 0x428>;
228 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; 228 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
229 status = "disabled"; 229 status = "disabled";
@@ -232,7 +232,7 @@
232 i2c3: i2c@e6530000 { 232 i2c3: i2c@e6530000 {
233 #address-cells = <1>; 233 #address-cells = <1>;
234 #size-cells = <0>; 234 #size-cells = <0>;
235 compatible = "renesas,rmobile-iic"; 235 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
236 reg = <0 0xe6530000 0 0x428>; 236 reg = <0 0xe6530000 0 0x428>;
237 interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>; 237 interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
238 status = "disabled"; 238 status = "disabled";
@@ -241,7 +241,7 @@
241 i2c4: i2c@e6540000 { 241 i2c4: i2c@e6540000 {
242 #address-cells = <1>; 242 #address-cells = <1>;
243 #size-cells = <0>; 243 #size-cells = <0>;
244 compatible = "renesas,rmobile-iic"; 244 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
245 reg = <0 0xe6540000 0 0x428>; 245 reg = <0 0xe6540000 0 0x428>;
246 interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>; 246 interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
247 status = "disabled"; 247 status = "disabled";
@@ -250,7 +250,7 @@
250 i2c6: i2c@e6550000 { 250 i2c6: i2c@e6550000 {
251 #address-cells = <1>; 251 #address-cells = <1>;
252 #size-cells = <0>; 252 #size-cells = <0>;
253 compatible = "renesas,rmobile-iic"; 253 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
254 reg = <0 0xe6550000 0 0x428>; 254 reg = <0 0xe6550000 0 0x428>;
255 interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; 255 interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
256 status = "disabled"; 256 status = "disabled";
@@ -259,7 +259,7 @@
259 i2c7: i2c@e6560000 { 259 i2c7: i2c@e6560000 {
260 #address-cells = <1>; 260 #address-cells = <1>;
261 #size-cells = <0>; 261 #size-cells = <0>;
262 compatible = "renesas,rmobile-iic"; 262 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
263 reg = <0 0xe6560000 0 0x428>; 263 reg = <0 0xe6560000 0 0x428>;
264 interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; 264 interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
265 status = "disabled"; 265 status = "disabled";
@@ -268,7 +268,7 @@
268 i2c8: i2c@e6570000 { 268 i2c8: i2c@e6570000 {
269 #address-cells = <1>; 269 #address-cells = <1>;
270 #size-cells = <0>; 270 #size-cells = <0>;
271 compatible = "renesas,rmobile-iic"; 271 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
272 reg = <0 0xe6570000 0 0x428>; 272 reg = <0 0xe6570000 0 0x428>;
273 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; 273 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
274 status = "disabled"; 274 status = "disabled";
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index bd470bafdb99..636d53bb87a2 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -9,6 +9,34 @@
9 * kind, whether express or implied. 9 * kind, whether express or implied.
10 */ 10 */
11 11
12/*
13 * SSI-AK4643
14 *
15 * SW1: 1: AK4643
16 * 2: CN22
17 * 3: ADV7511
18 *
19 * This command is required when Playback/Capture
20 *
21 * amixer set "LINEOUT Mixer DACL" on
22 * amixer set "DVC Out" 100%
23 * amixer set "DVC In" 100%
24 *
25 * You can use Mute
26 *
27 * amixer set "DVC Out Mute" on
28 * amixer set "DVC In Mute" on
29 *
30 * You can use Volume Ramp
31 *
32 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
33 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
34 * amixer set "DVC Out Ramp" on
35 * aplay xxx.wav &
36 * amixer set "DVC Out" 80% // Volume Down
37 * amixer set "DVC Out" 100% // Volume Up
38 */
39
12/dts-v1/; 40/dts-v1/;
13#include "r8a7790.dtsi" 41#include "r8a7790.dtsi"
14#include <dt-bindings/gpio/gpio.h> 42#include <dt-bindings/gpio/gpio.h>
@@ -146,6 +174,23 @@
146 1800000 0>; 174 1800000 0>;
147 }; 175 };
148 176
177 sound {
178 compatible = "simple-audio-card";
179
180 simple-audio-card,format = "left_j";
181 simple-audio-card,bitclock-master = <&sndcodec>;
182 simple-audio-card,frame-master = <&sndcodec>;
183
184 sndcpu: simple-audio-card,cpu {
185 sound-dai = <&rcar_sound>;
186 };
187
188 sndcodec: simple-audio-card,codec {
189 sound-dai = <&ak4643>;
190 system-clock-frequency = <11289600>;
191 };
192 };
193
149 vga-encoder { 194 vga-encoder {
150 compatible = "adi,adv7123"; 195 compatible = "adi,adv7123";
151 196
@@ -292,6 +337,16 @@
292 renesas,groups = "vin1_data8", "vin1_clk"; 337 renesas,groups = "vin1_data8", "vin1_clk";
293 renesas,function = "vin1"; 338 renesas,function = "vin1";
294 }; 339 };
340
341 sound_pins: sound {
342 renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
343 renesas,function = "ssi";
344 };
345
346 sound_clk_pins: sound_clk {
347 renesas,groups = "audio_clk_a";
348 renesas,function = "audio_clk";
349 };
295}; 350};
296 351
297&ether { 352&ether {
@@ -429,6 +484,14 @@
429 pinctrl-0 = <&iic2_pins>; 484 pinctrl-0 = <&iic2_pins>;
430 pinctrl-names = "default"; 485 pinctrl-names = "default";
431 486
487 clock-frequency = <100000>;
488
489 ak4643: sound-codec@12 {
490 compatible = "asahi-kasei,ak4643";
491 #sound-dai-cells = <0>;
492 reg = <0x12>;
493 };
494
432 composite-in@20 { 495 composite-in@20 {
433 compatible = "adi,adv7180"; 496 compatible = "adi,adv7180";
434 reg = <0x20>; 497 reg = <0x20>;
@@ -511,3 +574,23 @@
511 }; 574 };
512 }; 575 };
513}; 576};
577
578&rcar_sound {
579 pinctrl-0 = <&sound_pins &sound_clk_pins>;
580 pinctrl-names = "default";
581
582 #sound-dai-cells = <0>;
583
584 status = "okay";
585
586 rcar_sound,dai {
587 dai0 {
588 playback = <&ssi0 &src2 &dvc0>;
589 capture = <&ssi1 &src3 &dvc1>;
590 };
591 };
592};
593
594&ssi1 {
595 shared-pin;
596};
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 69b7cd0e7fb3..c8f94a6eb136 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -312,6 +312,70 @@
312 #dma-cells = <1>; 312 #dma-cells = <1>;
313 dma-channels = <15>; 313 dma-channels = <15>;
314 }; 314 };
315
316 audma0: dma-controller@ec700000 {
317 compatible = "renesas,rcar-dmac";
318 reg = <0 0xec700000 0 0x10000>;
319 interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH
320 0 320 IRQ_TYPE_LEVEL_HIGH
321 0 321 IRQ_TYPE_LEVEL_HIGH
322 0 322 IRQ_TYPE_LEVEL_HIGH
323 0 323 IRQ_TYPE_LEVEL_HIGH
324 0 324 IRQ_TYPE_LEVEL_HIGH
325 0 325 IRQ_TYPE_LEVEL_HIGH
326 0 326 IRQ_TYPE_LEVEL_HIGH
327 0 327 IRQ_TYPE_LEVEL_HIGH
328 0 328 IRQ_TYPE_LEVEL_HIGH
329 0 329 IRQ_TYPE_LEVEL_HIGH
330 0 330 IRQ_TYPE_LEVEL_HIGH
331 0 331 IRQ_TYPE_LEVEL_HIGH
332 0 332 IRQ_TYPE_LEVEL_HIGH>;
333 interrupt-names = "error",
334 "ch0", "ch1", "ch2", "ch3",
335 "ch4", "ch5", "ch6", "ch7",
336 "ch8", "ch9", "ch10", "ch11",
337 "ch12";
338 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
339 clock-names = "fck";
340 #dma-cells = <1>;
341 dma-channels = <13>;
342 };
343
344 audma1: dma-controller@ec720000 {
345 compatible = "renesas,rcar-dmac";
346 reg = <0 0xec720000 0 0x10000>;
347 interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH
348 0 333 IRQ_TYPE_LEVEL_HIGH
349 0 334 IRQ_TYPE_LEVEL_HIGH
350 0 335 IRQ_TYPE_LEVEL_HIGH
351 0 336 IRQ_TYPE_LEVEL_HIGH
352 0 337 IRQ_TYPE_LEVEL_HIGH
353 0 338 IRQ_TYPE_LEVEL_HIGH
354 0 339 IRQ_TYPE_LEVEL_HIGH
355 0 340 IRQ_TYPE_LEVEL_HIGH
356 0 341 IRQ_TYPE_LEVEL_HIGH
357 0 342 IRQ_TYPE_LEVEL_HIGH
358 0 343 IRQ_TYPE_LEVEL_HIGH
359 0 344 IRQ_TYPE_LEVEL_HIGH
360 0 345 IRQ_TYPE_LEVEL_HIGH>;
361 interrupt-names = "error",
362 "ch0", "ch1", "ch2", "ch3",
363 "ch4", "ch5", "ch6", "ch7",
364 "ch8", "ch9", "ch10", "ch11",
365 "ch12";
366 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
367 clock-names = "fck";
368 #dma-cells = <1>;
369 dma-channels = <13>;
370 };
371
372 audmapp: dma-controller@ec740000 {
373 compatible = "renesas,rcar-audmapp";
374 #dma-cells = <1>;
375
376 reg = <0 0xec740000 0 0x200>;
377 };
378
315 i2c0: i2c@e6508000 { 379 i2c0: i2c@e6508000 {
316 #address-cells = <1>; 380 #address-cells = <1>;
317 #size-cells = <0>; 381 #size-cells = <0>;
@@ -359,6 +423,8 @@
359 reg = <0 0xe6500000 0 0x425>; 423 reg = <0 0xe6500000 0 0x425>;
360 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; 424 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
361 clocks = <&mstp3_clks R8A7790_CLK_IIC0>; 425 clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
426 dmas = <&dmac0 0x61>, <&dmac0 0x62>;
427 dma-names = "tx", "rx";
362 status = "disabled"; 428 status = "disabled";
363 }; 429 };
364 430
@@ -369,6 +435,8 @@
369 reg = <0 0xe6510000 0 0x425>; 435 reg = <0 0xe6510000 0 0x425>;
370 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; 436 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
371 clocks = <&mstp3_clks R8A7790_CLK_IIC1>; 437 clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
438 dmas = <&dmac0 0x65>, <&dmac0 0x66>;
439 dma-names = "tx", "rx";
372 status = "disabled"; 440 status = "disabled";
373 }; 441 };
374 442
@@ -379,6 +447,8 @@
379 reg = <0 0xe6520000 0 0x425>; 447 reg = <0 0xe6520000 0 0x425>;
380 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; 448 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
381 clocks = <&mstp3_clks R8A7790_CLK_IIC2>; 449 clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
450 dmas = <&dmac0 0x69>, <&dmac0 0x6a>;
451 dma-names = "tx", "rx";
382 status = "disabled"; 452 status = "disabled";
383 }; 453 };
384 454
@@ -389,6 +459,8 @@
389 reg = <0 0xe60b0000 0 0x425>; 459 reg = <0 0xe60b0000 0 0x425>;
390 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; 460 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
391 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>; 461 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
462 dmas = <&dmac0 0x77>, <&dmac0 0x78>;
463 dma-names = "tx", "rx";
392 status = "disabled"; 464 status = "disabled";
393 }; 465 };
394 466
@@ -1031,25 +1103,29 @@
1031 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; 1103 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1032 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, 1104 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
1033 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, 1105 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
1034 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>; 1106 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1107 <&hp_clk>, <&hp_clk>;
1035 #clock-cells = <1>; 1108 #clock-cells = <1>;
1036 renesas,clock-indices = < 1109 renesas,clock-indices = <
1037 R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 1110 R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
1038 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 1111 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
1039 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 1112 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
1113 R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
1040 >; 1114 >;
1041 clock-output-names = 1115 clock-output-names =
1042 "iic2", "tpu0", "mmcif1", "sdhi3", 1116 "iic2", "tpu0", "mmcif1", "sdhi3",
1043 "sdhi2", "sdhi1", "sdhi0", "mmcif0", 1117 "sdhi2", "sdhi1", "sdhi0", "mmcif0",
1044 "iic0", "pciec", "iic1", "ssusb", "cmt1"; 1118 "iic0", "pciec", "iic1", "ssusb", "cmt1",
1119 "usbdmac0", "usbdmac1";
1045 }; 1120 };
1046 mstp5_clks: mstp5_clks@e6150144 { 1121 mstp5_clks: mstp5_clks@e6150144 {
1047 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; 1122 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1048 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; 1123 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1049 clocks = <&extal_clk>, <&p_clk>; 1124 clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>;
1050 #clock-cells = <1>; 1125 #clock-cells = <1>;
1051 renesas,clock-indices = <R8A7790_CLK_THERMAL R8A7790_CLK_PWM>; 1126 renesas,clock-indices = <R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1
1052 clock-output-names = "thermal", "pwm"; 1127 R8A7790_CLK_THERMAL R8A7790_CLK_PWM>;
1128 clock-output-names = "audmac0", "audmac1", "thermal", "pwm";
1053 }; 1129 };
1054 mstp7_clks: mstp7_clks@e615014c { 1130 mstp7_clks: mstp7_clks@e615014c {
1055 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; 1131 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 0d0cde7e2c41..d6b5b8f23789 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -10,6 +10,34 @@
10 * kind, whether express or implied. 10 * kind, whether express or implied.
11 */ 11 */
12 12
13/*
14 * SSI-AK4643
15 *
16 * SW1: 1: AK4643
17 * 2: CN22
18 * 3: ADV7511
19 *
20 * This command is required when Playback/Capture
21 *
22 * amixer set "LINEOUT Mixer DACL" on
23 * amixer set "DVC Out" 100%
24 * amixer set "DVC In" 100%
25 *
26 * You can use Mute
27 *
28 * amixer set "DVC Out Mute" on
29 * amixer set "DVC In Mute" on
30 *
31 * You can use Volume Ramp
32 *
33 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
34 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
35 * amixer set "DVC Out Ramp" on
36 * aplay xxx.wav &
37 * amixer set "DVC Out" 80% // Volume Down
38 * amixer set "DVC Out" 100% // Volume Up
39 */
40
13/dts-v1/; 41/dts-v1/;
14#include "r8a7791.dtsi" 42#include "r8a7791.dtsi"
15#include <dt-bindings/gpio/gpio.h> 43#include <dt-bindings/gpio/gpio.h>
@@ -130,12 +158,15 @@
130 compatible = "gpio-leds"; 158 compatible = "gpio-leds";
131 led6 { 159 led6 {
132 gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; 160 gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
161 label = "LED6";
133 }; 162 };
134 led7 { 163 led7 {
135 gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; 164 gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
165 label = "LED7";
136 }; 166 };
137 led8 { 167 led8 {
138 gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; 168 gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
169 label = "LED8";
139 }; 170 };
140 }; 171 };
141 172
@@ -210,6 +241,23 @@
210 states = <3300000 1 241 states = <3300000 1
211 1800000 0>; 242 1800000 0>;
212 }; 243 };
244
245 sound {
246 compatible = "simple-audio-card";
247
248 simple-audio-card,format = "left_j";
249 simple-audio-card,bitclock-master = <&sndcodec>;
250 simple-audio-card,frame-master = <&sndcodec>;
251
252 sndcpu: simple-audio-card,cpu {
253 sound-dai = <&rcar_sound>;
254 };
255
256 sndcodec: simple-audio-card,codec {
257 sound-dai = <&ak4643>;
258 system-clock-frequency = <11289600>;
259 };
260 };
213}; 261};
214 262
215&du { 263&du {
@@ -300,6 +348,16 @@
300 renesas,groups = "vin1_data8", "vin1_clk"; 348 renesas,groups = "vin1_data8", "vin1_clk";
301 renesas,function = "vin1"; 349 renesas,function = "vin1";
302 }; 350 };
351
352 sound_pins: sound {
353 renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
354 renesas,function = "ssi";
355 };
356
357 sound_clk_pins: sound_clk {
358 renesas,groups = "audio_clk_a";
359 renesas,function = "audio_clk";
360 };
303}; 361};
304 362
305&ether { 363&ether {
@@ -425,7 +483,13 @@
425 pinctrl-names = "default"; 483 pinctrl-names = "default";
426 484
427 status = "okay"; 485 status = "okay";
428 clock-frequency = <400000>; 486 clock-frequency = <100000>;
487
488 ak4643: sound-codec@12 {
489 compatible = "asahi-kasei,ak4643";
490 #sound-dai-cells = <0>;
491 reg = <0x12>;
492 };
429 493
430 composite-in@20 { 494 composite-in@20 {
431 compatible = "adi,adv7180"; 495 compatible = "adi,adv7180";
@@ -513,3 +577,23 @@
513 }; 577 };
514 }; 578 };
515}; 579};
580
581&rcar_sound {
582 pinctrl-0 = <&sound_pins &sound_clk_pins>;
583 pinctrl-names = "default";
584
585 #sound-dai-cells = <0>;
586
587 status = "okay";
588
589 rcar_sound,dai {
590 dai0 {
591 playback = <&ssi0 &src2 &dvc0>;
592 capture = <&ssi1 &src3 &dvc1>;
593 };
594 };
595};
596
597&ssi1 {
598 shared-pin;
599};
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 9a57215f54f7..77c0beeb8d7c 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -301,6 +301,69 @@
301 dma-channels = <15>; 301 dma-channels = <15>;
302 }; 302 };
303 303
304 audma0: dma-controller@ec700000 {
305 compatible = "renesas,rcar-dmac";
306 reg = <0 0xec700000 0 0x10000>;
307 interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH
308 0 320 IRQ_TYPE_LEVEL_HIGH
309 0 321 IRQ_TYPE_LEVEL_HIGH
310 0 322 IRQ_TYPE_LEVEL_HIGH
311 0 323 IRQ_TYPE_LEVEL_HIGH
312 0 324 IRQ_TYPE_LEVEL_HIGH
313 0 325 IRQ_TYPE_LEVEL_HIGH
314 0 326 IRQ_TYPE_LEVEL_HIGH
315 0 327 IRQ_TYPE_LEVEL_HIGH
316 0 328 IRQ_TYPE_LEVEL_HIGH
317 0 329 IRQ_TYPE_LEVEL_HIGH
318 0 330 IRQ_TYPE_LEVEL_HIGH
319 0 331 IRQ_TYPE_LEVEL_HIGH
320 0 332 IRQ_TYPE_LEVEL_HIGH>;
321 interrupt-names = "error",
322 "ch0", "ch1", "ch2", "ch3",
323 "ch4", "ch5", "ch6", "ch7",
324 "ch8", "ch9", "ch10", "ch11",
325 "ch12";
326 clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>;
327 clock-names = "fck";
328 #dma-cells = <1>;
329 dma-channels = <13>;
330 };
331
332 audma1: dma-controller@ec720000 {
333 compatible = "renesas,rcar-dmac";
334 reg = <0 0xec720000 0 0x10000>;
335 interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH
336 0 333 IRQ_TYPE_LEVEL_HIGH
337 0 334 IRQ_TYPE_LEVEL_HIGH
338 0 335 IRQ_TYPE_LEVEL_HIGH
339 0 336 IRQ_TYPE_LEVEL_HIGH
340 0 337 IRQ_TYPE_LEVEL_HIGH
341 0 338 IRQ_TYPE_LEVEL_HIGH
342 0 339 IRQ_TYPE_LEVEL_HIGH
343 0 340 IRQ_TYPE_LEVEL_HIGH
344 0 341 IRQ_TYPE_LEVEL_HIGH
345 0 342 IRQ_TYPE_LEVEL_HIGH
346 0 343 IRQ_TYPE_LEVEL_HIGH
347 0 344 IRQ_TYPE_LEVEL_HIGH
348 0 345 IRQ_TYPE_LEVEL_HIGH>;
349 interrupt-names = "error",
350 "ch0", "ch1", "ch2", "ch3",
351 "ch4", "ch5", "ch6", "ch7",
352 "ch8", "ch9", "ch10", "ch11",
353 "ch12";
354 clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>;
355 clock-names = "fck";
356 #dma-cells = <1>;
357 dma-channels = <13>;
358 };
359
360 audmapp: dma-controller@ec740000 {
361 compatible = "renesas,rcar-audmapp";
362 #dma-cells = <1>;
363
364 reg = <0 0xec740000 0 0x200>;
365 };
366
304 /* The memory map in the User's Manual maps the cores to bus numbers */ 367 /* The memory map in the User's Manual maps the cores to bus numbers */
305 i2c0: i2c@e6508000 { 368 i2c0: i2c@e6508000 {
306 #address-cells = <1>; 369 #address-cells = <1>;
@@ -371,6 +434,8 @@
371 reg = <0 0xe60b0000 0 0x425>; 434 reg = <0 0xe60b0000 0 0x425>;
372 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; 435 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
373 clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>; 436 clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
437 dmas = <&dmac0 0x77>, <&dmac0 0x78>;
438 dma-names = "tx", "rx";
374 status = "disabled"; 439 status = "disabled";
375 }; 440 };
376 441
@@ -381,6 +446,8 @@
381 reg = <0 0xe6500000 0 0x425>; 446 reg = <0 0xe6500000 0 0x425>;
382 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; 447 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
383 clocks = <&mstp3_clks R8A7791_CLK_IIC0>; 448 clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
449 dmas = <&dmac0 0x61>, <&dmac0 0x62>;
450 dma-names = "tx", "rx";
384 status = "disabled"; 451 status = "disabled";
385 }; 452 };
386 453
@@ -391,6 +458,8 @@
391 reg = <0 0xe6510000 0 0x425>; 458 reg = <0 0xe6510000 0 0x425>;
392 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; 459 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
393 clocks = <&mstp3_clks R8A7791_CLK_IIC1>; 460 clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
461 dmas = <&dmac0 0x65>, <&dmac0 0x66>;
462 dma-names = "tx", "rx";
394 status = "disabled"; 463 status = "disabled";
395 }; 464 };
396 465
@@ -1039,24 +1108,28 @@
1039 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; 1108 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1040 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; 1109 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1041 clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>, 1110 clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
1042 <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>; 1111 <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1112 <&hp_clk>, <&hp_clk>;
1043 #clock-cells = <1>; 1113 #clock-cells = <1>;
1044 renesas,clock-indices = < 1114 renesas,clock-indices = <
1045 R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0 1115 R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
1046 R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1 1116 R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1
1047 R8A7791_CLK_SSUSB R8A7791_CLK_CMT1 1117 R8A7791_CLK_SSUSB R8A7791_CLK_CMT1
1118 R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1
1048 >; 1119 >;
1049 clock-output-names = 1120 clock-output-names =
1050 "tpu0", "sdhi2", "sdhi1", "sdhi0", 1121 "tpu0", "sdhi2", "sdhi1", "sdhi0",
1051 "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1"; 1122 "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
1123 "usbdmac0", "usbdmac1";
1052 }; 1124 };
1053 mstp5_clks: mstp5_clks@e6150144 { 1125 mstp5_clks: mstp5_clks@e6150144 {
1054 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; 1126 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1055 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; 1127 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1056 clocks = <&extal_clk>, <&p_clk>; 1128 clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>;
1057 #clock-cells = <1>; 1129 #clock-cells = <1>;
1058 renesas,clock-indices = <R8A7791_CLK_THERMAL R8A7791_CLK_PWM>; 1130 renesas,clock-indices = <R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
1059 clock-output-names = "thermal", "pwm"; 1131 R8A7791_CLK_THERMAL R8A7791_CLK_PWM>;
1132 clock-output-names = "audmac0", "audmac1", "thermal", "pwm";
1060 }; 1133 };
1061 mstp7_clks: mstp7_clks@e615014c { 1134 mstp7_clks: mstp7_clks@e615014c {
1062 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; 1135 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 088e79c6551c..19c9de3f2a5a 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -461,16 +461,19 @@
461 mstp1_clks: mstp1_clks@e6150134 { 461 mstp1_clks: mstp1_clks@e6150134 {
462 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; 462 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
463 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; 463 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
464 clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, 464 clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>,
465 <&cp_clk>, 465 <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>,
466 <&zs_clk>, <&zs_clk>, <&zs_clk>; 466 <&zs_clk>, <&zs_clk>;
467 #clock-cells = <1>; 467 #clock-cells = <1>;
468 renesas,clock-indices = < 468 renesas,clock-indices = <
469 R8A7794_CLK_TMU1 R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 469 R8A7794_CLK_VCP0 R8A7794_CLK_VPC0 R8A7794_CLK_TMU1
470 R8A7794_CLK_CMT0 R8A7794_CLK_TMU0 470 R8A7794_CLK_3DG R8A7794_CLK_2DDMAC R8A7794_CLK_FDP1_0
471 R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 R8A7794_CLK_CMT0
472 R8A7794_CLK_TMU0 R8A7794_CLK_VSP1_DU0 R8A7794_CLK_VSP1_S
471 >; 473 >;
472 clock-output-names = 474 clock-output-names =
473 "tmu1", "tmu3", "tmu2", "cmt0", "tmu0"; 475 "vcp0", "vpc0", "tmu1", "3dg", "2ddmac", "fdp1-0",
476 "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du0", "vsps";
474 }; 477 };
475 mstp2_clks: mstp2_clks@e6150138 { 478 mstp2_clks: mstp2_clks@e6150138 {
476 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; 479 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -517,13 +520,13 @@
517 mstp8_clks: mstp8_clks@e6150990 { 520 mstp8_clks: mstp8_clks@e6150990 {
518 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; 521 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
519 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; 522 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
520 clocks = <&p_clk>; 523 clocks = <&zg_clk>, <&zg_clk>, <&p_clk>;
521 #clock-cells = <1>; 524 #clock-cells = <1>;
522 renesas,clock-indices = < 525 renesas,clock-indices = <
523 R8A7794_CLK_ETHER 526 R8A7794_CLK_VIN1 R8A7794_CLK_VIN0 R8A7794_CLK_ETHER
524 >; 527 >;
525 clock-output-names = 528 clock-output-names =
526 "ether"; 529 "vin1", "vin0", "ether";
527 }; 530 };
528 mstp11_clks: mstp11_clks@e615099c { 531 mstp11_clks: mstp11_clks@e615099c {
529 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; 532 compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
index 3721cd433601..939be1299ca6 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
@@ -101,15 +101,19 @@
101 compatible = "gpio-leds"; 101 compatible = "gpio-leds";
102 led1 { 102 led1 {
103 gpios = <&pfc 20 GPIO_ACTIVE_LOW>; 103 gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
104 label = "LED1";
104 }; 105 };
105 led2 { 106 led2 {
106 gpios = <&pfc 21 GPIO_ACTIVE_LOW>; 107 gpios = <&pfc 21 GPIO_ACTIVE_LOW>;
108 label = "LED2";
107 }; 109 };
108 led3 { 110 led3 {
109 gpios = <&pfc 22 GPIO_ACTIVE_LOW>; 111 gpios = <&pfc 22 GPIO_ACTIVE_LOW>;
112 label = "LED3";
110 }; 113 };
111 led4 { 114 led4 {
112 gpios = <&pfc 23 GPIO_ACTIVE_LOW>; 115 gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
116 label = "LED4";
113 }; 117 };
114 }; 118 };
115 119
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index 030a5920312f..d8def5a529da 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -138,7 +138,7 @@
138 i2c0: i2c@e6820000 { 138 i2c0: i2c@e6820000 {
139 #address-cells = <1>; 139 #address-cells = <1>;
140 #size-cells = <0>; 140 #size-cells = <0>;
141 compatible = "renesas,rmobile-iic"; 141 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
142 reg = <0xe6820000 0x425>; 142 reg = <0xe6820000 0x425>;
143 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH 143 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
144 0 168 IRQ_TYPE_LEVEL_HIGH 144 0 168 IRQ_TYPE_LEVEL_HIGH
@@ -150,7 +150,7 @@
150 i2c1: i2c@e6822000 { 150 i2c1: i2c@e6822000 {
151 #address-cells = <1>; 151 #address-cells = <1>;
152 #size-cells = <0>; 152 #size-cells = <0>;
153 compatible = "renesas,rmobile-iic"; 153 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
154 reg = <0xe6822000 0x425>; 154 reg = <0xe6822000 0x425>;
155 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH 155 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
156 0 52 IRQ_TYPE_LEVEL_HIGH 156 0 52 IRQ_TYPE_LEVEL_HIGH
@@ -162,7 +162,7 @@
162 i2c2: i2c@e6824000 { 162 i2c2: i2c@e6824000 {
163 #address-cells = <1>; 163 #address-cells = <1>;
164 #size-cells = <0>; 164 #size-cells = <0>;
165 compatible = "renesas,rmobile-iic"; 165 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
166 reg = <0xe6824000 0x425>; 166 reg = <0xe6824000 0x425>;
167 interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH 167 interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
168 0 172 IRQ_TYPE_LEVEL_HIGH 168 0 172 IRQ_TYPE_LEVEL_HIGH
@@ -174,7 +174,7 @@
174 i2c3: i2c@e6826000 { 174 i2c3: i2c@e6826000 {
175 #address-cells = <1>; 175 #address-cells = <1>;
176 #size-cells = <0>; 176 #size-cells = <0>;
177 compatible = "renesas,rmobile-iic"; 177 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
178 reg = <0xe6826000 0x425>; 178 reg = <0xe6826000 0x425>;
179 interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH 179 interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
180 0 184 IRQ_TYPE_LEVEL_HIGH 180 0 184 IRQ_TYPE_LEVEL_HIGH
@@ -186,7 +186,7 @@
186 i2c4: i2c@e6828000 { 186 i2c4: i2c@e6828000 {
187 #address-cells = <1>; 187 #address-cells = <1>;
188 #size-cells = <0>; 188 #size-cells = <0>;
189 compatible = "renesas,rmobile-iic"; 189 compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic";
190 reg = <0xe6828000 0x425>; 190 reg = <0xe6828000 0x425>;
191 interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH 191 interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
192 0 188 IRQ_TYPE_LEVEL_HIGH 192 0 188 IRQ_TYPE_LEVEL_HIGH
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index e3a3fb80feb6..c27b3b5133b9 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -78,6 +78,8 @@
78#define R8A7790_CLK_USBDMAC1 31 78#define R8A7790_CLK_USBDMAC1 31
79 79
80/* MSTP5 */ 80/* MSTP5 */
81#define R8A7790_CLK_AUDIO_DMAC1 1
82#define R8A7790_CLK_AUDIO_DMAC0 2
81#define R8A7790_CLK_THERMAL 22 83#define R8A7790_CLK_THERMAL 22
82#define R8A7790_CLK_PWM 23 84#define R8A7790_CLK_PWM 23
83 85
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index dcececd9f4d0..3ea2bbc0da3f 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -69,6 +69,8 @@
69#define R8A7791_CLK_USBDMAC1 31 69#define R8A7791_CLK_USBDMAC1 31
70 70
71/* MSTP5 */ 71/* MSTP5 */
72#define R8A7791_CLK_AUDIO_DMAC1 1
73#define R8A7791_CLK_AUDIO_DMAC0 2
72#define R8A7791_CLK_THERMAL 22 74#define R8A7791_CLK_THERMAL 22
73#define R8A7791_CLK_PWM 23 75#define R8A7791_CLK_PWM 23
74 76
diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h
index 9ac1043e25bc..aa9c286e60c0 100644
--- a/include/dt-bindings/clock/r8a7794-clock.h
+++ b/include/dt-bindings/clock/r8a7794-clock.h
@@ -26,11 +26,18 @@
26#define R8A7794_CLK_MSIOF0 0 26#define R8A7794_CLK_MSIOF0 0
27 27
28/* MSTP1 */ 28/* MSTP1 */
29#define R8A7794_CLK_VCP0 1
30#define R8A7794_CLK_VPC0 3
29#define R8A7794_CLK_TMU1 11 31#define R8A7794_CLK_TMU1 11
32#define R8A7794_CLK_3DG 12
33#define R8A7794_CLK_2DDMAC 15
34#define R8A7794_CLK_FDP1_0 19
30#define R8A7794_CLK_TMU3 21 35#define R8A7794_CLK_TMU3 21
31#define R8A7794_CLK_TMU2 22 36#define R8A7794_CLK_TMU2 22
32#define R8A7794_CLK_CMT0 24 37#define R8A7794_CLK_CMT0 24
33#define R8A7794_CLK_TMU0 25 38#define R8A7794_CLK_TMU0 25
39#define R8A7794_CLK_VSP1_DU0 28
40#define R8A7794_CLK_VSP1_S 31
34 41
35/* MSTP2 */ 42/* MSTP2 */
36#define R8A7794_CLK_SCIFA2 2 43#define R8A7794_CLK_SCIFA2 2
@@ -61,6 +68,8 @@
61#define R8A7794_CLK_SCIF0 21 68#define R8A7794_CLK_SCIF0 21
62 69
63/* MSTP8 */ 70/* MSTP8 */
71#define R8A7794_CLK_VIN1 10
72#define R8A7794_CLK_VIN0 11
64#define R8A7794_CLK_ETHER 13 73#define R8A7794_CLK_ETHER 13
65 74
66/* MSTP9 */ 75/* MSTP9 */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-27 19:06:09 -0500