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-rw-r--r--arch/powerpc/include/asm/perf_event_server.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 57b42da03b62..3f0c15c6f068 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -33,6 +33,8 @@ struct power_pmu {
33 unsigned long *valp); 33 unsigned long *valp);
34 int (*get_alternatives)(u64 event_id, unsigned int flags, 34 int (*get_alternatives)(u64 event_id, unsigned int flags,
35 u64 alt[]); 35 u64 alt[]);
36 u64 (*bhrb_filter_map)(u64 branch_sample_type);
37 void (*config_bhrb)(u64 pmu_bhrb_filter);
36 void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]); 38 void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
37 int (*limited_pmc_event)(u64 event_id); 39 int (*limited_pmc_event)(u64 event_id);
38 u32 flags; 40 u32 flags;
@@ -42,6 +44,9 @@ struct power_pmu {
42 int (*cache_events)[PERF_COUNT_HW_CACHE_MAX] 44 int (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
43 [PERF_COUNT_HW_CACHE_OP_MAX] 45 [PERF_COUNT_HW_CACHE_OP_MAX]
44 [PERF_COUNT_HW_CACHE_RESULT_MAX]; 46 [PERF_COUNT_HW_CACHE_RESULT_MAX];
47
48 /* BHRB entries in the PMU */
49 int bhrb_nr;
45}; 50};
46 51
47/* 52/*
@@ -54,6 +59,7 @@ struct power_pmu {
54#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */ 59#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */
55#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */ 60#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */
56#define PPMU_HAS_SIER 0x00000040 /* Has SIER */ 61#define PPMU_HAS_SIER 0x00000040 /* Has SIER */
62#define PPMU_BHRB 0x00000080 /* has BHRB feature enabled */
57 63
58/* 64/*
59 * Values for flags to get_alternatives() 65 * Values for flags to get_alternatives()