diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index f6e7815e1860..7e835d94df4a 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
| @@ -2550,6 +2550,7 @@ static int si_vm_packet3_gfx_check(struct radeon_device *rdev, | |||
| 2550 | u32 idx = pkt->idx + 1; | 2550 | u32 idx = pkt->idx + 1; |
| 2551 | u32 idx_value = ib[idx]; | 2551 | u32 idx_value = ib[idx]; |
| 2552 | u32 start_reg, end_reg, reg, i; | 2552 | u32 start_reg, end_reg, reg, i; |
| 2553 | u32 command, info; | ||
| 2553 | 2554 | ||
| 2554 | switch (pkt->opcode) { | 2555 | switch (pkt->opcode) { |
| 2555 | case PACKET3_NOP: | 2556 | case PACKET3_NOP: |
| @@ -2649,6 +2650,52 @@ static int si_vm_packet3_gfx_check(struct radeon_device *rdev, | |||
| 2649 | return -EINVAL; | 2650 | return -EINVAL; |
| 2650 | } | 2651 | } |
| 2651 | break; | 2652 | break; |
| 2653 | case PACKET3_CP_DMA: | ||
| 2654 | command = ib[idx + 4]; | ||
| 2655 | info = ib[idx + 1]; | ||
| 2656 | if (command & PACKET3_CP_DMA_CMD_SAS) { | ||
| 2657 | /* src address space is register */ | ||
| 2658 | if (((info & 0x60000000) >> 29) == 0) { | ||
| 2659 | start_reg = idx_value << 2; | ||
| 2660 | if (command & PACKET3_CP_DMA_CMD_SAIC) { | ||
| 2661 | reg = start_reg; | ||
| 2662 | if (!si_vm_reg_valid(reg)) { | ||
| 2663 | DRM_ERROR("CP DMA Bad SRC register\n"); | ||
| 2664 | return -EINVAL; | ||
| 2665 | } | ||
| 2666 | } else { | ||
| 2667 | for (i = 0; i < (command & 0x1fffff); i++) { | ||
| 2668 | reg = start_reg + (4 * i); | ||
| 2669 | if (!si_vm_reg_valid(reg)) { | ||
| 2670 | DRM_ERROR("CP DMA Bad SRC register\n"); | ||
| 2671 | return -EINVAL; | ||
| 2672 | } | ||
| 2673 | } | ||
| 2674 | } | ||
| 2675 | } | ||
| 2676 | } | ||
| 2677 | if (command & PACKET3_CP_DMA_CMD_DAS) { | ||
| 2678 | /* dst address space is register */ | ||
| 2679 | if (((info & 0x00300000) >> 20) == 0) { | ||
| 2680 | start_reg = ib[idx + 2]; | ||
| 2681 | if (command & PACKET3_CP_DMA_CMD_DAIC) { | ||
| 2682 | reg = start_reg; | ||
| 2683 | if (!si_vm_reg_valid(reg)) { | ||
| 2684 | DRM_ERROR("CP DMA Bad DST register\n"); | ||
| 2685 | return -EINVAL; | ||
| 2686 | } | ||
| 2687 | } else { | ||
| 2688 | for (i = 0; i < (command & 0x1fffff); i++) { | ||
| 2689 | reg = start_reg + (4 * i); | ||
| 2690 | if (!si_vm_reg_valid(reg)) { | ||
| 2691 | DRM_ERROR("CP DMA Bad DST register\n"); | ||
| 2692 | return -EINVAL; | ||
| 2693 | } | ||
| 2694 | } | ||
| 2695 | } | ||
| 2696 | } | ||
| 2697 | } | ||
| 2698 | break; | ||
| 2652 | default: | 2699 | default: |
| 2653 | DRM_ERROR("Invalid GFX packet3: 0x%x\n", pkt->opcode); | 2700 | DRM_ERROR("Invalid GFX packet3: 0x%x\n", pkt->opcode); |
| 2654 | return -EINVAL; | 2701 | return -EINVAL; |
