diff options
| -rw-r--r-- | arch/microblaze/include/asm/system.h | 3 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/system.h | 3 | ||||
| -rw-r--r-- | include/linux/skbuff.h | 8 |
3 files changed, 5 insertions, 9 deletions
diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h index 48c4f0335e3f..81e1f7d5b4cb 100644 --- a/arch/microblaze/include/asm/system.h +++ b/arch/microblaze/include/asm/system.h | |||
| @@ -101,10 +101,7 @@ extern struct dentry *of_debugfs_root; | |||
| 101 | * MicroBlaze doesn't handle unaligned accesses in hardware. | 101 | * MicroBlaze doesn't handle unaligned accesses in hardware. |
| 102 | * | 102 | * |
| 103 | * Based on this we force the IP header alignment in network drivers. | 103 | * Based on this we force the IP header alignment in network drivers. |
| 104 | * We also modify NET_SKB_PAD to be a cacheline in size, thus maintaining | ||
| 105 | * cacheline alignment of buffers. | ||
| 106 | */ | 104 | */ |
| 107 | #define NET_IP_ALIGN 2 | 105 | #define NET_IP_ALIGN 2 |
| 108 | #define NET_SKB_PAD L1_CACHE_BYTES | ||
| 109 | 106 | ||
| 110 | #endif /* _ASM_MICROBLAZE_SYSTEM_H */ | 107 | #endif /* _ASM_MICROBLAZE_SYSTEM_H */ |
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h index a6297c67c3d6..6c294acac848 100644 --- a/arch/powerpc/include/asm/system.h +++ b/arch/powerpc/include/asm/system.h | |||
| @@ -515,11 +515,8 @@ __cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new, | |||
| 515 | * powers of 2 writes until it reaches sufficient alignment). | 515 | * powers of 2 writes until it reaches sufficient alignment). |
| 516 | * | 516 | * |
| 517 | * Based on this we disable the IP header alignment in network drivers. | 517 | * Based on this we disable the IP header alignment in network drivers. |
| 518 | * We also modify NET_SKB_PAD to be a cacheline in size, thus maintaining | ||
| 519 | * cacheline alignment of buffers. | ||
| 520 | */ | 518 | */ |
| 521 | #define NET_IP_ALIGN 0 | 519 | #define NET_IP_ALIGN 0 |
| 522 | #define NET_SKB_PAD L1_CACHE_BYTES | ||
| 523 | 520 | ||
| 524 | #define cmpxchg64(ptr, o, n) \ | 521 | #define cmpxchg64(ptr, o, n) \ |
| 525 | ({ \ | 522 | ({ \ |
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 122d08396e56..ac74ee085d74 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h | |||
| @@ -1414,12 +1414,14 @@ static inline int skb_network_offset(const struct sk_buff *skb) | |||
| 1414 | * | 1414 | * |
| 1415 | * Various parts of the networking layer expect at least 32 bytes of | 1415 | * Various parts of the networking layer expect at least 32 bytes of |
| 1416 | * headroom, you should not reduce this. | 1416 | * headroom, you should not reduce this. |
| 1417 | * With RPS, we raised NET_SKB_PAD to 64 so that get_rps_cpus() fetches span | 1417 | * |
| 1418 | * a 64 bytes aligned block to fit modern (>= 64 bytes) cache line sizes | 1418 | * Using max(32, L1_CACHE_BYTES) makes sense (especially with RPS) |
| 1419 | * to reduce average number of cache lines per packet. | ||
| 1420 | * get_rps_cpus() for example only access one 64 bytes aligned block : | ||
| 1419 | * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8) | 1421 | * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8) |
| 1420 | */ | 1422 | */ |
| 1421 | #ifndef NET_SKB_PAD | 1423 | #ifndef NET_SKB_PAD |
| 1422 | #define NET_SKB_PAD 64 | 1424 | #define NET_SKB_PAD max(32, L1_CACHE_BYTES) |
| 1423 | #endif | 1425 | #endif |
| 1424 | 1426 | ||
| 1425 | extern int ___pskb_trim(struct sk_buff *skb, unsigned int len); | 1427 | extern int ___pskb_trim(struct sk_buff *skb, unsigned int len); |
