aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/mips/Makefile2
-rw-r--r--arch/mips/include/asm/cpu-info.h4
-rw-r--r--arch/mips/include/uapi/asm/unistd.h6
-rw-r--r--arch/mips/kernel/branch.c8
-rw-r--r--arch/mips/kernel/ptrace.c14
-rw-r--r--arch/mips/kernel/traps.c4
-rw-r--r--arch/mips/loongson/common/cs5536/cs5536_mfgpt.c11
-rw-r--r--arch/mips/mm/page.c4
-rw-r--r--arch/mips/mti-malta/malta-memory.c2
-rw-r--r--arch/mips/pci/pci-rc32434.c1
-rw-r--r--include/uapi/linux/audit.h2
11 files changed, 28 insertions, 30 deletions
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 1a5b4032cb66..60a359cfa328 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -151,7 +151,7 @@ cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
151 -Wa,--trap 151 -Wa,--trap
152cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \ 152cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
153 -Wa,--trap 153 -Wa,--trap
154cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \ 154cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1 -mno-mdmx -mno-mips3d,-march=r5000) \
155 -Wa,--trap 155 -Wa,--trap
156cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap 156cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
157cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \ 157cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index dc2135be2a3a..ff2707ab3295 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -39,14 +39,14 @@ struct cache_desc {
39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ 39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */
40 40
41struct cpuinfo_mips { 41struct cpuinfo_mips {
42 unsigned int udelay_val; 42 unsigned long asid_cache;
43 unsigned int asid_cache;
44 43
45 /* 44 /*
46 * Capability and feature descriptor structure for MIPS CPU 45 * Capability and feature descriptor structure for MIPS CPU
47 */ 46 */
48 unsigned long options; 47 unsigned long options;
49 unsigned long ases; 48 unsigned long ases;
49 unsigned int udelay_val;
50 unsigned int processor_id; 50 unsigned int processor_id;
51 unsigned int fpu_id; 51 unsigned int fpu_id;
52 unsigned int msa_id; 52 unsigned int msa_id;
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index 2692abb28e36..5805414777e0 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -381,7 +381,7 @@
381#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 381#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
382 382
383#define __NR_O32_Linux 4000 383#define __NR_O32_Linux 4000
384#define __NR_O32_Linux_syscalls 350 384#define __NR_O32_Linux_syscalls 351
385 385
386#if _MIPS_SIM == _MIPS_SIM_ABI64 386#if _MIPS_SIM == _MIPS_SIM_ABI64
387 387
@@ -710,7 +710,7 @@
710#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 710#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
711 711
712#define __NR_64_Linux 5000 712#define __NR_64_Linux 5000
713#define __NR_64_Linux_syscalls 310 713#define __NR_64_Linux_syscalls 311
714 714
715#if _MIPS_SIM == _MIPS_SIM_NABI32 715#if _MIPS_SIM == _MIPS_SIM_NABI32
716 716
@@ -1043,6 +1043,6 @@
1043#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1043#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1044 1044
1045#define __NR_N32_Linux 6000 1045#define __NR_N32_Linux 6000
1046#define __NR_N32_Linux_syscalls 314 1046#define __NR_N32_Linux_syscalls 315
1047 1047
1048#endif /* _UAPI_ASM_UNISTD_H */ 1048#endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 4d78bf445a9c..76122ff5cb5e 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -317,7 +317,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
317 if (regs->regs[insn.i_format.rs] == 317 if (regs->regs[insn.i_format.rs] ==
318 regs->regs[insn.i_format.rt]) { 318 regs->regs[insn.i_format.rt]) {
319 epc = epc + 4 + (insn.i_format.simmediate << 2); 319 epc = epc + 4 + (insn.i_format.simmediate << 2);
320 if (insn.i_format.rt == beql_op) 320 if (insn.i_format.opcode == beql_op)
321 ret = BRANCH_LIKELY_TAKEN; 321 ret = BRANCH_LIKELY_TAKEN;
322 } else 322 } else
323 epc += 8; 323 epc += 8;
@@ -329,7 +329,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
329 if (regs->regs[insn.i_format.rs] != 329 if (regs->regs[insn.i_format.rs] !=
330 regs->regs[insn.i_format.rt]) { 330 regs->regs[insn.i_format.rt]) {
331 epc = epc + 4 + (insn.i_format.simmediate << 2); 331 epc = epc + 4 + (insn.i_format.simmediate << 2);
332 if (insn.i_format.rt == bnel_op) 332 if (insn.i_format.opcode == bnel_op)
333 ret = BRANCH_LIKELY_TAKEN; 333 ret = BRANCH_LIKELY_TAKEN;
334 } else 334 } else
335 epc += 8; 335 epc += 8;
@@ -341,7 +341,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
341 /* rt field assumed to be zero */ 341 /* rt field assumed to be zero */
342 if ((long)regs->regs[insn.i_format.rs] <= 0) { 342 if ((long)regs->regs[insn.i_format.rs] <= 0) {
343 epc = epc + 4 + (insn.i_format.simmediate << 2); 343 epc = epc + 4 + (insn.i_format.simmediate << 2);
344 if (insn.i_format.rt == bnel_op) 344 if (insn.i_format.opcode == blezl_op)
345 ret = BRANCH_LIKELY_TAKEN; 345 ret = BRANCH_LIKELY_TAKEN;
346 } else 346 } else
347 epc += 8; 347 epc += 8;
@@ -353,7 +353,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
353 /* rt field assumed to be zero */ 353 /* rt field assumed to be zero */
354 if ((long)regs->regs[insn.i_format.rs] > 0) { 354 if ((long)regs->regs[insn.i_format.rs] > 0) {
355 epc = epc + 4 + (insn.i_format.simmediate << 2); 355 epc = epc + 4 + (insn.i_format.simmediate << 2);
356 if (insn.i_format.rt == bnel_op) 356 if (insn.i_format.opcode == bgtzl_op)
357 ret = BRANCH_LIKELY_TAKEN; 357 ret = BRANCH_LIKELY_TAKEN;
358 } else 358 } else
359 epc += 8; 359 epc += 8;
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 71f85f427034..f639ccd5060c 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -163,7 +163,7 @@ int ptrace_get_watch_regs(struct task_struct *child,
163 enum pt_watch_style style; 163 enum pt_watch_style style;
164 int i; 164 int i;
165 165
166 if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0) 166 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
167 return -EIO; 167 return -EIO;
168 if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs))) 168 if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
169 return -EIO; 169 return -EIO;
@@ -177,14 +177,14 @@ int ptrace_get_watch_regs(struct task_struct *child,
177#endif 177#endif
178 178
179 __put_user(style, &addr->style); 179 __put_user(style, &addr->style);
180 __put_user(current_cpu_data.watch_reg_use_cnt, 180 __put_user(boot_cpu_data.watch_reg_use_cnt,
181 &addr->WATCH_STYLE.num_valid); 181 &addr->WATCH_STYLE.num_valid);
182 for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { 182 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
183 __put_user(child->thread.watch.mips3264.watchlo[i], 183 __put_user(child->thread.watch.mips3264.watchlo[i],
184 &addr->WATCH_STYLE.watchlo[i]); 184 &addr->WATCH_STYLE.watchlo[i]);
185 __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff, 185 __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
186 &addr->WATCH_STYLE.watchhi[i]); 186 &addr->WATCH_STYLE.watchhi[i]);
187 __put_user(current_cpu_data.watch_reg_masks[i], 187 __put_user(boot_cpu_data.watch_reg_masks[i],
188 &addr->WATCH_STYLE.watch_masks[i]); 188 &addr->WATCH_STYLE.watch_masks[i]);
189 } 189 }
190 for (; i < 8; i++) { 190 for (; i < 8; i++) {
@@ -204,12 +204,12 @@ int ptrace_set_watch_regs(struct task_struct *child,
204 unsigned long lt[NUM_WATCH_REGS]; 204 unsigned long lt[NUM_WATCH_REGS];
205 u16 ht[NUM_WATCH_REGS]; 205 u16 ht[NUM_WATCH_REGS];
206 206
207 if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0) 207 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
208 return -EIO; 208 return -EIO;
209 if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs))) 209 if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
210 return -EIO; 210 return -EIO;
211 /* Check the values. */ 211 /* Check the values. */
212 for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { 212 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
213 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]); 213 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
214#ifdef CONFIG_32BIT 214#ifdef CONFIG_32BIT
215 if (lt[i] & __UA_LIMIT) 215 if (lt[i] & __UA_LIMIT)
@@ -228,7 +228,7 @@ int ptrace_set_watch_regs(struct task_struct *child,
228 return -EINVAL; 228 return -EINVAL;
229 } 229 }
230 /* Install them. */ 230 /* Install them. */
231 for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { 231 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
232 if (lt[i] & 7) 232 if (lt[i] & 7)
233 watch_active = 1; 233 watch_active = 1;
234 child->thread.watch.mips3264.watchlo[i] = lt[i]; 234 child->thread.watch.mips3264.watchlo[i] = lt[i];
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 074e857ced28..8119ac2fdfc9 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1545,7 +1545,7 @@ asmlinkage void cache_parity_error(void)
1545 reg_val & (1<<30) ? "secondary" : "primary", 1545 reg_val & (1<<30) ? "secondary" : "primary",
1546 reg_val & (1<<31) ? "data" : "insn"); 1546 reg_val & (1<<31) ? "data" : "insn");
1547 if (cpu_has_mips_r2 && 1547 if (cpu_has_mips_r2 &&
1548 ((current_cpu_data.processor_id && 0xff0000) == PRID_COMP_MIPS)) { 1548 ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) {
1549 pr_err("Error bits: %s%s%s%s%s%s%s%s\n", 1549 pr_err("Error bits: %s%s%s%s%s%s%s%s\n",
1550 reg_val & (1<<29) ? "ED " : "", 1550 reg_val & (1<<29) ? "ED " : "",
1551 reg_val & (1<<28) ? "ET " : "", 1551 reg_val & (1<<28) ? "ET " : "",
@@ -1585,7 +1585,7 @@ asmlinkage void do_ftlb(void)
1585 1585
1586 /* For the moment, report the problem and hang. */ 1586 /* For the moment, report the problem and hang. */
1587 if (cpu_has_mips_r2 && 1587 if (cpu_has_mips_r2 &&
1588 ((current_cpu_data.processor_id && 0xff0000) == PRID_COMP_MIPS)) { 1588 ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) {
1589 pr_err("FTLB error exception, cp0_ecc=0x%08x:\n", 1589 pr_err("FTLB error exception, cp0_ecc=0x%08x:\n",
1590 read_c0_ecc()); 1590 read_c0_ecc());
1591 pr_err("cp0_errorepc == %0*lx\n", field, read_c0_errorepc()); 1591 pr_err("cp0_errorepc == %0*lx\n", field, read_c0_errorepc());
diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
index c639b9db0012..12c75db23420 100644
--- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
+++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
@@ -27,8 +27,7 @@
27 27
28#include <cs5536/cs5536_mfgpt.h> 28#include <cs5536/cs5536_mfgpt.h>
29 29
30DEFINE_SPINLOCK(mfgpt_lock); 30static DEFINE_RAW_SPINLOCK(mfgpt_lock);
31EXPORT_SYMBOL(mfgpt_lock);
32 31
33static u32 mfgpt_base; 32static u32 mfgpt_base;
34 33
@@ -55,7 +54,7 @@ EXPORT_SYMBOL(enable_mfgpt0_counter);
55static void init_mfgpt_timer(enum clock_event_mode mode, 54static void init_mfgpt_timer(enum clock_event_mode mode,
56 struct clock_event_device *evt) 55 struct clock_event_device *evt)
57{ 56{
58 spin_lock(&mfgpt_lock); 57 raw_spin_lock(&mfgpt_lock);
59 58
60 switch (mode) { 59 switch (mode) {
61 case CLOCK_EVT_MODE_PERIODIC: 60 case CLOCK_EVT_MODE_PERIODIC:
@@ -79,7 +78,7 @@ static void init_mfgpt_timer(enum clock_event_mode mode,
79 /* Nothing to do here */ 78 /* Nothing to do here */
80 break; 79 break;
81 } 80 }
82 spin_unlock(&mfgpt_lock); 81 raw_spin_unlock(&mfgpt_lock);
83} 82}
84 83
85static struct clock_event_device mfgpt_clockevent = { 84static struct clock_event_device mfgpt_clockevent = {
@@ -157,7 +156,7 @@ static cycle_t mfgpt_read(struct clocksource *cs)
157 static int old_count; 156 static int old_count;
158 static u32 old_jifs; 157 static u32 old_jifs;
159 158
160 spin_lock_irqsave(&mfgpt_lock, flags); 159 raw_spin_lock_irqsave(&mfgpt_lock, flags);
161 /* 160 /*
162 * Although our caller may have the read side of xtime_lock, 161 * Although our caller may have the read side of xtime_lock,
163 * this is now a seqlock, and we are cheating in this routine 162 * this is now a seqlock, and we are cheating in this routine
@@ -191,7 +190,7 @@ static cycle_t mfgpt_read(struct clocksource *cs)
191 old_count = count; 190 old_count = count;
192 old_jifs = jifs; 191 old_jifs = jifs;
193 192
194 spin_unlock_irqrestore(&mfgpt_lock, flags); 193 raw_spin_unlock_irqrestore(&mfgpt_lock, flags);
195 194
196 return (cycle_t) (jifs * COMPARE) + count; 195 return (cycle_t) (jifs * COMPARE) + count;
197} 196}
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index 58033c44690d..b611102e23b5 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -273,7 +273,7 @@ void build_clear_page(void)
273 uasm_i_ori(&buf, A2, A0, off); 273 uasm_i_ori(&buf, A2, A0, off);
274 274
275 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) 275 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
276 uasm_i_lui(&buf, AT, 0xa000); 276 uasm_i_lui(&buf, AT, uasm_rel_hi(0xa0000000));
277 277
278 off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size) 278 off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size)
279 * cache_line_size : 0; 279 * cache_line_size : 0;
@@ -424,7 +424,7 @@ void build_copy_page(void)
424 uasm_i_ori(&buf, A2, A0, off); 424 uasm_i_ori(&buf, A2, A0, off);
425 425
426 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) 426 if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
427 uasm_i_lui(&buf, AT, 0xa000); 427 uasm_i_lui(&buf, AT, uasm_rel_hi(0xa0000000));
428 428
429 off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) * 429 off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
430 cache_line_size : 0; 430 cache_line_size : 0;
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c
index 6d0f4ab3632d..f2364e419682 100644
--- a/arch/mips/mti-malta/malta-memory.c
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -27,7 +27,7 @@ unsigned long physical_memsize = 0L;
27fw_memblock_t * __init fw_getmdesc(int eva) 27fw_memblock_t * __init fw_getmdesc(int eva)
28{ 28{
29 char *memsize_str, *ememsize_str __maybe_unused = NULL, *ptr; 29 char *memsize_str, *ememsize_str __maybe_unused = NULL, *ptr;
30 unsigned long memsize, ememsize __maybe_unused = 0; 30 unsigned long memsize = 0, ememsize __maybe_unused = 0;
31 static char cmdline[COMMAND_LINE_SIZE] __initdata; 31 static char cmdline[COMMAND_LINE_SIZE] __initdata;
32 int tmp; 32 int tmp;
33 33
diff --git a/arch/mips/pci/pci-rc32434.c b/arch/mips/pci/pci-rc32434.c
index b128cb973ebe..7f6ce6d734c0 100644
--- a/arch/mips/pci/pci-rc32434.c
+++ b/arch/mips/pci/pci-rc32434.c
@@ -53,7 +53,6 @@ static struct resource rc32434_res_pci_mem1 = {
53 .start = 0x50000000, 53 .start = 0x50000000,
54 .end = 0x5FFFFFFF, 54 .end = 0x5FFFFFFF,
55 .flags = IORESOURCE_MEM, 55 .flags = IORESOURCE_MEM,
56 .parent = &rc32434_res_pci_mem1,
57 .sibling = NULL, 56 .sibling = NULL,
58 .child = &rc32434_res_pci_mem2 57 .child = &rc32434_res_pci_mem2
59}; 58};
diff --git a/include/uapi/linux/audit.h b/include/uapi/linux/audit.h
index 1b1efddb91cd..4c31a366be16 100644
--- a/include/uapi/linux/audit.h
+++ b/include/uapi/linux/audit.h
@@ -357,7 +357,7 @@ enum {
357#define AUDIT_ARCH_MIPS64N32 (EM_MIPS|__AUDIT_ARCH_64BIT|\ 357#define AUDIT_ARCH_MIPS64N32 (EM_MIPS|__AUDIT_ARCH_64BIT|\
358 __AUDIT_ARCH_CONVENTION_MIPS64_N32) 358 __AUDIT_ARCH_CONVENTION_MIPS64_N32)
359#define AUDIT_ARCH_MIPSEL64 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) 359#define AUDIT_ARCH_MIPSEL64 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
360#define AUDIT_ARCH_MIPSEL64N32 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE\ 360#define AUDIT_ARCH_MIPSEL64N32 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE|\
361 __AUDIT_ARCH_CONVENTION_MIPS64_N32) 361 __AUDIT_ARCH_CONVENTION_MIPS64_N32)
362#define AUDIT_ARCH_OPENRISC (EM_OPENRISC) 362#define AUDIT_ARCH_OPENRISC (EM_OPENRISC)
363#define AUDIT_ARCH_PARISC (EM_PARISC) 363#define AUDIT_ARCH_PARISC (EM_PARISC)