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-rw-r--r--drivers/gpu/drm/radeon/evergreen.c3
-rw-r--r--drivers/gpu/drm/radeon/ni.c5
-rw-r--r--drivers/gpu/drm/radeon/r100.c12
-rw-r--r--drivers/gpu/drm/radeon/r600.c12
-rw-r--r--drivers/gpu/drm/radeon/radeon.h8
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c17
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h2
-rw-r--r--drivers/gpu/drm/radeon/radeon_ring.c19
-rw-r--r--drivers/gpu/drm/radeon/rv770.c3
9 files changed, 29 insertions, 52 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index fa11a04ae62e..d1264a7154a6 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3120,7 +3120,8 @@ static int evergreen_startup(struct radeon_device *rdev)
3120 } 3120 }
3121 evergreen_irq_set(rdev); 3121 evergreen_irq_set(rdev);
3122 3122
3123 r = radeon_ring_init(rdev, cp, cp->ring_size); 3123 r = radeon_ring_init(rdev, cp, cp->ring_size, RADEON_WB_CP_RPTR_OFFSET,
3124 R600_CP_RB_RPTR, R600_CP_RB_WPTR);
3124 if (r) 3125 if (r)
3125 return r; 3126 return r;
3126 r = evergreen_cp_load_microcode(rdev); 3127 r = evergreen_cp_load_microcode(rdev);
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 636b8c5f5797..cc9aaeb104f5 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1273,7 +1273,7 @@ bool cayman_gpu_is_lockup(struct radeon_device *rdev, struct radeon_cp *cp)
1273 radeon_ring_unlock_commit(rdev, cp); 1273 radeon_ring_unlock_commit(rdev, cp);
1274 } 1274 }
1275 /* XXX deal with CP0,1,2 */ 1275 /* XXX deal with CP0,1,2 */
1276 cp->rptr = RREG32(CP_RB0_RPTR); 1276 cp->rptr = RREG32(cp->rptr_reg);
1277 return r100_gpu_cp_is_lockup(rdev, lockup, cp); 1277 return r100_gpu_cp_is_lockup(rdev, lockup, cp);
1278} 1278}
1279 1279
@@ -1393,7 +1393,8 @@ static int cayman_startup(struct radeon_device *rdev)
1393 } 1393 }
1394 evergreen_irq_set(rdev); 1394 evergreen_irq_set(rdev);
1395 1395
1396 r = radeon_ring_init(rdev, cp, cp->ring_size); 1396 r = radeon_ring_init(rdev, cp, cp->ring_size, RADEON_WB_CP_RPTR_OFFSET,
1397 CP_RB0_RPTR, CP_RB0_WPTR);
1397 if (r) 1398 if (r)
1398 return r; 1399 return r;
1399 r = cayman_cp_load_microcode(rdev); 1400 r = cayman_cp_load_microcode(rdev);
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 271cee7f817c..6c328115e66c 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1074,7 +1074,8 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
1074 rb_bufsz = drm_order(ring_size / 8); 1074 rb_bufsz = drm_order(ring_size / 8);
1075 ring_size = (1 << (rb_bufsz + 1)) * 4; 1075 ring_size = (1 << (rb_bufsz + 1)) * 4;
1076 r100_cp_load_microcode(rdev); 1076 r100_cp_load_microcode(rdev);
1077 r = radeon_ring_init(rdev, cp, ring_size); 1077 r = radeon_ring_init(rdev, cp, ring_size, RADEON_WB_CP_RPTR_OFFSET,
1078 RADEON_CP_RB_RPTR, RADEON_CP_RB_WPTR);
1078 if (r) { 1079 if (r) {
1079 return r; 1080 return r;
1080 } 1081 }
@@ -1179,13 +1180,6 @@ void r100_cp_disable(struct radeon_device *rdev)
1179 } 1180 }
1180} 1181}
1181 1182
1182void r100_cp_commit(struct radeon_device *rdev, struct radeon_cp *cp)
1183{
1184 WREG32(RADEON_CP_RB_WPTR, cp->wptr);
1185 (void)RREG32(RADEON_CP_RB_WPTR);
1186}
1187
1188
1189/* 1183/*
1190 * CS functions 1184 * CS functions
1191 */ 1185 */
@@ -2184,7 +2178,7 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_cp *cp)
2184 radeon_ring_write(cp, 0x80000000); 2178 radeon_ring_write(cp, 0x80000000);
2185 radeon_ring_unlock_commit(rdev, cp); 2179 radeon_ring_unlock_commit(rdev, cp);
2186 } 2180 }
2187 cp->rptr = RREG32(RADEON_CP_RB_RPTR); 2181 cp->rptr = RREG32(cp->rptr_reg);
2188 return r100_gpu_cp_is_lockup(rdev, &rdev->config.r100.lockup, cp); 2182 return r100_gpu_cp_is_lockup(rdev, &rdev->config.r100.lockup, cp);
2189} 2183}
2190 2184
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index eaf57cc75828..599753176741 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1372,7 +1372,7 @@ bool r600_gpu_is_lockup(struct radeon_device *rdev, struct radeon_cp *cp)
1372 radeon_ring_write(cp, 0x80000000); 1372 radeon_ring_write(cp, 0x80000000);
1373 radeon_ring_unlock_commit(rdev, cp); 1373 radeon_ring_unlock_commit(rdev, cp);
1374 } 1374 }
1375 cp->rptr = RREG32(R600_CP_RB_RPTR); 1375 cp->rptr = RREG32(cp->rptr_reg);
1376 return r100_gpu_cp_is_lockup(rdev, lockup, cp); 1376 return r100_gpu_cp_is_lockup(rdev, lockup, cp);
1377} 1377}
1378 1378
@@ -2234,12 +2234,6 @@ int r600_cp_resume(struct radeon_device *rdev)
2234 return 0; 2234 return 0;
2235} 2235}
2236 2236
2237void r600_cp_commit(struct radeon_device *rdev, struct radeon_cp *cp)
2238{
2239 WREG32(CP_RB_WPTR, cp->wptr);
2240 (void)RREG32(CP_RB_WPTR);
2241}
2242
2243void r600_ring_init(struct radeon_device *rdev, struct radeon_cp *cp, unsigned ring_size) 2237void r600_ring_init(struct radeon_device *rdev, struct radeon_cp *cp, unsigned ring_size)
2244{ 2238{
2245 u32 rb_bufsz; 2239 u32 rb_bufsz;
@@ -2474,7 +2468,9 @@ int r600_startup(struct radeon_device *rdev)
2474 } 2468 }
2475 r600_irq_set(rdev); 2469 r600_irq_set(rdev);
2476 2470
2477 r = radeon_ring_init(rdev, cp, cp->ring_size); 2471 r = radeon_ring_init(rdev, cp, cp->ring_size, RADEON_WB_CP_RPTR_OFFSET,
2472 R600_CP_RB_RPTR, R600_CP_RB_WPTR);
2473
2478 if (r) 2474 if (r)
2479 return r; 2475 return r;
2480 r = r600_cp_load_microcode(rdev); 2476 r = r600_cp_load_microcode(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5bf8603f3956..bbe88ec3951d 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -525,8 +525,11 @@ struct radeon_cp {
525 struct radeon_bo *ring_obj; 525 struct radeon_bo *ring_obj;
526 volatile uint32_t *ring; 526 volatile uint32_t *ring;
527 unsigned rptr; 527 unsigned rptr;
528 unsigned rptr_offs;
529 unsigned rptr_reg;
528 unsigned wptr; 530 unsigned wptr;
529 unsigned wptr_old; 531 unsigned wptr_old;
532 unsigned wptr_reg;
530 unsigned ring_size; 533 unsigned ring_size;
531 unsigned ring_free_dw; 534 unsigned ring_free_dw;
532 int count_dw; 535 int count_dw;
@@ -602,7 +605,8 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_cp *cp);
602void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_cp *cp); 605void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_cp *cp);
603void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_cp *cp); 606void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_cp *cp);
604int radeon_ring_test(struct radeon_device *rdev, struct radeon_cp *cp); 607int radeon_ring_test(struct radeon_device *rdev, struct radeon_cp *cp);
605int radeon_ring_init(struct radeon_device *rdev, struct radeon_cp *cp, unsigned ring_size); 608int radeon_ring_init(struct radeon_device *rdev, struct radeon_cp *cp, unsigned ring_size,
609 unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg);
606void radeon_ring_fini(struct radeon_device *rdev, struct radeon_cp *cp); 610void radeon_ring_fini(struct radeon_device *rdev, struct radeon_cp *cp);
607 611
608 612
@@ -939,7 +943,6 @@ struct radeon_asic {
939 int (*cp_init)(struct radeon_device *rdev, unsigned ring_size); 943 int (*cp_init)(struct radeon_device *rdev, unsigned ring_size);
940 void (*cp_fini)(struct radeon_device *rdev); 944 void (*cp_fini)(struct radeon_device *rdev);
941 void (*cp_disable)(struct radeon_device *rdev); 945 void (*cp_disable)(struct radeon_device *rdev);
942 void (*cp_commit)(struct radeon_device *rdev, struct radeon_cp *cp);
943 void (*ring_start)(struct radeon_device *rdev); 946 void (*ring_start)(struct radeon_device *rdev);
944 int (*ring_test)(struct radeon_device *rdev, struct radeon_cp *cp); 947 int (*ring_test)(struct radeon_device *rdev, struct radeon_cp *cp);
945 void (*ring_ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib); 948 void (*ring_ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
@@ -1491,7 +1494,6 @@ void radeon_ring_write(struct radeon_cp *cp, uint32_t v);
1491#define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev)) 1494#define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev))
1492#define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart_tlb_flush((rdev)) 1495#define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart_tlb_flush((rdev))
1493#define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart_set_page((rdev), (i), (p)) 1496#define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart_set_page((rdev), (i), (p))
1494#define radeon_cp_commit(rdev, cp) (rdev)->asic->cp_commit((rdev), (cp))
1495#define radeon_ring_start(rdev) (rdev)->asic->ring_start((rdev)) 1497#define radeon_ring_start(rdev) (rdev)->asic->ring_start((rdev))
1496#define radeon_ring_test(rdev, cp) (rdev)->asic->ring_test((rdev), (cp)) 1498#define radeon_ring_test(rdev, cp) (rdev)->asic->ring_test((rdev), (cp))
1497#define radeon_ring_ib_execute(rdev, ib) (rdev)->asic->ring_ib_execute((rdev), (ib)) 1499#define radeon_ring_ib_execute(rdev, ib) (rdev)->asic->ring_ib_execute((rdev), (ib))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 8cfbbc77d70b..1b208ed814a2 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -138,7 +138,6 @@ static struct radeon_asic r100_asic = {
138 .asic_reset = &r100_asic_reset, 138 .asic_reset = &r100_asic_reset,
139 .gart_tlb_flush = &r100_pci_gart_tlb_flush, 139 .gart_tlb_flush = &r100_pci_gart_tlb_flush,
140 .gart_set_page = &r100_pci_gart_set_page, 140 .gart_set_page = &r100_pci_gart_set_page,
141 .cp_commit = &r100_cp_commit,
142 .ring_start = &r100_ring_start, 141 .ring_start = &r100_ring_start,
143 .ring_test = &r100_ring_test, 142 .ring_test = &r100_ring_test,
144 .ring_ib_execute = &r100_ring_ib_execute, 143 .ring_ib_execute = &r100_ring_ib_execute,
@@ -187,7 +186,6 @@ static struct radeon_asic r200_asic = {
187 .asic_reset = &r100_asic_reset, 186 .asic_reset = &r100_asic_reset,
188 .gart_tlb_flush = &r100_pci_gart_tlb_flush, 187 .gart_tlb_flush = &r100_pci_gart_tlb_flush,
189 .gart_set_page = &r100_pci_gart_set_page, 188 .gart_set_page = &r100_pci_gart_set_page,
190 .cp_commit = &r100_cp_commit,
191 .ring_start = &r100_ring_start, 189 .ring_start = &r100_ring_start,
192 .ring_test = &r100_ring_test, 190 .ring_test = &r100_ring_test,
193 .ring_ib_execute = &r100_ring_ib_execute, 191 .ring_ib_execute = &r100_ring_ib_execute,
@@ -235,7 +233,6 @@ static struct radeon_asic r300_asic = {
235 .asic_reset = &r300_asic_reset, 233 .asic_reset = &r300_asic_reset,
236 .gart_tlb_flush = &r100_pci_gart_tlb_flush, 234 .gart_tlb_flush = &r100_pci_gart_tlb_flush,
237 .gart_set_page = &r100_pci_gart_set_page, 235 .gart_set_page = &r100_pci_gart_set_page,
238 .cp_commit = &r100_cp_commit,
239 .ring_start = &r300_ring_start, 236 .ring_start = &r300_ring_start,
240 .ring_test = &r100_ring_test, 237 .ring_test = &r100_ring_test,
241 .ring_ib_execute = &r100_ring_ib_execute, 238 .ring_ib_execute = &r100_ring_ib_execute,
@@ -284,7 +281,6 @@ static struct radeon_asic r300_asic_pcie = {
284 .asic_reset = &r300_asic_reset, 281 .asic_reset = &r300_asic_reset,
285 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush, 282 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
286 .gart_set_page = &rv370_pcie_gart_set_page, 283 .gart_set_page = &rv370_pcie_gart_set_page,
287 .cp_commit = &r100_cp_commit,
288 .ring_start = &r300_ring_start, 284 .ring_start = &r300_ring_start,
289 .ring_test = &r100_ring_test, 285 .ring_test = &r100_ring_test,
290 .ring_ib_execute = &r100_ring_ib_execute, 286 .ring_ib_execute = &r100_ring_ib_execute,
@@ -332,7 +328,6 @@ static struct radeon_asic r420_asic = {
332 .asic_reset = &r300_asic_reset, 328 .asic_reset = &r300_asic_reset,
333 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush, 329 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
334 .gart_set_page = &rv370_pcie_gart_set_page, 330 .gart_set_page = &rv370_pcie_gart_set_page,
335 .cp_commit = &r100_cp_commit,
336 .ring_start = &r300_ring_start, 331 .ring_start = &r300_ring_start,
337 .ring_test = &r100_ring_test, 332 .ring_test = &r100_ring_test,
338 .ring_ib_execute = &r100_ring_ib_execute, 333 .ring_ib_execute = &r100_ring_ib_execute,
@@ -381,7 +376,6 @@ static struct radeon_asic rs400_asic = {
381 .asic_reset = &r300_asic_reset, 376 .asic_reset = &r300_asic_reset,
382 .gart_tlb_flush = &rs400_gart_tlb_flush, 377 .gart_tlb_flush = &rs400_gart_tlb_flush,
383 .gart_set_page = &rs400_gart_set_page, 378 .gart_set_page = &rs400_gart_set_page,
384 .cp_commit = &r100_cp_commit,
385 .ring_start = &r300_ring_start, 379 .ring_start = &r300_ring_start,
386 .ring_test = &r100_ring_test, 380 .ring_test = &r100_ring_test,
387 .ring_ib_execute = &r100_ring_ib_execute, 381 .ring_ib_execute = &r100_ring_ib_execute,
@@ -430,7 +424,6 @@ static struct radeon_asic rs600_asic = {
430 .asic_reset = &rs600_asic_reset, 424 .asic_reset = &rs600_asic_reset,
431 .gart_tlb_flush = &rs600_gart_tlb_flush, 425 .gart_tlb_flush = &rs600_gart_tlb_flush,
432 .gart_set_page = &rs600_gart_set_page, 426 .gart_set_page = &rs600_gart_set_page,
433 .cp_commit = &r100_cp_commit,
434 .ring_start = &r300_ring_start, 427 .ring_start = &r300_ring_start,
435 .ring_test = &r100_ring_test, 428 .ring_test = &r100_ring_test,
436 .ring_ib_execute = &r100_ring_ib_execute, 429 .ring_ib_execute = &r100_ring_ib_execute,
@@ -479,7 +472,6 @@ static struct radeon_asic rs690_asic = {
479 .asic_reset = &rs600_asic_reset, 472 .asic_reset = &rs600_asic_reset,
480 .gart_tlb_flush = &rs400_gart_tlb_flush, 473 .gart_tlb_flush = &rs400_gart_tlb_flush,
481 .gart_set_page = &rs400_gart_set_page, 474 .gart_set_page = &rs400_gart_set_page,
482 .cp_commit = &r100_cp_commit,
483 .ring_start = &r300_ring_start, 475 .ring_start = &r300_ring_start,
484 .ring_test = &r100_ring_test, 476 .ring_test = &r100_ring_test,
485 .ring_ib_execute = &r100_ring_ib_execute, 477 .ring_ib_execute = &r100_ring_ib_execute,
@@ -528,7 +520,6 @@ static struct radeon_asic rv515_asic = {
528 .asic_reset = &rs600_asic_reset, 520 .asic_reset = &rs600_asic_reset,
529 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush, 521 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
530 .gart_set_page = &rv370_pcie_gart_set_page, 522 .gart_set_page = &rv370_pcie_gart_set_page,
531 .cp_commit = &r100_cp_commit,
532 .ring_start = &rv515_ring_start, 523 .ring_start = &rv515_ring_start,
533 .ring_test = &r100_ring_test, 524 .ring_test = &r100_ring_test,
534 .ring_ib_execute = &r100_ring_ib_execute, 525 .ring_ib_execute = &r100_ring_ib_execute,
@@ -577,7 +568,6 @@ static struct radeon_asic r520_asic = {
577 .asic_reset = &rs600_asic_reset, 568 .asic_reset = &rs600_asic_reset,
578 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush, 569 .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
579 .gart_set_page = &rv370_pcie_gart_set_page, 570 .gart_set_page = &rv370_pcie_gart_set_page,
580 .cp_commit = &r100_cp_commit,
581 .ring_start = &rv515_ring_start, 571 .ring_start = &rv515_ring_start,
582 .ring_test = &r100_ring_test, 572 .ring_test = &r100_ring_test,
583 .ring_ib_execute = &r100_ring_ib_execute, 573 .ring_ib_execute = &r100_ring_ib_execute,
@@ -621,7 +611,6 @@ static struct radeon_asic r600_asic = {
621 .fini = &r600_fini, 611 .fini = &r600_fini,
622 .suspend = &r600_suspend, 612 .suspend = &r600_suspend,
623 .resume = &r600_resume, 613 .resume = &r600_resume,
624 .cp_commit = &r600_cp_commit,
625 .vga_set_state = &r600_vga_set_state, 614 .vga_set_state = &r600_vga_set_state,
626 .gpu_is_lockup = &r600_gpu_is_lockup, 615 .gpu_is_lockup = &r600_gpu_is_lockup,
627 .asic_reset = &r600_asic_reset, 616 .asic_reset = &r600_asic_reset,
@@ -669,7 +658,6 @@ static struct radeon_asic rs780_asic = {
669 .fini = &r600_fini, 658 .fini = &r600_fini,
670 .suspend = &r600_suspend, 659 .suspend = &r600_suspend,
671 .resume = &r600_resume, 660 .resume = &r600_resume,
672 .cp_commit = &r600_cp_commit,
673 .gpu_is_lockup = &r600_gpu_is_lockup, 661 .gpu_is_lockup = &r600_gpu_is_lockup,
674 .vga_set_state = &r600_vga_set_state, 662 .vga_set_state = &r600_vga_set_state,
675 .asic_reset = &r600_asic_reset, 663 .asic_reset = &r600_asic_reset,
@@ -717,7 +705,6 @@ static struct radeon_asic rv770_asic = {
717 .fini = &rv770_fini, 705 .fini = &rv770_fini,
718 .suspend = &rv770_suspend, 706 .suspend = &rv770_suspend,
719 .resume = &rv770_resume, 707 .resume = &rv770_resume,
720 .cp_commit = &r600_cp_commit,
721 .asic_reset = &r600_asic_reset, 708 .asic_reset = &r600_asic_reset,
722 .gpu_is_lockup = &r600_gpu_is_lockup, 709 .gpu_is_lockup = &r600_gpu_is_lockup,
723 .vga_set_state = &r600_vga_set_state, 710 .vga_set_state = &r600_vga_set_state,
@@ -765,7 +752,6 @@ static struct radeon_asic evergreen_asic = {
765 .fini = &evergreen_fini, 752 .fini = &evergreen_fini,
766 .suspend = &evergreen_suspend, 753 .suspend = &evergreen_suspend,
767 .resume = &evergreen_resume, 754 .resume = &evergreen_resume,
768 .cp_commit = &r600_cp_commit,
769 .gpu_is_lockup = &evergreen_gpu_is_lockup, 755 .gpu_is_lockup = &evergreen_gpu_is_lockup,
770 .asic_reset = &evergreen_asic_reset, 756 .asic_reset = &evergreen_asic_reset,
771 .vga_set_state = &r600_vga_set_state, 757 .vga_set_state = &r600_vga_set_state,
@@ -813,7 +799,6 @@ static struct radeon_asic sumo_asic = {
813 .fini = &evergreen_fini, 799 .fini = &evergreen_fini,
814 .suspend = &evergreen_suspend, 800 .suspend = &evergreen_suspend,
815 .resume = &evergreen_resume, 801 .resume = &evergreen_resume,
816 .cp_commit = &r600_cp_commit,
817 .gpu_is_lockup = &evergreen_gpu_is_lockup, 802 .gpu_is_lockup = &evergreen_gpu_is_lockup,
818 .asic_reset = &evergreen_asic_reset, 803 .asic_reset = &evergreen_asic_reset,
819 .vga_set_state = &r600_vga_set_state, 804 .vga_set_state = &r600_vga_set_state,
@@ -861,7 +846,6 @@ static struct radeon_asic btc_asic = {
861 .fini = &evergreen_fini, 846 .fini = &evergreen_fini,
862 .suspend = &evergreen_suspend, 847 .suspend = &evergreen_suspend,
863 .resume = &evergreen_resume, 848 .resume = &evergreen_resume,
864 .cp_commit = &r600_cp_commit,
865 .gpu_is_lockup = &evergreen_gpu_is_lockup, 849 .gpu_is_lockup = &evergreen_gpu_is_lockup,
866 .asic_reset = &evergreen_asic_reset, 850 .asic_reset = &evergreen_asic_reset,
867 .vga_set_state = &r600_vga_set_state, 851 .vga_set_state = &r600_vga_set_state,
@@ -909,7 +893,6 @@ static struct radeon_asic cayman_asic = {
909 .fini = &cayman_fini, 893 .fini = &cayman_fini,
910 .suspend = &cayman_suspend, 894 .suspend = &cayman_suspend,
911 .resume = &cayman_resume, 895 .resume = &cayman_resume,
912 .cp_commit = &r600_cp_commit,
913 .gpu_is_lockup = &cayman_gpu_is_lockup, 896 .gpu_is_lockup = &cayman_gpu_is_lockup,
914 .asic_reset = &cayman_asic_reset, 897 .asic_reset = &cayman_asic_reset,
915 .vga_set_state = &r600_vga_set_state, 898 .vga_set_state = &r600_vga_set_state,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 4f8447557298..4f9ba6d0330f 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -63,7 +63,6 @@ int r100_asic_reset(struct radeon_device *rdev);
63u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); 63u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
64void r100_pci_gart_tlb_flush(struct radeon_device *rdev); 64void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
65int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 65int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
66void r100_cp_commit(struct radeon_device *rdev, struct radeon_cp *cp);
67void r100_ring_start(struct radeon_device *rdev); 66void r100_ring_start(struct radeon_device *rdev);
68int r100_irq_set(struct radeon_device *rdev); 67int r100_irq_set(struct radeon_device *rdev);
69int r100_irq_process(struct radeon_device *rdev); 68int r100_irq_process(struct radeon_device *rdev);
@@ -297,7 +296,6 @@ int r600_resume(struct radeon_device *rdev);
297void r600_vga_set_state(struct radeon_device *rdev, bool state); 296void r600_vga_set_state(struct radeon_device *rdev, bool state);
298int r600_wb_init(struct radeon_device *rdev); 297int r600_wb_init(struct radeon_device *rdev);
299void r600_wb_fini(struct radeon_device *rdev); 298void r600_wb_fini(struct radeon_device *rdev);
300void r600_cp_commit(struct radeon_device *rdev, struct radeon_cp *cp);
301void r600_pcie_gart_tlb_flush(struct radeon_device *rdev); 299void r600_pcie_gart_tlb_flush(struct radeon_device *rdev);
302uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg); 300uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg);
303void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 301void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index bc8a5807f1a4..209834dbf18f 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -287,13 +287,9 @@ void radeon_ib_pool_fini(struct radeon_device *rdev)
287void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_cp *cp) 287void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_cp *cp)
288{ 288{
289 if (rdev->wb.enabled) 289 if (rdev->wb.enabled)
290 rdev->cp.rptr = le32_to_cpu(rdev->wb.wb[RADEON_WB_CP_RPTR_OFFSET/4]); 290 cp->rptr = le32_to_cpu(rdev->wb.wb[cp->rptr_offs/4]);
291 else { 291 else
292 if (rdev->family >= CHIP_R600) 292 cp->rptr = RREG32(cp->rptr_reg);
293 rdev->cp.rptr = RREG32(R600_CP_RB_RPTR);
294 else
295 rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR);
296 }
297 /* This works because ring_size is a power of 2 */ 293 /* This works because ring_size is a power of 2 */
298 cp->ring_free_dw = (cp->rptr + (cp->ring_size / 4)); 294 cp->ring_free_dw = (cp->rptr + (cp->ring_size / 4));
299 cp->ring_free_dw -= cp->wptr; 295 cp->ring_free_dw -= cp->wptr;
@@ -350,7 +346,8 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_cp *cp)
350 radeon_ring_write(cp, 2 << 30); 346 radeon_ring_write(cp, 2 << 30);
351 } 347 }
352 DRM_MEMORYBARRIER(); 348 DRM_MEMORYBARRIER();
353 radeon_cp_commit(rdev, cp); 349 WREG32(cp->wptr_reg, cp->wptr);
350 (void)RREG32(cp->wptr_reg);
354} 351}
355 352
356void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_cp *cp) 353void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_cp *cp)
@@ -365,11 +362,15 @@ void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_cp *cp)
365 mutex_unlock(&cp->mutex); 362 mutex_unlock(&cp->mutex);
366} 363}
367 364
368int radeon_ring_init(struct radeon_device *rdev, struct radeon_cp *cp, unsigned ring_size) 365int radeon_ring_init(struct radeon_device *rdev, struct radeon_cp *cp, unsigned ring_size,
366 unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg)
369{ 367{
370 int r; 368 int r;
371 369
372 cp->ring_size = ring_size; 370 cp->ring_size = ring_size;
371 cp->rptr_offs = rptr_offs;
372 cp->rptr_reg = rptr_reg;
373 cp->wptr_reg = wptr_reg;
373 /* Allocate ring buffer */ 374 /* Allocate ring buffer */
374 if (cp->ring_obj == NULL) { 375 if (cp->ring_obj == NULL) {
375 r = radeon_bo_create(rdev, cp->ring_size, PAGE_SIZE, true, 376 r = radeon_bo_create(rdev, cp->ring_size, PAGE_SIZE, true,
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 0d0d811fc80b..a2c60598d0f7 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1092,7 +1092,8 @@ static int rv770_startup(struct radeon_device *rdev)
1092 } 1092 }
1093 r600_irq_set(rdev); 1093 r600_irq_set(rdev);
1094 1094
1095 r = radeon_ring_init(rdev, cp, cp->ring_size); 1095 r = radeon_ring_init(rdev, cp, cp->ring_size, RADEON_WB_CP_RPTR_OFFSET,
1096 R600_CP_RB_RPTR, R600_CP_RB_WPTR);
1096 if (r) 1097 if (r)
1097 return r; 1098 return r;
1098 r = rv770_cp_load_microcode(rdev); 1099 r = rv770_cp_load_microcode(rdev);