diff options
| -rw-r--r-- | arch/x86/include/asm/microcode_amd.h | 7 | ||||
| -rw-r--r-- | arch/x86/kernel/microcode_amd.c | 13 | ||||
| -rw-r--r-- | arch/x86/kernel/microcode_amd_early.c | 239 |
3 files changed, 170 insertions, 89 deletions
diff --git a/arch/x86/include/asm/microcode_amd.h b/arch/x86/include/asm/microcode_amd.h index 4c019179a57d..b7b10b82d3e5 100644 --- a/arch/x86/include/asm/microcode_amd.h +++ b/arch/x86/include/asm/microcode_amd.h | |||
| @@ -61,11 +61,10 @@ extern int __apply_microcode_amd(struct microcode_amd *mc_amd); | |||
| 61 | extern int apply_microcode_amd(int cpu); | 61 | extern int apply_microcode_amd(int cpu); |
| 62 | extern enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size); | 62 | extern enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size); |
| 63 | 63 | ||
| 64 | #define PATCH_MAX_SIZE PAGE_SIZE | ||
| 65 | extern u8 amd_ucode_patch[PATCH_MAX_SIZE]; | ||
| 66 | |||
| 64 | #ifdef CONFIG_MICROCODE_AMD_EARLY | 67 | #ifdef CONFIG_MICROCODE_AMD_EARLY |
| 65 | #ifdef CONFIG_X86_32 | ||
| 66 | #define MPB_MAX_SIZE PAGE_SIZE | ||
| 67 | extern u8 amd_bsp_mpb[MPB_MAX_SIZE]; | ||
| 68 | #endif | ||
| 69 | extern void __init load_ucode_amd_bsp(void); | 68 | extern void __init load_ucode_amd_bsp(void); |
| 70 | extern void load_ucode_amd_ap(void); | 69 | extern void load_ucode_amd_ap(void); |
| 71 | extern int __init save_microcode_in_initrd_amd(void); | 70 | extern int __init save_microcode_in_initrd_amd(void); |
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c index c3d4cc972eca..4a6ff747aaad 100644 --- a/arch/x86/kernel/microcode_amd.c +++ b/arch/x86/kernel/microcode_amd.c | |||
| @@ -182,10 +182,10 @@ int __apply_microcode_amd(struct microcode_amd *mc_amd) | |||
| 182 | { | 182 | { |
| 183 | u32 rev, dummy; | 183 | u32 rev, dummy; |
| 184 | 184 | ||
| 185 | wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code); | 185 | native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code); |
| 186 | 186 | ||
| 187 | /* verify patch application was successful */ | 187 | /* verify patch application was successful */ |
| 188 | rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); | 188 | native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); |
| 189 | if (rev != mc_amd->hdr.patch_id) | 189 | if (rev != mc_amd->hdr.patch_id) |
| 190 | return -1; | 190 | return -1; |
| 191 | 191 | ||
| @@ -332,6 +332,9 @@ static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover) | |||
| 332 | patch->patch_id = mc_hdr->patch_id; | 332 | patch->patch_id = mc_hdr->patch_id; |
| 333 | patch->equiv_cpu = proc_id; | 333 | patch->equiv_cpu = proc_id; |
| 334 | 334 | ||
| 335 | pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n", | ||
| 336 | __func__, patch->patch_id, proc_id); | ||
| 337 | |||
| 335 | /* ... and add to cache. */ | 338 | /* ... and add to cache. */ |
| 336 | update_cache(patch); | 339 | update_cache(patch); |
| 337 | 340 | ||
| @@ -390,9 +393,9 @@ enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size) | |||
| 390 | if (cpu_data(smp_processor_id()).cpu_index == boot_cpu_data.cpu_index) { | 393 | if (cpu_data(smp_processor_id()).cpu_index == boot_cpu_data.cpu_index) { |
| 391 | struct ucode_patch *p = find_patch(smp_processor_id()); | 394 | struct ucode_patch *p = find_patch(smp_processor_id()); |
| 392 | if (p) { | 395 | if (p) { |
| 393 | memset(amd_bsp_mpb, 0, MPB_MAX_SIZE); | 396 | memset(amd_ucode_patch, 0, PATCH_MAX_SIZE); |
| 394 | memcpy(amd_bsp_mpb, p->data, min_t(u32, ksize(p->data), | 397 | memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data), |
| 395 | MPB_MAX_SIZE)); | 398 | PATCH_MAX_SIZE)); |
| 396 | } | 399 | } |
| 397 | } | 400 | } |
| 398 | #endif | 401 | #endif |
diff --git a/arch/x86/kernel/microcode_amd_early.c b/arch/x86/kernel/microcode_amd_early.c index 6073104ccaa3..8384c0fa206f 100644 --- a/arch/x86/kernel/microcode_amd_early.c +++ b/arch/x86/kernel/microcode_amd_early.c | |||
| @@ -2,6 +2,7 @@ | |||
| 2 | * Copyright (C) 2013 Advanced Micro Devices, Inc. | 2 | * Copyright (C) 2013 Advanced Micro Devices, Inc. |
| 3 | * | 3 | * |
| 4 | * Author: Jacob Shin <jacob.shin@amd.com> | 4 | * Author: Jacob Shin <jacob.shin@amd.com> |
| 5 | * Fixes: Borislav Petkov <bp@suse.de> | ||
| 5 | * | 6 | * |
| 6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
| @@ -15,10 +16,18 @@ | |||
| 15 | #include <asm/setup.h> | 16 | #include <asm/setup.h> |
| 16 | #include <asm/microcode_amd.h> | 17 | #include <asm/microcode_amd.h> |
| 17 | 18 | ||
| 18 | static bool ucode_loaded; | 19 | /* |
| 20 | * This points to the current valid container of microcode patches which we will | ||
| 21 | * save from the initrd before jettisoning its contents. | ||
| 22 | */ | ||
| 23 | static u8 *container; | ||
| 24 | static size_t container_size; | ||
| 25 | |||
| 19 | static u32 ucode_new_rev; | 26 | static u32 ucode_new_rev; |
| 20 | static unsigned long ucode_offset; | 27 | u8 amd_ucode_patch[PATCH_MAX_SIZE]; |
| 21 | static size_t ucode_size; | 28 | static u16 this_equiv_id; |
| 29 | |||
| 30 | struct cpio_data ucode_cpio; | ||
| 22 | 31 | ||
| 23 | /* | 32 | /* |
| 24 | * Microcode patch container file is prepended to the initrd in cpio format. | 33 | * Microcode patch container file is prepended to the initrd in cpio format. |
| @@ -32,9 +41,6 @@ static struct cpio_data __init find_ucode_in_initrd(void) | |||
| 32 | char *path; | 41 | char *path; |
| 33 | void *start; | 42 | void *start; |
| 34 | size_t size; | 43 | size_t size; |
| 35 | unsigned long *uoffset; | ||
| 36 | size_t *usize; | ||
| 37 | struct cpio_data cd; | ||
| 38 | 44 | ||
| 39 | #ifdef CONFIG_X86_32 | 45 | #ifdef CONFIG_X86_32 |
| 40 | struct boot_params *p; | 46 | struct boot_params *p; |
| @@ -47,30 +53,50 @@ static struct cpio_data __init find_ucode_in_initrd(void) | |||
| 47 | path = (char *)__pa_nodebug(ucode_path); | 53 | path = (char *)__pa_nodebug(ucode_path); |
| 48 | start = (void *)p->hdr.ramdisk_image; | 54 | start = (void *)p->hdr.ramdisk_image; |
| 49 | size = p->hdr.ramdisk_size; | 55 | size = p->hdr.ramdisk_size; |
| 50 | uoffset = (unsigned long *)__pa_nodebug(&ucode_offset); | ||
| 51 | usize = (size_t *)__pa_nodebug(&ucode_size); | ||
| 52 | #else | 56 | #else |
| 53 | path = ucode_path; | 57 | path = ucode_path; |
| 54 | start = (void *)(boot_params.hdr.ramdisk_image + PAGE_OFFSET); | 58 | start = (void *)(boot_params.hdr.ramdisk_image + PAGE_OFFSET); |
| 55 | size = boot_params.hdr.ramdisk_size; | 59 | size = boot_params.hdr.ramdisk_size; |
| 56 | uoffset = &ucode_offset; | ||
| 57 | usize = &ucode_size; | ||
| 58 | #endif | 60 | #endif |
| 59 | 61 | ||
| 60 | cd = find_cpio_data(path, start, size, &offset); | 62 | return find_cpio_data(path, start, size, &offset); |
| 61 | if (!cd.data) | 63 | } |
| 62 | return cd; | ||
| 63 | 64 | ||
| 64 | if (*(u32 *)cd.data != UCODE_MAGIC) { | 65 | static size_t compute_container_size(u8 *data, u32 total_size) |
| 65 | cd.data = NULL; | 66 | { |
| 66 | cd.size = 0; | 67 | size_t size = 0; |
| 67 | return cd; | 68 | u32 *header = (u32 *)data; |
| 68 | } | ||
| 69 | 69 | ||
| 70 | *uoffset = (u8 *)cd.data - (u8 *)start; | 70 | if (header[0] != UCODE_MAGIC || |
| 71 | *usize = cd.size; | 71 | header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */ |
| 72 | header[2] == 0) /* size */ | ||
| 73 | return size; | ||
| 72 | 74 | ||
| 73 | return cd; | 75 | size = header[2] + CONTAINER_HDR_SZ; |
| 76 | total_size -= size; | ||
| 77 | data += size; | ||
| 78 | |||
| 79 | while (total_size) { | ||
| 80 | u16 patch_size; | ||
| 81 | |||
| 82 | header = (u32 *)data; | ||
| 83 | |||
| 84 | if (header[0] != UCODE_UCODE_TYPE) | ||
| 85 | break; | ||
| 86 | |||
| 87 | /* | ||
| 88 | * Sanity-check patch size. | ||
| 89 | */ | ||
| 90 | patch_size = header[1]; | ||
| 91 | if (patch_size > PATCH_MAX_SIZE) | ||
| 92 | break; | ||
| 93 | |||
| 94 | size += patch_size + SECTION_HDR_SIZE; | ||
| 95 | data += patch_size + SECTION_HDR_SIZE; | ||
| 96 | total_size -= patch_size + SECTION_HDR_SIZE; | ||
| 97 | } | ||
| 98 | |||
| 99 | return size; | ||
| 74 | } | 100 | } |
| 75 | 101 | ||
| 76 | /* | 102 | /* |
| @@ -85,23 +111,22 @@ static struct cpio_data __init find_ucode_in_initrd(void) | |||
| 85 | static void apply_ucode_in_initrd(void *ucode, size_t size) | 111 | static void apply_ucode_in_initrd(void *ucode, size_t size) |
| 86 | { | 112 | { |
| 87 | struct equiv_cpu_entry *eq; | 113 | struct equiv_cpu_entry *eq; |
| 114 | size_t *cont_sz; | ||
| 88 | u32 *header; | 115 | u32 *header; |
| 89 | u8 *data; | 116 | u8 *data, **cont; |
| 90 | u16 eq_id = 0; | 117 | u16 eq_id = 0; |
| 91 | int offset, left; | 118 | int offset, left; |
| 92 | u32 rev, eax; | 119 | u32 rev, eax, ebx, ecx, edx; |
| 93 | u32 *new_rev; | 120 | u32 *new_rev; |
| 94 | unsigned long *uoffset; | ||
| 95 | size_t *usize; | ||
| 96 | 121 | ||
| 97 | #ifdef CONFIG_X86_32 | 122 | #ifdef CONFIG_X86_32 |
| 98 | new_rev = (u32 *)__pa_nodebug(&ucode_new_rev); | 123 | new_rev = (u32 *)__pa_nodebug(&ucode_new_rev); |
| 99 | uoffset = (unsigned long *)__pa_nodebug(&ucode_offset); | 124 | cont_sz = (size_t *)__pa_nodebug(&container_size); |
| 100 | usize = (size_t *)__pa_nodebug(&ucode_size); | 125 | cont = (u8 **)__pa_nodebug(&container); |
| 101 | #else | 126 | #else |
| 102 | new_rev = &ucode_new_rev; | 127 | new_rev = &ucode_new_rev; |
| 103 | uoffset = &ucode_offset; | 128 | cont_sz = &container_size; |
| 104 | usize = &ucode_size; | 129 | cont = &container; |
| 105 | #endif | 130 | #endif |
| 106 | 131 | ||
| 107 | data = ucode; | 132 | data = ucode; |
| @@ -109,23 +134,37 @@ static void apply_ucode_in_initrd(void *ucode, size_t size) | |||
| 109 | header = (u32 *)data; | 134 | header = (u32 *)data; |
| 110 | 135 | ||
| 111 | /* find equiv cpu table */ | 136 | /* find equiv cpu table */ |
| 112 | 137 | if (header[0] != UCODE_MAGIC || | |
| 113 | if (header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */ | 138 | header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */ |
| 114 | header[2] == 0) /* size */ | 139 | header[2] == 0) /* size */ |
| 115 | return; | 140 | return; |
| 116 | 141 | ||
| 117 | eax = cpuid_eax(0x00000001); | 142 | eax = 0x00000001; |
| 143 | ecx = 0; | ||
| 144 | native_cpuid(&eax, &ebx, &ecx, &edx); | ||
| 118 | 145 | ||
| 119 | while (left > 0) { | 146 | while (left > 0) { |
| 120 | eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ); | 147 | eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ); |
| 121 | 148 | ||
| 149 | *cont = data; | ||
| 150 | |||
| 151 | /* Advance past the container header */ | ||
| 122 | offset = header[2] + CONTAINER_HDR_SZ; | 152 | offset = header[2] + CONTAINER_HDR_SZ; |
| 123 | data += offset; | 153 | data += offset; |
| 124 | left -= offset; | 154 | left -= offset; |
| 125 | 155 | ||
| 126 | eq_id = find_equiv_id(eq, eax); | 156 | eq_id = find_equiv_id(eq, eax); |
| 127 | if (eq_id) | 157 | if (eq_id) { |
| 158 | this_equiv_id = eq_id; | ||
| 159 | *cont_sz = compute_container_size(*cont, left + offset); | ||
| 160 | |||
| 161 | /* | ||
| 162 | * truncate how much we need to iterate over in the | ||
| 163 | * ucode update loop below | ||
| 164 | */ | ||
| 165 | left = *cont_sz - offset; | ||
| 128 | break; | 166 | break; |
| 167 | } | ||
| 129 | 168 | ||
| 130 | /* | 169 | /* |
| 131 | * support multiple container files appended together. if this | 170 | * support multiple container files appended together. if this |
| @@ -145,19 +184,18 @@ static void apply_ucode_in_initrd(void *ucode, size_t size) | |||
| 145 | 184 | ||
| 146 | /* mark where the next microcode container file starts */ | 185 | /* mark where the next microcode container file starts */ |
| 147 | offset = data - (u8 *)ucode; | 186 | offset = data - (u8 *)ucode; |
| 148 | *uoffset += offset; | ||
| 149 | *usize -= offset; | ||
| 150 | ucode = data; | 187 | ucode = data; |
| 151 | } | 188 | } |
| 152 | 189 | ||
| 153 | if (!eq_id) { | 190 | if (!eq_id) { |
| 154 | *usize = 0; | 191 | *cont = NULL; |
| 192 | *cont_sz = 0; | ||
| 155 | return; | 193 | return; |
| 156 | } | 194 | } |
| 157 | 195 | ||
| 158 | /* find ucode and update if needed */ | 196 | /* find ucode and update if needed */ |
| 159 | 197 | ||
| 160 | rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax); | 198 | native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax); |
| 161 | 199 | ||
| 162 | while (left > 0) { | 200 | while (left > 0) { |
| 163 | struct microcode_amd *mc; | 201 | struct microcode_amd *mc; |
| @@ -168,73 +206,83 @@ static void apply_ucode_in_initrd(void *ucode, size_t size) | |||
| 168 | break; | 206 | break; |
| 169 | 207 | ||
| 170 | mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE); | 208 | mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE); |
| 171 | if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id) | 209 | |
| 172 | if (__apply_microcode_amd(mc) == 0) { | 210 | if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id) { |
| 211 | |||
| 212 | if (!__apply_microcode_amd(mc)) { | ||
| 173 | rev = mc->hdr.patch_id; | 213 | rev = mc->hdr.patch_id; |
| 174 | *new_rev = rev; | 214 | *new_rev = rev; |
| 215 | |||
| 216 | /* save ucode patch */ | ||
| 217 | memcpy(amd_ucode_patch, mc, | ||
| 218 | min_t(u32, header[1], PATCH_MAX_SIZE)); | ||
| 175 | } | 219 | } |
| 220 | } | ||
| 176 | 221 | ||
| 177 | offset = header[1] + SECTION_HDR_SIZE; | 222 | offset = header[1] + SECTION_HDR_SIZE; |
| 178 | data += offset; | 223 | data += offset; |
| 179 | left -= offset; | 224 | left -= offset; |
| 180 | } | 225 | } |
| 181 | |||
| 182 | /* mark where this microcode container file ends */ | ||
| 183 | offset = *usize - (data - (u8 *)ucode); | ||
| 184 | *usize -= offset; | ||
| 185 | |||
| 186 | if (!(*new_rev)) | ||
| 187 | *usize = 0; | ||
| 188 | } | 226 | } |
| 189 | 227 | ||
| 190 | void __init load_ucode_amd_bsp(void) | 228 | void __init load_ucode_amd_bsp(void) |
| 191 | { | 229 | { |
| 192 | struct cpio_data cd = find_ucode_in_initrd(); | 230 | struct cpio_data cp; |
| 193 | if (!cd.data) | 231 | void **data; |
| 232 | size_t *size; | ||
| 233 | |||
| 234 | #ifdef CONFIG_X86_32 | ||
| 235 | data = (void **)__pa_nodebug(&ucode_cpio.data); | ||
| 236 | size = (size_t *)__pa_nodebug(&ucode_cpio.size); | ||
| 237 | #else | ||
| 238 | data = &ucode_cpio.data; | ||
| 239 | size = &ucode_cpio.size; | ||
| 240 | #endif | ||
| 241 | |||
| 242 | cp = find_ucode_in_initrd(); | ||
| 243 | if (!cp.data) | ||
| 194 | return; | 244 | return; |
| 195 | 245 | ||
| 196 | apply_ucode_in_initrd(cd.data, cd.size); | 246 | *data = cp.data; |
| 247 | *size = cp.size; | ||
| 248 | |||
| 249 | apply_ucode_in_initrd(cp.data, cp.size); | ||
| 197 | } | 250 | } |
| 198 | 251 | ||
| 199 | #ifdef CONFIG_X86_32 | 252 | #ifdef CONFIG_X86_32 |
| 200 | u8 amd_bsp_mpb[MPB_MAX_SIZE]; | ||
| 201 | |||
| 202 | /* | 253 | /* |
| 203 | * On 32-bit, since AP's early load occurs before paging is turned on, we | 254 | * On 32-bit, since AP's early load occurs before paging is turned on, we |
| 204 | * cannot traverse cpu_equiv_table and pcache in kernel heap memory. So during | 255 | * cannot traverse cpu_equiv_table and pcache in kernel heap memory. So during |
| 205 | * cold boot, AP will apply_ucode_in_initrd() just like the BSP. During | 256 | * cold boot, AP will apply_ucode_in_initrd() just like the BSP. During |
| 206 | * save_microcode_in_initrd_amd() BSP's patch is copied to amd_bsp_mpb, which | 257 | * save_microcode_in_initrd_amd() BSP's patch is copied to amd_ucode_patch, |
| 207 | * is used upon resume from suspend. | 258 | * which is used upon resume from suspend. |
| 208 | */ | 259 | */ |
| 209 | void load_ucode_amd_ap(void) | 260 | void load_ucode_amd_ap(void) |
| 210 | { | 261 | { |
| 211 | struct microcode_amd *mc; | 262 | struct microcode_amd *mc; |
| 212 | unsigned long *initrd; | ||
| 213 | unsigned long *uoffset; | ||
| 214 | size_t *usize; | 263 | size_t *usize; |
| 215 | void *ucode; | 264 | void **ucode; |
| 216 | 265 | ||
| 217 | mc = (struct microcode_amd *)__pa(amd_bsp_mpb); | 266 | mc = (struct microcode_amd *)__pa(amd_ucode_patch); |
| 218 | if (mc->hdr.patch_id && mc->hdr.processor_rev_id) { | 267 | if (mc->hdr.patch_id && mc->hdr.processor_rev_id) { |
| 219 | __apply_microcode_amd(mc); | 268 | __apply_microcode_amd(mc); |
| 220 | return; | 269 | return; |
| 221 | } | 270 | } |
| 222 | 271 | ||
| 223 | initrd = (unsigned long *)__pa(&initrd_start); | 272 | ucode = (void *)__pa_nodebug(&container); |
| 224 | uoffset = (unsigned long *)__pa(&ucode_offset); | 273 | usize = (size_t *)__pa_nodebug(&container_size); |
| 225 | usize = (size_t *)__pa(&ucode_size); | ||
| 226 | 274 | ||
| 227 | if (!*usize || !*initrd) | 275 | if (!*ucode || !*usize) |
| 228 | return; | 276 | return; |
| 229 | 277 | ||
| 230 | ucode = (void *)((unsigned long)__pa(*initrd) + *uoffset); | 278 | apply_ucode_in_initrd(*ucode, *usize); |
| 231 | apply_ucode_in_initrd(ucode, *usize); | ||
| 232 | } | 279 | } |
| 233 | 280 | ||
| 234 | static void __init collect_cpu_sig_on_bsp(void *arg) | 281 | static void __init collect_cpu_sig_on_bsp(void *arg) |
| 235 | { | 282 | { |
| 236 | unsigned int cpu = smp_processor_id(); | 283 | unsigned int cpu = smp_processor_id(); |
| 237 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 284 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
| 285 | |||
| 238 | uci->cpu_sig.sig = cpuid_eax(0x00000001); | 286 | uci->cpu_sig.sig = cpuid_eax(0x00000001); |
| 239 | } | 287 | } |
| 240 | #else | 288 | #else |
| @@ -242,36 +290,54 @@ void load_ucode_amd_ap(void) | |||
| 242 | { | 290 | { |
| 243 | unsigned int cpu = smp_processor_id(); | 291 | unsigned int cpu = smp_processor_id(); |
| 244 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 292 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
| 293 | struct equiv_cpu_entry *eq; | ||
| 294 | struct microcode_amd *mc; | ||
| 245 | u32 rev, eax; | 295 | u32 rev, eax; |
| 296 | u16 eq_id; | ||
| 297 | |||
| 298 | /* Exit if called on the BSP. */ | ||
| 299 | if (!cpu) | ||
| 300 | return; | ||
| 301 | |||
| 302 | if (!container) | ||
| 303 | return; | ||
| 246 | 304 | ||
| 247 | rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax); | 305 | rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax); |
| 248 | eax = cpuid_eax(0x00000001); | ||
| 249 | 306 | ||
| 250 | uci->cpu_sig.rev = rev; | 307 | uci->cpu_sig.rev = rev; |
| 251 | uci->cpu_sig.sig = eax; | 308 | uci->cpu_sig.sig = eax; |
| 252 | 309 | ||
| 253 | if (cpu && !ucode_loaded) { | 310 | eax = cpuid_eax(0x00000001); |
| 254 | void *ucode; | 311 | eq = (struct equiv_cpu_entry *)(container + CONTAINER_HDR_SZ); |
| 255 | 312 | ||
| 256 | if (!ucode_size || !initrd_start) | 313 | eq_id = find_equiv_id(eq, eax); |
| 257 | return; | 314 | if (!eq_id) |
| 315 | return; | ||
| 316 | |||
| 317 | if (eq_id == this_equiv_id) { | ||
| 318 | mc = (struct microcode_amd *)amd_ucode_patch; | ||
| 258 | 319 | ||
| 259 | ucode = (void *)(initrd_start + ucode_offset); | 320 | if (mc && rev < mc->hdr.patch_id) { |
| 260 | eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff); | 321 | if (!__apply_microcode_amd(mc)) |
| 261 | if (load_microcode_amd(eax, ucode, ucode_size) != UCODE_OK) | 322 | ucode_new_rev = mc->hdr.patch_id; |
| 323 | } | ||
| 324 | |||
| 325 | } else { | ||
| 326 | if (!ucode_cpio.data) | ||
| 262 | return; | 327 | return; |
| 263 | 328 | ||
| 264 | ucode_loaded = true; | 329 | /* |
| 330 | * AP has a different equivalence ID than BSP, looks like | ||
| 331 | * mixed-steppings silicon so go through the ucode blob anew. | ||
| 332 | */ | ||
| 333 | apply_ucode_in_initrd(ucode_cpio.data, ucode_cpio.size); | ||
| 265 | } | 334 | } |
| 266 | |||
| 267 | apply_microcode_amd(cpu); | ||
| 268 | } | 335 | } |
| 269 | #endif | 336 | #endif |
| 270 | 337 | ||
| 271 | int __init save_microcode_in_initrd_amd(void) | 338 | int __init save_microcode_in_initrd_amd(void) |
| 272 | { | 339 | { |
| 273 | enum ucode_state ret; | 340 | enum ucode_state ret; |
| 274 | void *ucode; | ||
| 275 | u32 eax; | 341 | u32 eax; |
| 276 | 342 | ||
| 277 | #ifdef CONFIG_X86_32 | 343 | #ifdef CONFIG_X86_32 |
| @@ -280,22 +346,35 @@ int __init save_microcode_in_initrd_amd(void) | |||
| 280 | 346 | ||
| 281 | if (!uci->cpu_sig.sig) | 347 | if (!uci->cpu_sig.sig) |
| 282 | smp_call_function_single(bsp, collect_cpu_sig_on_bsp, NULL, 1); | 348 | smp_call_function_single(bsp, collect_cpu_sig_on_bsp, NULL, 1); |
| 349 | |||
| 350 | /* | ||
| 351 | * Take into account the fact that the ramdisk might get relocated | ||
| 352 | * and therefore we need to recompute the container's position in | ||
| 353 | * virtual memory space. | ||
| 354 | */ | ||
| 355 | container = (u8 *)(__va((u32)relocated_ramdisk) + | ||
| 356 | ((u32)container - boot_params.hdr.ramdisk_image)); | ||
| 283 | #endif | 357 | #endif |
| 284 | if (ucode_new_rev) | 358 | if (ucode_new_rev) |
| 285 | pr_info("microcode: updated early to new patch_level=0x%08x\n", | 359 | pr_info("microcode: updated early to new patch_level=0x%08x\n", |
| 286 | ucode_new_rev); | 360 | ucode_new_rev); |
| 287 | 361 | ||
| 288 | if (ucode_loaded || !ucode_size || !initrd_start) | 362 | if (!container) |
| 289 | return 0; | 363 | return -EINVAL; |
| 290 | 364 | ||
| 291 | ucode = (void *)(initrd_start + ucode_offset); | ||
| 292 | eax = cpuid_eax(0x00000001); | 365 | eax = cpuid_eax(0x00000001); |
| 293 | eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff); | 366 | eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff); |
| 294 | 367 | ||
| 295 | ret = load_microcode_amd(eax, ucode, ucode_size); | 368 | ret = load_microcode_amd(eax, container, container_size); |
| 296 | if (ret != UCODE_OK) | 369 | if (ret != UCODE_OK) |
| 297 | return -EINVAL; | 370 | return -EINVAL; |
| 298 | 371 | ||
| 299 | ucode_loaded = true; | 372 | /* |
| 373 | * This will be freed any msec now, stash patches for the current | ||
| 374 | * family and switch to patch cache for cpu hotplug, etc later. | ||
| 375 | */ | ||
| 376 | container = NULL; | ||
| 377 | container_size = 0; | ||
| 378 | |||
| 300 | return 0; | 379 | return 0; |
| 301 | } | 380 | } |
