diff options
| -rw-r--r-- | arch/arm/mach-pxa/time.c | 8 | ||||
| -rw-r--r-- | arch/arm/mach-sa1100/time.c | 8 |
2 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 7dad3f1465e0..b9b2057349eb 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
| @@ -132,11 +132,13 @@ static void __init pxa_timer_init(void) | |||
| 132 | tv.tv_sec = pxa_get_rtc_time(); | 132 | tv.tv_sec = pxa_get_rtc_time(); |
| 133 | do_settimeofday(&tv); | 133 | do_settimeofday(&tv); |
| 134 | 134 | ||
| 135 | OSMR0 = 0; /* set initial match at 0 */ | 135 | OIER = 0; /* disable any timer interrupts */ |
| 136 | OSCR = LATCH*2; /* push OSCR out of the way */ | ||
| 137 | OSMR0 = LATCH; /* set initial match */ | ||
| 136 | OSSR = 0xf; /* clear status on all timers */ | 138 | OSSR = 0xf; /* clear status on all timers */ |
| 137 | setup_irq(IRQ_OST0, &pxa_timer_irq); | 139 | setup_irq(IRQ_OST0, &pxa_timer_irq); |
| 138 | OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */ | 140 | OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ |
| 139 | OSCR = 0; /* initialize free-running timer, force first match */ | 141 | OSCR = 0; /* initialize free-running timer */ |
| 140 | } | 142 | } |
| 141 | 143 | ||
| 142 | #ifdef CONFIG_NO_IDLE_HZ | 144 | #ifdef CONFIG_NO_IDLE_HZ |
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 47e0420623fc..e4b435e634e4 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
| @@ -124,11 +124,13 @@ static void __init sa1100_timer_init(void) | |||
| 124 | tv.tv_sec = sa1100_get_rtc_time(); | 124 | tv.tv_sec = sa1100_get_rtc_time(); |
| 125 | do_settimeofday(&tv); | 125 | do_settimeofday(&tv); |
| 126 | 126 | ||
| 127 | OSMR0 = 0; /* set initial match at 0 */ | 127 | OIER = 0; /* disable any timer interrupts */ |
| 128 | OSCR = LATCH*2; /* push OSCR out of the way */ | ||
| 129 | OSMR0 = LATCH; /* set initial match */ | ||
| 128 | OSSR = 0xf; /* clear status on all timers */ | 130 | OSSR = 0xf; /* clear status on all timers */ |
| 129 | setup_irq(IRQ_OST0, &sa1100_timer_irq); | 131 | setup_irq(IRQ_OST0, &sa1100_timer_irq); |
| 130 | OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */ | 132 | OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ |
| 131 | OSCR = 0; /* initialize free-running timer, force first match */ | 133 | OSCR = 0; /* initialize free-running timer */ |
| 132 | } | 134 | } |
| 133 | 135 | ||
| 134 | #ifdef CONFIG_NO_IDLE_HZ | 136 | #ifdef CONFIG_NO_IDLE_HZ |
