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-rw-r--r--drivers/dma/coh901318.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index 544c46278f84..1656fdcdb6c2 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -928,6 +928,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
928 struct coh901318_chan *cohc = to_coh901318_chan(chan); 928 struct coh901318_chan *cohc = to_coh901318_chan(chan);
929 struct coh901318_lli *data; 929 struct coh901318_lli *data;
930 struct coh901318_desc *cohd; 930 struct coh901318_desc *cohd;
931 const struct coh901318_params *params;
931 struct scatterlist *sg; 932 struct scatterlist *sg;
932 int len = 0; 933 int len = 0;
933 int size; 934 int size;
@@ -935,6 +936,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
935 u32 ctrl_chained = cohc_chan_param(cohc)->ctrl_lli_chained; 936 u32 ctrl_chained = cohc_chan_param(cohc)->ctrl_lli_chained;
936 u32 ctrl = cohc_chan_param(cohc)->ctrl_lli; 937 u32 ctrl = cohc_chan_param(cohc)->ctrl_lli;
937 u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last; 938 u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last;
939 u32 config;
938 unsigned long flg; 940 unsigned long flg;
939 int ret; 941 int ret;
940 942
@@ -952,10 +954,14 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
952 /* Trigger interrupt after last lli */ 954 /* Trigger interrupt after last lli */
953 ctrl_last |= COH901318_CX_CTRL_TC_IRQ_ENABLE; 955 ctrl_last |= COH901318_CX_CTRL_TC_IRQ_ENABLE;
954 956
957 params = cohc_chan_param(cohc);
958 config = params->config;
959
955 if (direction == DMA_TO_DEVICE) { 960 if (direction == DMA_TO_DEVICE) {
956 u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE | 961 u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE |
957 COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE; 962 COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE;
958 963
964 config |= COH901318_CX_CFG_RM_MEMORY_TO_PRIMARY;
959 ctrl_chained |= tx_flags; 965 ctrl_chained |= tx_flags;
960 ctrl_last |= tx_flags; 966 ctrl_last |= tx_flags;
961 ctrl |= tx_flags; 967 ctrl |= tx_flags;
@@ -963,12 +969,15 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
963 u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST | 969 u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST |
964 COH901318_CX_CTRL_DST_ADDR_INC_ENABLE; 970 COH901318_CX_CTRL_DST_ADDR_INC_ENABLE;
965 971
972 config |= COH901318_CX_CFG_RM_PRIMARY_TO_MEMORY;
966 ctrl_chained |= rx_flags; 973 ctrl_chained |= rx_flags;
967 ctrl_last |= rx_flags; 974 ctrl_last |= rx_flags;
968 ctrl |= rx_flags; 975 ctrl |= rx_flags;
969 } else 976 } else
970 goto err_direction; 977 goto err_direction;
971 978
979 coh901318_set_conf(cohc, config);
980
972 /* The dma only supports transmitting packages up to 981 /* The dma only supports transmitting packages up to
973 * MAX_DMA_PACKET_SIZE. Calculate to total number of 982 * MAX_DMA_PACKET_SIZE. Calculate to total number of
974 * dma elemts required to send the entire sg list 983 * dma elemts required to send the entire sg list
@@ -1250,6 +1259,11 @@ static int __init coh901318_probe(struct platform_device *pdev)
1250 base->dma_memcpy.device_issue_pending = coh901318_issue_pending; 1259 base->dma_memcpy.device_issue_pending = coh901318_issue_pending;
1251 base->dma_memcpy.device_terminate_all = coh901318_terminate_all; 1260 base->dma_memcpy.device_terminate_all = coh901318_terminate_all;
1252 base->dma_memcpy.dev = &pdev->dev; 1261 base->dma_memcpy.dev = &pdev->dev;
1262 /*
1263 * This controller can only access address at even 32bit boundaries,
1264 * i.e. 2^2
1265 */
1266 base->dma_memcpy.copy_align = 2;
1253 err = dma_async_device_register(&base->dma_memcpy); 1267 err = dma_async_device_register(&base->dma_memcpy);
1254 1268
1255 if (err) 1269 if (err)