diff options
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c index f02fd9f443ff..a66b27c0fcab 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c | |||
| @@ -49,18 +49,23 @@ int | |||
| 49 | nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval) | 49 | nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval) |
| 50 | { | 50 | { |
| 51 | const u32 doff = (or * 0x800); | 51 | const u32 doff = (or * 0x800); |
| 52 | int load = -EINVAL; | 52 | |
| 53 | nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000); | 53 | nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000); |
| 54 | nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000); | 54 | nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000); |
| 55 | |||
| 55 | nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval); | 56 | nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval); |
| 56 | mdelay(9); | 57 | mdelay(9); |
| 57 | udelay(500); | 58 | udelay(500); |
| 58 | nv_wr32(priv, 0x61a00c + doff, 0x80000000); | 59 | loadval = nv_mask(priv, 0x61a00c + doff, 0xffffffff, 0x00000000); |
| 59 | load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27; | 60 | |
| 60 | nv_wr32(priv, 0x61a00c + doff, 0x00000000); | ||
| 61 | nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000); | 61 | nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000); |
| 62 | nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000); | 62 | nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000); |
| 63 | return load; | 63 | |
| 64 | nv_debug(priv, "DAC%d sense: 0x%08x\n", or, loadval); | ||
| 65 | if (!(loadval & 0x80000000)) | ||
| 66 | return -ETIMEDOUT; | ||
| 67 | |||
| 68 | return (loadval & 0x38000000) >> 27; | ||
| 64 | } | 69 | } |
| 65 | 70 | ||
| 66 | int | 71 | int |
