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-rw-r--r--drivers/edac/i3200_edac.c2
-rw-r--r--drivers/edac/i5000_edac.c4
-rw-r--r--drivers/edac/sb_edac.c7
3 files changed, 9 insertions, 4 deletions
diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c
index 47180a08edad..b6653a6fc5d5 100644
--- a/drivers/edac/i3200_edac.c
+++ b/drivers/edac/i3200_edac.c
@@ -391,7 +391,7 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
391 for (j = 0; j < nr_channels; j++) { 391 for (j = 0; j < nr_channels; j++) {
392 struct dimm_info *dimm = csrow->channels[j]->dimm; 392 struct dimm_info *dimm = csrow->channels[j]->dimm;
393 393
394 dimm->nr_pages = nr_pages / nr_channels; 394 dimm->nr_pages = nr_pages;
395 dimm->grain = nr_pages << PAGE_SHIFT; 395 dimm->grain = nr_pages << PAGE_SHIFT;
396 dimm->mtype = MEM_DDR2; 396 dimm->mtype = MEM_DDR2;
397 dimm->dtype = DEV_UNKNOWN; 397 dimm->dtype = DEV_UNKNOWN;
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index 39c63757c2a1..6a49dd00b81b 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -1012,6 +1012,10 @@ static void handle_channel(struct i5000_pvt *pvt, int slot, int channel,
1012 /* add the number of COLUMN bits */ 1012 /* add the number of COLUMN bits */
1013 addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr); 1013 addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr);
1014 1014
1015 /* Dual-rank memories have twice the size */
1016 if (dinfo->dual_rank)
1017 addrBits++;
1018
1015 addrBits += 6; /* add 64 bits per DIMM */ 1019 addrBits += 6; /* add 64 bits per DIMM */
1016 addrBits -= 20; /* divide by 2^^20 */ 1020 addrBits -= 20; /* divide by 2^^20 */
1017 addrBits -= 3; /* 8 bits per bytes */ 1021 addrBits -= 3; /* 8 bits per bytes */
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index f3b1f9fafa4b..5715b7c2c517 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -513,7 +513,8 @@ static int get_dimm_config(struct mem_ctl_info *mci)
513{ 513{
514 struct sbridge_pvt *pvt = mci->pvt_info; 514 struct sbridge_pvt *pvt = mci->pvt_info;
515 struct dimm_info *dimm; 515 struct dimm_info *dimm;
516 int i, j, banks, ranks, rows, cols, size, npages; 516 unsigned i, j, banks, ranks, rows, cols, npages;
517 u64 size;
517 u32 reg; 518 u32 reg;
518 enum edac_type mode; 519 enum edac_type mode;
519 enum mem_type mtype; 520 enum mem_type mtype;
@@ -585,10 +586,10 @@ static int get_dimm_config(struct mem_ctl_info *mci)
585 cols = numcol(mtr); 586 cols = numcol(mtr);
586 587
587 /* DDR3 has 8 I/O banks */ 588 /* DDR3 has 8 I/O banks */
588 size = (rows * cols * banks * ranks) >> (20 - 3); 589 size = ((u64)rows * cols * banks * ranks) >> (20 - 3);
589 npages = MiB_TO_PAGES(size); 590 npages = MiB_TO_PAGES(size);
590 591
591 edac_dbg(0, "mc#%d: channel %d, dimm %d, %d Mb (%d pages) bank: %d, rank: %d, row: %#x, col: %#x\n", 592 edac_dbg(0, "mc#%d: channel %d, dimm %d, %Ld Mb (%d pages) bank: %d, rank: %d, row: %#x, col: %#x\n",
592 pvt->sbridge_dev->mc, i, j, 593 pvt->sbridge_dev->mc, i, j,
593 size, npages, 594 size, npages,
594 banks, ranks, rows, cols); 595 banks, ranks, rows, cols);