diff options
| -rw-r--r-- | arch/powerpc/boot/dts/lite5200b.dts | 23 | ||||
| -rw-r--r-- | arch/powerpc/boot/dts/mpc5200b.dtsi | 25 |
2 files changed, 36 insertions, 12 deletions
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts index fb288bb882b6..5abb46c5cc95 100644 --- a/arch/powerpc/boot/dts/lite5200b.dts +++ b/arch/powerpc/boot/dts/lite5200b.dts | |||
| @@ -12,19 +12,34 @@ | |||
| 12 | 12 | ||
| 13 | /include/ "mpc5200b.dtsi" | 13 | /include/ "mpc5200b.dtsi" |
| 14 | 14 | ||
| 15 | &gpt0 { fsl,has-wdt; }; | ||
| 16 | &gpt2 { gpio-controller; }; | ||
| 17 | &gpt3 { gpio-controller; }; | ||
| 18 | |||
| 15 | / { | 19 | / { |
| 16 | model = "fsl,lite5200b"; | 20 | model = "fsl,lite5200b"; |
| 17 | compatible = "fsl,lite5200b"; | 21 | compatible = "fsl,lite5200b"; |
| 18 | 22 | ||
| 23 | leds { | ||
| 24 | compatible = "gpio-leds"; | ||
| 25 | tmr2 { | ||
| 26 | gpios = <&gpt2 0 1>; | ||
| 27 | }; | ||
| 28 | tmr3 { | ||
| 29 | gpios = <&gpt3 0 1>; | ||
| 30 | linux,default-trigger = "heartbeat"; | ||
| 31 | }; | ||
| 32 | led1 { gpios = <&gpio_wkup 2 1>; }; | ||
| 33 | led2 { gpios = <&gpio_simple 3 1>; }; | ||
| 34 | led3 { gpios = <&gpio_wkup 3 1>; }; | ||
| 35 | led4 { gpios = <&gpio_simple 2 1>; }; | ||
| 36 | }; | ||
| 37 | |||
| 19 | memory { | 38 | memory { |
| 20 | reg = <0x00000000 0x10000000>; // 256MB | 39 | reg = <0x00000000 0x10000000>; // 256MB |
| 21 | }; | 40 | }; |
| 22 | 41 | ||
| 23 | soc5200@f0000000 { | 42 | soc5200@f0000000 { |
| 24 | timer@600 { // General Purpose Timer | ||
| 25 | fsl,has-wdt; | ||
| 26 | }; | ||
| 27 | |||
| 28 | psc@2000 { // PSC1 | 43 | psc@2000 { // PSC1 |
| 29 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 44 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
| 30 | cell-index = <0>; | 45 | cell-index = <0>; |
diff --git a/arch/powerpc/boot/dts/mpc5200b.dtsi b/arch/powerpc/boot/dts/mpc5200b.dtsi index 39ed65a44c5f..969b2200b2f9 100644 --- a/arch/powerpc/boot/dts/mpc5200b.dtsi +++ b/arch/powerpc/boot/dts/mpc5200b.dtsi | |||
| @@ -64,50 +64,59 @@ | |||
| 64 | reg = <0x500 0x80>; | 64 | reg = <0x500 0x80>; |
| 65 | }; | 65 | }; |
| 66 | 66 | ||
| 67 | timer@600 { // General Purpose Timer | 67 | gpt0: timer@600 { // General Purpose Timer |
| 68 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 68 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
| 69 | #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode | ||
| 69 | reg = <0x600 0x10>; | 70 | reg = <0x600 0x10>; |
| 70 | interrupts = <1 9 0>; | 71 | interrupts = <1 9 0>; |
| 72 | // add 'fsl,has-wdt' to enable watchdog | ||
| 71 | }; | 73 | }; |
| 72 | 74 | ||
| 73 | timer@610 { // General Purpose Timer | 75 | gpt1: timer@610 { // General Purpose Timer |
| 74 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 76 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
| 77 | #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode | ||
| 75 | reg = <0x610 0x10>; | 78 | reg = <0x610 0x10>; |
| 76 | interrupts = <1 10 0>; | 79 | interrupts = <1 10 0>; |
| 77 | }; | 80 | }; |
| 78 | 81 | ||
| 79 | timer@620 { // General Purpose Timer | 82 | gpt2: timer@620 { // General Purpose Timer |
| 80 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 83 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
| 84 | #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode | ||
| 81 | reg = <0x620 0x10>; | 85 | reg = <0x620 0x10>; |
| 82 | interrupts = <1 11 0>; | 86 | interrupts = <1 11 0>; |
| 83 | }; | 87 | }; |
| 84 | 88 | ||
| 85 | timer@630 { // General Purpose Timer | 89 | gpt3: timer@630 { // General Purpose Timer |
| 86 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 90 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
| 91 | #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode | ||
| 87 | reg = <0x630 0x10>; | 92 | reg = <0x630 0x10>; |
| 88 | interrupts = <1 12 0>; | 93 | interrupts = <1 12 0>; |
| 89 | }; | 94 | }; |
| 90 | 95 | ||
| 91 | timer@640 { // General Purpose Timer | 96 | gpt4: timer@640 { // General Purpose Timer |
| 92 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 97 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
| 98 | #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode | ||
| 93 | reg = <0x640 0x10>; | 99 | reg = <0x640 0x10>; |
| 94 | interrupts = <1 13 0>; | 100 | interrupts = <1 13 0>; |
| 95 | }; | 101 | }; |
| 96 | 102 | ||
| 97 | timer@650 { // General Purpose Timer | 103 | gpt5: timer@650 { // General Purpose Timer |
| 98 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 104 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
| 105 | #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode | ||
| 99 | reg = <0x650 0x10>; | 106 | reg = <0x650 0x10>; |
| 100 | interrupts = <1 14 0>; | 107 | interrupts = <1 14 0>; |
| 101 | }; | 108 | }; |
| 102 | 109 | ||
| 103 | timer@660 { // General Purpose Timer | 110 | gpt6: timer@660 { // General Purpose Timer |
| 104 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 111 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
| 112 | #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode | ||
| 105 | reg = <0x660 0x10>; | 113 | reg = <0x660 0x10>; |
| 106 | interrupts = <1 15 0>; | 114 | interrupts = <1 15 0>; |
| 107 | }; | 115 | }; |
| 108 | 116 | ||
| 109 | timer@670 { // General Purpose Timer | 117 | gpt7: timer@670 { // General Purpose Timer |
| 110 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 118 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
| 119 | #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode | ||
| 111 | reg = <0x670 0x10>; | 120 | reg = <0x670 0x10>; |
| 112 | interrupts = <1 16 0>; | 121 | interrupts = <1 16 0>; |
| 113 | }; | 122 | }; |
