diff options
-rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 779c2069e632..7b88f96739bb 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c | |||
@@ -380,12 +380,15 @@ static struct samsung_mux_clock exynos4_mux_clks[] __initdata = { | |||
380 | }; | 380 | }; |
381 | 381 | ||
382 | /* list of mux clocks supported in exynos4210 soc */ | 382 | /* list of mux clocks supported in exynos4210 soc */ |
383 | static struct samsung_mux_clock exynos4210_mux_early[] __initdata = { | ||
384 | MUX(none, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP1, 0, 1), | ||
385 | }; | ||
386 | |||
383 | static struct samsung_mux_clock exynos4210_mux_clks[] __initdata = { | 387 | static struct samsung_mux_clock exynos4210_mux_clks[] __initdata = { |
384 | MUX(none, "mout_aclk200", sclk_ampll_p4210, SRC_TOP0, 12, 1), | 388 | MUX(none, "mout_aclk200", sclk_ampll_p4210, SRC_TOP0, 12, 1), |
385 | MUX(none, "mout_aclk100", sclk_ampll_p4210, SRC_TOP0, 16, 1), | 389 | MUX(none, "mout_aclk100", sclk_ampll_p4210, SRC_TOP0, 16, 1), |
386 | MUX(none, "mout_aclk160", sclk_ampll_p4210, SRC_TOP0, 20, 1), | 390 | MUX(none, "mout_aclk160", sclk_ampll_p4210, SRC_TOP0, 20, 1), |
387 | MUX(none, "mout_aclk133", sclk_ampll_p4210, SRC_TOP0, 24, 1), | 391 | MUX(none, "mout_aclk133", sclk_ampll_p4210, SRC_TOP0, 24, 1), |
388 | MUX(none, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP1, 0, 1), | ||
389 | MUX(none, "mout_mixer", mout_mixer_p4210, SRC_TV, 4, 1), | 392 | MUX(none, "mout_mixer", mout_mixer_p4210, SRC_TV, 4, 1), |
390 | MUX(none, "mout_dac", mout_dac_p4210, SRC_TV, 8, 1), | 393 | MUX(none, "mout_dac", mout_dac_p4210, SRC_TV, 8, 1), |
391 | MUX(none, "mout_g2d0", sclk_ampll_p4210, E4210_SRC_IMAGE, 0, 1), | 394 | MUX(none, "mout_g2d0", sclk_ampll_p4210, E4210_SRC_IMAGE, 0, 1), |
@@ -1032,6 +1035,9 @@ static void __init exynos4_clk_init(struct device_node *np, | |||
1032 | exynos4_clk_register_finpll(xom); | 1035 | exynos4_clk_register_finpll(xom); |
1033 | 1036 | ||
1034 | if (exynos4_soc == EXYNOS4210) { | 1037 | if (exynos4_soc == EXYNOS4210) { |
1038 | samsung_clk_register_mux(exynos4210_mux_early, | ||
1039 | ARRAY_SIZE(exynos4210_mux_early)); | ||
1040 | |||
1035 | samsung_clk_register_pll(exynos4210_plls, | 1041 | samsung_clk_register_pll(exynos4210_plls, |
1036 | ARRAY_SIZE(exynos4210_plls), reg_base); | 1042 | ARRAY_SIZE(exynos4210_plls), reg_base); |
1037 | } else { | 1043 | } else { |