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-rw-r--r--arch/sh/boards/mach-se/7780/irq.c17
-rw-r--r--arch/sh/drivers/pci/ops-r7780rp.c17
-rw-r--r--arch/sh/drivers/pci/ops-sdk7780.c17
-rw-r--r--arch/sh/drivers/pci/ops-se7780.c31
-rw-r--r--arch/sh/drivers/pci/ops-sh7785lcr.c17
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c24
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.h5
7 files changed, 33 insertions, 95 deletions
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c
index 44b61a597a15..b8d43b638fcf 100644
--- a/arch/sh/boards/mach-se/7780/irq.c
+++ b/arch/sh/boards/mach-se/7780/irq.c
@@ -49,4 +49,21 @@ void __init init_se7780_IRQ(void)
49 49
50 /* ICR1: detect low level(for 2ndcut) */ 50 /* ICR1: detect low level(for 2ndcut) */
51 ctrl_outl(0xAAAA0000, INTC_ICR1); 51 ctrl_outl(0xAAAA0000, INTC_ICR1);
52
53 /*
54 * FPGA PCISEL register initialize
55 *
56 * CPU || SLOT1 | SLOT2 | S-ATA | USB
57 * -------------------------------------
58 * INTA || INTA | INTD | -- | INTB
59 * -------------------------------------
60 * INTB || INTB | INTA | -- | INTC
61 * -------------------------------------
62 * INTC || INTC | INTB | INTA | --
63 * -------------------------------------
64 * INTD || INTD | INTC | -- | INTA
65 * -------------------------------------
66 */
67 ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
68 ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
52} 69}
diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c
index 044525df18c5..4ea136e4eacd 100644
--- a/arch/sh/drivers/pci/ops-r7780rp.c
+++ b/arch/sh/drivers/pci/ops-r7780rp.c
@@ -25,20 +25,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
25{ 25{
26 return irq_tab[slot]; 26 return irq_tab[slot];
27} 27}
28
29static struct sh4_pci_address_map sh7780_pci_map = {
30 .window0 = {
31 .base = SH7780_CS2_BASE_ADDR,
32 .size = 0x04000000,
33 },
34
35 .window1 = {
36 .base = SH7780_CS3_BASE_ADDR,
37 .size = 0x04000000,
38 },
39};
40
41int __init pcibios_init_platform(void)
42{
43 return sh7780_pcic_init(&sh7780_pci_map);
44}
diff --git a/arch/sh/drivers/pci/ops-sdk7780.c b/arch/sh/drivers/pci/ops-sdk7780.c
index 570fd71f6937..1d9a91bcfb7d 100644
--- a/arch/sh/drivers/pci/ops-sdk7780.c
+++ b/arch/sh/drivers/pci/ops-sdk7780.c
@@ -33,20 +33,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
33{ 33{
34 return sdk7780_irq_tab[pin-1][slot]; 34 return sdk7780_irq_tab[pin-1][slot];
35} 35}
36
37static struct sh4_pci_address_map sdk7780_pci_map = {
38 .window0 = {
39 .base = SH7780_CS2_BASE_ADDR,
40 .size = 0x04000000,
41 },
42 .window1 = {
43 .base = SH7780_CS3_BASE_ADDR,
44 .size = 0x04000000,
45 },
46};
47
48int __init pcibios_init_platform(void)
49{
50 printk(KERN_INFO "SH7780 PCI: Finished initializing PCI controller\n");
51 return sh7780_pcic_init(&sdk7780_pci_map);
52}
diff --git a/arch/sh/drivers/pci/ops-se7780.c b/arch/sh/drivers/pci/ops-se7780.c
index 8b0941515b0f..6c088ccfe475 100644
--- a/arch/sh/drivers/pci/ops-se7780.c
+++ b/arch/sh/drivers/pci/ops-se7780.c
@@ -40,34 +40,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
40{ 40{
41 return se7780_irq_tab[pin-1][slot]; 41 return se7780_irq_tab[pin-1][slot];
42} 42}
43
44static struct sh4_pci_address_map se7780_pci_map = {
45 .window0 = {
46 .base = SH7780_CS2_BASE_ADDR,
47 .size = 0x04000000,
48 },
49};
50
51int __init pcibios_init_platform(void)
52{
53 printk("SH7780 PCI: Finished initialization of the PCI controller\n");
54
55 /*
56 * FPGA PCISEL register initialize
57 *
58 * CPU || SLOT1 | SLOT2 | S-ATA | USB
59 * -------------------------------------
60 * INTA || INTA | INTD | -- | INTB
61 * -------------------------------------
62 * INTB || INTB | INTA | -- | INTC
63 * -------------------------------------
64 * INTC || INTC | INTB | INTA | --
65 * -------------------------------------
66 * INTD || INTD | INTC | -- | INTA
67 * -------------------------------------
68 */
69 ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
70 ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
71
72 return sh7780_pcic_init(&se7780_pci_map);
73}
diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c
index bac46b5d1580..0fe423e23508 100644
--- a/arch/sh/drivers/pci/ops-sh7785lcr.c
+++ b/arch/sh/drivers/pci/ops-sh7785lcr.c
@@ -25,20 +25,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
25{ 25{
26 return irq_tab[slot]; 26 return irq_tab[slot];
27} 27}
28
29static struct sh4_pci_address_map sh7785_pci_map = {
30 .window0 = {
31#if defined(CONFIG_32BIT)
32 .base = SH7780_32BIT_DDR_BASE_ADDR,
33 .size = 0x40000000,
34#else
35 .base = SH7780_CS0_BASE_ADDR,
36 .size = 0x20000000,
37#endif
38 },
39};
40
41int __init pcibios_init_platform(void)
42{
43 return sh7780_pcic_init(&sh7785_pci_map);
44}
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index eb217ddf025f..07c5529a273b 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -90,7 +90,19 @@ struct pci_channel board_pci_channels[] = {
90 { NULL, NULL, NULL, 0, 0 }, 90 { NULL, NULL, NULL, 0, 0 },
91}; 91};
92 92
93int __init sh7780_pcic_init(struct sh4_pci_address_map *map) 93static struct sh4_pci_address_map sh7780_pci_map = {
94 .window0 = {
95#if defined(CONFIG_32BIT)
96 .base = SH7780_32BIT_DDR_BASE_ADDR,
97 .size = 0x40000000,
98#else
99 .base = SH7780_CS0_BASE_ADDR,
100 .size = 0x20000000,
101#endif
102 },
103};
104
105int __init pcibios_init_platform(void)
94{ 106{
95 struct pci_channel *chan = &board_pci_channels[0]; 107 struct pci_channel *chan = &board_pci_channels[0];
96 u32 word; 108 u32 word;
@@ -114,14 +126,10 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
114 /* Set IO and Mem windows to local address 126 /* Set IO and Mem windows to local address
115 * Make PCI and local address the same for easy 1 to 1 mapping 127 * Make PCI and local address the same for easy 1 to 1 mapping
116 */ 128 */
117 pci_write_reg(chan, map->window0.size - 0xfffff, SH4_PCILSR0); 129 pci_write_reg(chan, sh7780_pci_map.window0.size - 0xfffff, SH4_PCILSR0);
118 pci_write_reg(chan, map->window1.size - 0xfffff, SH4_PCILSR1);
119 /* Set the values on window 0 PCI config registers */ 130 /* Set the values on window 0 PCI config registers */
120 pci_write_reg(chan, map->window0.base, SH4_PCILAR0); 131 pci_write_reg(chan, sh7780_pci_map.window0.base, SH4_PCILAR0);
121 pci_write_reg(chan, map->window0.base, SH7780_PCIMBAR0); 132 pci_write_reg(chan, sh7780_pci_map.window0.base, SH7780_PCIMBAR0);
122 /* Set the values on window 1 PCI config registers */
123 pci_write_reg(chan, map->window1.base, SH4_PCILAR1);
124 pci_write_reg(chan, map->window1.base, SH7780_PCIMBAR1);
125 133
126 /* Apply any last-minute PCIC fixups */ 134 /* Apply any last-minute PCIC fixups */
127 pci_fixup_pcic(chan); 135 pci_fixup_pcic(chan);
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
index 7a4f8a8dd690..4b65d4b26f75 100644
--- a/arch/sh/drivers/pci/pci-sh7780.h
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -104,9 +104,4 @@
104 104
105#define SH7780_32BIT_DDR_BASE_ADDR 0x40000000 105#define SH7780_32BIT_DDR_BASE_ADDR 0x40000000
106 106
107struct sh4_pci_address_map;
108
109/* arch/sh/drivers/pci/pci-sh7780.c */
110int sh7780_pcic_init(struct sh4_pci_address_map *map);
111
112#endif /* _PCI_SH7780_H_ */ 107#endif /* _PCI_SH7780_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-29 12:52:24 -0500