diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/ni.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_cs.c | 18 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_ring.c | 14 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 5 |
7 files changed, 25 insertions, 26 deletions
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 853800e8582f..fb6aa9dbd3a2 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
| @@ -879,12 +879,13 @@ void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) | |||
| 879 | #endif | 879 | #endif |
| 880 | (ib->gpu_addr & 0xFFFFFFFC)); | 880 | (ib->gpu_addr & 0xFFFFFFFC)); |
| 881 | radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFF); | 881 | radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFF); |
| 882 | radeon_ring_write(ring, ib->length_dw | (ib->vm_id << 24)); | 882 | radeon_ring_write(ring, ib->length_dw | |
| 883 | (ib->vm ? (ib->vm->id << 24) : 0)); | ||
| 883 | 884 | ||
| 884 | /* flush read cache over gart for this vmid */ | 885 | /* flush read cache over gart for this vmid */ |
| 885 | radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); | 886 | radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); |
| 886 | radeon_ring_write(ring, (CP_COHER_CNTL2 - PACKET3_SET_CONFIG_REG_START) >> 2); | 887 | radeon_ring_write(ring, (CP_COHER_CNTL2 - PACKET3_SET_CONFIG_REG_START) >> 2); |
| 887 | radeon_ring_write(ring, ib->vm_id); | 888 | radeon_ring_write(ring, ib->vm ? ib->vm->id : 0); |
| 888 | radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); | 889 | radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); |
| 889 | radeon_ring_write(ring, PACKET3_TC_ACTION_ENA | PACKET3_SH_ACTION_ENA); | 890 | radeon_ring_write(ring, PACKET3_TC_ACTION_ENA | PACKET3_SH_ACTION_ENA); |
| 890 | radeon_ring_write(ring, 0xFFFFFFFF); | 891 | radeon_ring_write(ring, 0xFFFFFFFF); |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index ff3a444836d4..bf3d7902f5a0 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
| @@ -3800,7 +3800,7 @@ int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
| 3800 | return r; | 3800 | return r; |
| 3801 | } | 3801 | } |
| 3802 | WREG32(scratch, 0xCAFEDEAD); | 3802 | WREG32(scratch, 0xCAFEDEAD); |
| 3803 | r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &ib, 256); | 3803 | r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &ib, NULL, 256); |
| 3804 | if (r) { | 3804 | if (r) { |
| 3805 | return r; | 3805 | return r; |
| 3806 | } | 3806 | } |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 459c251991c1..fd4289bb78d9 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
| @@ -2635,7 +2635,7 @@ int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
| 2635 | return r; | 2635 | return r; |
| 2636 | } | 2636 | } |
| 2637 | WREG32(scratch, 0xCAFEDEAD); | 2637 | WREG32(scratch, 0xCAFEDEAD); |
| 2638 | r = radeon_ib_get(rdev, ring->idx, &ib, 256); | 2638 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); |
| 2639 | if (r) { | 2639 | if (r) { |
| 2640 | DRM_ERROR("radeon: failed to get ib (%d).\n", r); | 2640 | DRM_ERROR("radeon: failed to get ib (%d).\n", r); |
| 2641 | return r; | 2641 | return r; |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index a1c4d4dac7df..a5470e793043 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -592,7 +592,7 @@ struct radeon_ib { | |||
| 592 | uint32_t *ptr; | 592 | uint32_t *ptr; |
| 593 | int ring; | 593 | int ring; |
| 594 | struct radeon_fence *fence; | 594 | struct radeon_fence *fence; |
| 595 | unsigned vm_id; | 595 | struct radeon_vm *vm; |
| 596 | bool is_const_ib; | 596 | bool is_const_ib; |
| 597 | struct radeon_fence *sync_to[RADEON_NUM_RINGS]; | 597 | struct radeon_fence *sync_to[RADEON_NUM_RINGS]; |
| 598 | struct radeon_semaphore *semaphore; | 598 | struct radeon_semaphore *semaphore; |
| @@ -734,7 +734,8 @@ struct si_rlc { | |||
| 734 | }; | 734 | }; |
| 735 | 735 | ||
| 736 | int radeon_ib_get(struct radeon_device *rdev, int ring, | 736 | int radeon_ib_get(struct radeon_device *rdev, int ring, |
| 737 | struct radeon_ib *ib, unsigned size); | 737 | struct radeon_ib *ib, struct radeon_vm *vm, |
| 738 | unsigned size); | ||
| 738 | void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); | 739 | void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); |
| 739 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, | 740 | int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, |
| 740 | struct radeon_ib *const_ib); | 741 | struct radeon_ib *const_ib); |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index b4a0db24f4dd..0a9d1eb719cf 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
| @@ -363,7 +363,7 @@ static int radeon_cs_ib_chunk(struct radeon_device *rdev, | |||
| 363 | * uncached). | 363 | * uncached). |
| 364 | */ | 364 | */ |
| 365 | r = radeon_ib_get(rdev, parser->ring, &parser->ib, | 365 | r = radeon_ib_get(rdev, parser->ring, &parser->ib, |
| 366 | ib_chunk->length_dw * 4); | 366 | NULL, ib_chunk->length_dw * 4); |
| 367 | if (r) { | 367 | if (r) { |
| 368 | DRM_ERROR("Failed to get ib !\n"); | 368 | DRM_ERROR("Failed to get ib !\n"); |
| 369 | return r; | 369 | return r; |
| @@ -380,7 +380,6 @@ static int radeon_cs_ib_chunk(struct radeon_device *rdev, | |||
| 380 | return r; | 380 | return r; |
| 381 | } | 381 | } |
| 382 | radeon_cs_sync_rings(parser); | 382 | radeon_cs_sync_rings(parser); |
| 383 | parser->ib.vm_id = 0; | ||
| 384 | r = radeon_ib_schedule(rdev, &parser->ib, NULL); | 383 | r = radeon_ib_schedule(rdev, &parser->ib, NULL); |
| 385 | if (r) { | 384 | if (r) { |
| 386 | DRM_ERROR("Failed to schedule IB !\n"); | 385 | DRM_ERROR("Failed to schedule IB !\n"); |
| @@ -426,7 +425,7 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev, | |||
| 426 | return -EINVAL; | 425 | return -EINVAL; |
| 427 | } | 426 | } |
| 428 | r = radeon_ib_get(rdev, parser->ring, &parser->const_ib, | 427 | r = radeon_ib_get(rdev, parser->ring, &parser->const_ib, |
| 429 | ib_chunk->length_dw * 4); | 428 | vm, ib_chunk->length_dw * 4); |
| 430 | if (r) { | 429 | if (r) { |
| 431 | DRM_ERROR("Failed to get const ib !\n"); | 430 | DRM_ERROR("Failed to get const ib !\n"); |
| 432 | return r; | 431 | return r; |
| @@ -450,7 +449,7 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev, | |||
| 450 | return -EINVAL; | 449 | return -EINVAL; |
| 451 | } | 450 | } |
| 452 | r = radeon_ib_get(rdev, parser->ring, &parser->ib, | 451 | r = radeon_ib_get(rdev, parser->ring, &parser->ib, |
| 453 | ib_chunk->length_dw * 4); | 452 | vm, ib_chunk->length_dw * 4); |
| 454 | if (r) { | 453 | if (r) { |
| 455 | DRM_ERROR("Failed to get ib !\n"); | 454 | DRM_ERROR("Failed to get ib !\n"); |
| 456 | return r; | 455 | return r; |
| @@ -478,19 +477,8 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev, | |||
| 478 | } | 477 | } |
| 479 | radeon_cs_sync_rings(parser); | 478 | radeon_cs_sync_rings(parser); |
| 480 | 479 | ||
| 481 | parser->ib.vm_id = vm->id; | ||
| 482 | /* ib pool is bind at 0 in virtual address space, | ||
| 483 | * so gpu_addr is the offset inside the pool bo | ||
| 484 | */ | ||
| 485 | parser->ib.gpu_addr = parser->ib.sa_bo->soffset; | ||
| 486 | |||
| 487 | if ((rdev->family >= CHIP_TAHITI) && | 480 | if ((rdev->family >= CHIP_TAHITI) && |
| 488 | (parser->chunk_const_ib_idx != -1)) { | 481 | (parser->chunk_const_ib_idx != -1)) { |
| 489 | parser->const_ib.vm_id = vm->id; | ||
| 490 | /* ib pool is bind at 0 in virtual address space, | ||
| 491 | * so gpu_addr is the offset inside the pool bo | ||
| 492 | */ | ||
| 493 | parser->const_ib.gpu_addr = parser->const_ib.sa_bo->soffset; | ||
| 494 | r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib); | 482 | r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib); |
| 495 | } else { | 483 | } else { |
| 496 | r = radeon_ib_schedule(rdev, &parser->ib, NULL); | 484 | r = radeon_ib_schedule(rdev, &parser->ib, NULL); |
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index 43c431a2686d..b9b1eddcd097 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c | |||
| @@ -58,7 +58,8 @@ int radeon_debugfs_sa_init(struct radeon_device *rdev); | |||
| 58 | * Returns 0 on success, error on failure. | 58 | * Returns 0 on success, error on failure. |
| 59 | */ | 59 | */ |
| 60 | int radeon_ib_get(struct radeon_device *rdev, int ring, | 60 | int radeon_ib_get(struct radeon_device *rdev, int ring, |
| 61 | struct radeon_ib *ib, unsigned size) | 61 | struct radeon_ib *ib, struct radeon_vm *vm, |
| 62 | unsigned size) | ||
| 62 | { | 63 | { |
| 63 | int i, r; | 64 | int i, r; |
| 64 | 65 | ||
| @@ -76,8 +77,15 @@ int radeon_ib_get(struct radeon_device *rdev, int ring, | |||
| 76 | ib->ring = ring; | 77 | ib->ring = ring; |
| 77 | ib->fence = NULL; | 78 | ib->fence = NULL; |
| 78 | ib->ptr = radeon_sa_bo_cpu_addr(ib->sa_bo); | 79 | ib->ptr = radeon_sa_bo_cpu_addr(ib->sa_bo); |
| 79 | ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo); | 80 | ib->vm = vm; |
| 80 | ib->vm_id = 0; | 81 | if (vm) { |
| 82 | /* ib pool is bind at 0 in virtual address space, | ||
| 83 | * so gpu_addr is the offset inside the pool bo | ||
| 84 | */ | ||
| 85 | ib->gpu_addr = ib->sa_bo->soffset; | ||
| 86 | } else { | ||
| 87 | ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo); | ||
| 88 | } | ||
| 81 | ib->is_const_ib = false; | 89 | ib->is_const_ib = false; |
| 82 | for (i = 0; i < RADEON_NUM_RINGS; ++i) | 90 | for (i = 0; i < RADEON_NUM_RINGS; ++i) |
| 83 | |||
