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-rw-r--r--Documentation/cris/README62
-rw-r--r--arch/cris/arch-v10/drivers/ds1302.c515
-rw-r--r--arch/cris/arch-v10/drivers/pcf8563.c380
-rw-r--r--arch/cris/arch-v10/kernel/fasttimer.c2
-rw-r--r--arch/cris/arch-v10/kernel/kgdb.c2
-rw-r--r--arch/cris/arch-v10/kernel/time.c9
-rw-r--r--arch/cris/arch-v10/lib/Makefile3
-rw-r--r--arch/cris/arch-v32/drivers/cryptocop.c6
-rw-r--r--arch/cris/arch-v32/kernel/ptrace.c2
-rw-r--r--arch/cris/arch-v32/kernel/time.c7
-rw-r--r--arch/cris/include/arch-v32/arch/cache.h2
-rw-r--r--arch/cris/include/asm/Kbuild1
-rw-r--r--arch/cris/include/asm/posix_types.h2
-rw-r--r--arch/cris/include/asm/rtc.h107
-rw-r--r--arch/cris/kernel/time.c76
-rw-r--r--arch/cris/kernel/vmlinux.lds.S1
-rw-r--r--arch/cris/mm/fault.c31
-rw-r--r--drivers/net/cris/eth_v10.c1
18 files changed, 71 insertions, 1138 deletions
diff --git a/Documentation/cris/README b/Documentation/cris/README
index d9b086869a60..8dbdb1a44429 100644
--- a/Documentation/cris/README
+++ b/Documentation/cris/README
@@ -1,38 +1,34 @@
1Linux 2.4 on the CRIS architecture 1Linux on the CRIS architecture
2================================== 2==============================
3$Id: README,v 1.7 2001/04/19 12:38:32 bjornw Exp $
4 3
5This is a port of Linux 2.4 to Axis Communications ETRAX 100LX embedded 4This is a port of Linux to Axis Communications ETRAX 100LX,
6network CPU. For more information about CRIS and ETRAX please see further 5ETRAX FS and ARTPEC-3 embedded network CPUs.
7below. 6
7For more information about CRIS and ETRAX please see further below.
8 8
9In order to compile this you need a version of gcc with support for the 9In order to compile this you need a version of gcc with support for the
10ETRAX chip family. Please see this link for more information on how to 10ETRAX chip family. Please see this link for more information on how to
11download the compiler and other tools useful when building and booting 11download the compiler and other tools useful when building and booting
12software for the ETRAX platform: 12software for the ETRAX platform:
13 13
14http://developer.axis.com/doc/software/devboard_lx/install-howto.html 14http://developer.axis.com/wiki/doku.php?id=axis:install-howto-2_20
15
16<more specific information should come in this document later>
17 15
18What is CRIS ? 16What is CRIS ?
19-------------- 17--------------
20 18
21CRIS is an acronym for 'Code Reduced Instruction Set'. It is the CPU 19CRIS is an acronym for 'Code Reduced Instruction Set'. It is the CPU
22architecture in Axis Communication AB's range of embedded network CPU's, 20architecture in Axis Communication AB's range of embedded network CPU's,
23called ETRAX. The latest CPU is called ETRAX 100LX, where LX stands for 21called ETRAX.
24'Linux' because the chip was designed to be a good host for the Linux
25operating system.
26 22
27The ETRAX 100LX chip 23The ETRAX 100LX chip
28-------------------- 24--------------------
29 25
30For reference, please see the press-release: 26For reference, please see the following link:
31 27
32http://www.axis.com/news/us/001101_etrax.htm 28http://www.axis.com/products/dev_etrax_100lx/index.htm
33 29
34The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad 30The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad
35range of built-in interfaces, all with modern scatter/gather DMA. 31range of built-in interfaces, all with modern scatter/gather DMA.
36 32
37Memory interfaces: 33Memory interfaces:
38 34
@@ -51,20 +47,28 @@ I/O interfaces:
51 * SCSI 47 * SCSI
52 * two parallel-ports 48 * two parallel-ports
53 * two generic 8-bit ports 49 * two generic 8-bit ports
54 50
55 (not all interfaces are available at the same time due to chip pin 51 (not all interfaces are available at the same time due to chip pin
56 multiplexing) 52 multiplexing)
57 53
58The previous version of the ETRAX, the ETRAX 100, sits in almost all of 54ETRAX 100LX is CRISv10 architecture.
59Axis shipping thin-servers like the Axis 2100 web camera or the ETRAX 100 55
60developer-board. It lacks an MMU so the Linux we run on that is a version 56
61of uClinux (Linux 2.0 without MM-support) ported to the CRIS architecture. 57The ETRAX FS and ARTPEC-3 chips
62The new Linux 2.4 port has full MM and needs a CPU with an MMU, so it will 58-------------------------------
63not run on the ETRAX 100.
64 59
65A version of the Axis developer-board with ETRAX 100LX (running Linux 60The ETRAX FS is a 200MHz 32-bit RISC processor with on-chip 16kB
662.4) is now available. For more information please see developer.axis.com. 61I-cache and 16kB D-cache and with a wide range of device interfaces
62including multiple high speed serial ports and an integrated USB 1.1 PHY.
67 63
64The ARTPEC-3 is a variant of the ETRAX FS with additional IO-units
65used by the Axis Communications network cameras.
66
67See below link for more information:
68
69http://www.axis.com/products/dev_etrax_fs/index.htm
70
71ETRAX FS and ARTPEC-3 are both CRISv32 architectures.
68 72
69Bootlog 73Bootlog
70------- 74-------
@@ -182,10 +186,6 @@ SwapFree: 0 kB
182-rwxr-xr-x 1 342 100 16252 Jan 01 00:00 telnetd 186-rwxr-xr-x 1 342 100 16252 Jan 01 00:00 telnetd
183 187
184 188
185(All programs are statically linked to the libc at this point - we have not ported the
186 shared libraries yet)
187
188
189 189
190 190
191 191
diff --git a/arch/cris/arch-v10/drivers/ds1302.c b/arch/cris/arch-v10/drivers/ds1302.c
deleted file mode 100644
index 74f99c688c8d..000000000000
--- a/arch/cris/arch-v10/drivers/ds1302.c
+++ /dev/null
@@ -1,515 +0,0 @@
1/*!***************************************************************************
2*!
3*! FILE NAME : ds1302.c
4*!
5*! DESCRIPTION: Implements an interface for the DS1302 RTC through Etrax I/O
6*!
7*! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init
8*!
9*! ---------------------------------------------------------------------------
10*!
11*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
12*!
13*!***************************************************************************/
14
15
16#include <linux/fs.h>
17#include <linux/init.h>
18#include <linux/mm.h>
19#include <linux/module.h>
20#include <linux/miscdevice.h>
21#include <linux/delay.h>
22#include <linux/mutex.h>
23#include <linux/bcd.h>
24#include <linux/capability.h>
25
26#include <asm/uaccess.h>
27#include <arch/svinto.h>
28#include <asm/io.h>
29#include <asm/rtc.h>
30#include <arch/io_interface_mux.h>
31
32#include "i2c.h"
33
34#define RTC_MAJOR_NR 121 /* local major, change later */
35
36static DEFINE_MUTEX(ds1302_mutex);
37static const char ds1302_name[] = "ds1302";
38
39/* The DS1302 might be connected to different bits on different products.
40 * It has three signals - SDA, SCL and RST. RST and SCL are always outputs,
41 * but SDA can have a selected direction.
42 * For now, only PORT_PB is hardcoded.
43 */
44
45/* The RST bit may be on either the Generic Port or Port PB. */
46#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
47#define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
48#define TK_RST_DIR(x)
49#else
50#define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
51#define TK_RST_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
52#endif
53
54
55#define TK_SDA_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
56#define TK_SCL_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
57
58#define TK_SDA_IN() ((*R_PORT_PB_READ >> CONFIG_ETRAX_DS1302_SDABIT) & 1)
59/* 1 is out, 0 is in */
60#define TK_SDA_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
61#define TK_SCL_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
62
63
64/*
65 * The reason for tempudelay and not udelay is that loops_per_usec
66 * (used in udelay) is not set when functions here are called from time.c
67 */
68
69static void tempudelay(int usecs)
70{
71 volatile int loops;
72
73 for(loops = usecs * 12; loops > 0; loops--)
74 /* nothing */;
75}
76
77
78/* Send 8 bits. */
79static void
80out_byte(unsigned char x)
81{
82 int i;
83 TK_SDA_DIR(1);
84 for (i = 8; i--;) {
85 /* The chip latches incoming bits on the rising edge of SCL. */
86 TK_SCL_OUT(0);
87 TK_SDA_OUT(x & 1);
88 tempudelay(1);
89 TK_SCL_OUT(1);
90 tempudelay(1);
91 x >>= 1;
92 }
93 TK_SDA_DIR(0);
94}
95
96static unsigned char
97in_byte(void)
98{
99 unsigned char x = 0;
100 int i;
101
102 /* Read byte. Bits come LSB first, on the falling edge of SCL.
103 * Assume SDA is in input direction already.
104 */
105 TK_SDA_DIR(0);
106
107 for (i = 8; i--;) {
108 TK_SCL_OUT(0);
109 tempudelay(1);
110 x >>= 1;
111 x |= (TK_SDA_IN() << 7);
112 TK_SCL_OUT(1);
113 tempudelay(1);
114 }
115
116 return x;
117}
118
119/* Prepares for a transaction by de-activating RST (active-low). */
120
121static void
122start(void)
123{
124 TK_SCL_OUT(0);
125 tempudelay(1);
126 TK_RST_OUT(0);
127 tempudelay(5);
128 TK_RST_OUT(1);
129}
130
131/* Ends a transaction by taking RST active again. */
132
133static void
134stop(void)
135{
136 tempudelay(2);
137 TK_RST_OUT(0);
138}
139
140/* Enable writing. */
141
142static void
143ds1302_wenable(void)
144{
145 start();
146 out_byte(0x8e); /* Write control register */
147 out_byte(0x00); /* Disable write protect bit 7 = 0 */
148 stop();
149}
150
151/* Disable writing. */
152
153static void
154ds1302_wdisable(void)
155{
156 start();
157 out_byte(0x8e); /* Write control register */
158 out_byte(0x80); /* Disable write protect bit 7 = 0 */
159 stop();
160}
161
162
163
164/* Read a byte from the selected register in the DS1302. */
165
166unsigned char
167ds1302_readreg(int reg)
168{
169 unsigned char x;
170
171 start();
172 out_byte(0x81 | (reg << 1)); /* read register */
173 x = in_byte();
174 stop();
175
176 return x;
177}
178
179/* Write a byte to the selected register. */
180
181void
182ds1302_writereg(int reg, unsigned char val)
183{
184#ifndef CONFIG_ETRAX_RTC_READONLY
185 int do_writereg = 1;
186#else
187 int do_writereg = 0;
188
189 if (reg == RTC_TRICKLECHARGER)
190 do_writereg = 1;
191#endif
192
193 if (do_writereg) {
194 ds1302_wenable();
195 start();
196 out_byte(0x80 | (reg << 1)); /* write register */
197 out_byte(val);
198 stop();
199 ds1302_wdisable();
200 }
201}
202
203void
204get_rtc_time(struct rtc_time *rtc_tm)
205{
206 unsigned long flags;
207
208 local_irq_save(flags);
209
210 rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
211 rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
212 rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
213 rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
214 rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
215 rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
216
217 local_irq_restore(flags);
218
219 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
220 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
221 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
222 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
223 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
224 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
225
226 /*
227 * Account for differences between how the RTC uses the values
228 * and how they are defined in a struct rtc_time;
229 */
230
231 if (rtc_tm->tm_year <= 69)
232 rtc_tm->tm_year += 100;
233
234 rtc_tm->tm_mon--;
235}
236
237static unsigned char days_in_mo[] =
238 {0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
239
240/* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */
241
242static int rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
243{
244 unsigned long flags;
245
246 switch(cmd) {
247 case RTC_RD_TIME: /* read the time/date from RTC */
248 {
249 struct rtc_time rtc_tm;
250
251 memset(&rtc_tm, 0, sizeof (struct rtc_time));
252 get_rtc_time(&rtc_tm);
253 if (copy_to_user((struct rtc_time*)arg, &rtc_tm, sizeof(struct rtc_time)))
254 return -EFAULT;
255 return 0;
256 }
257
258 case RTC_SET_TIME: /* set the RTC */
259 {
260 struct rtc_time rtc_tm;
261 unsigned char mon, day, hrs, min, sec, leap_yr;
262 unsigned int yrs;
263
264 if (!capable(CAP_SYS_TIME))
265 return -EPERM;
266
267 if (copy_from_user(&rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time)))
268 return -EFAULT;
269
270 yrs = rtc_tm.tm_year + 1900;
271 mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
272 day = rtc_tm.tm_mday;
273 hrs = rtc_tm.tm_hour;
274 min = rtc_tm.tm_min;
275 sec = rtc_tm.tm_sec;
276
277
278 if ((yrs < 1970) || (yrs > 2069))
279 return -EINVAL;
280
281 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
282
283 if ((mon > 12) || (day == 0))
284 return -EINVAL;
285
286 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
287 return -EINVAL;
288
289 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
290 return -EINVAL;
291
292 if (yrs >= 2000)
293 yrs -= 2000; /* RTC (0, 1, ... 69) */
294 else
295 yrs -= 1900; /* RTC (70, 71, ... 99) */
296
297 sec = bin2bcd(sec);
298 min = bin2bcd(min);
299 hrs = bin2bcd(hrs);
300 day = bin2bcd(day);
301 mon = bin2bcd(mon);
302 yrs = bin2bcd(yrs);
303
304 local_irq_save(flags);
305 CMOS_WRITE(yrs, RTC_YEAR);
306 CMOS_WRITE(mon, RTC_MONTH);
307 CMOS_WRITE(day, RTC_DAY_OF_MONTH);
308 CMOS_WRITE(hrs, RTC_HOURS);
309 CMOS_WRITE(min, RTC_MINUTES);
310 CMOS_WRITE(sec, RTC_SECONDS);
311 local_irq_restore(flags);
312
313 /* Notice that at this point, the RTC is updated but
314 * the kernel is still running with the old time.
315 * You need to set that separately with settimeofday
316 * or adjtimex.
317 */
318 return 0;
319 }
320
321 case RTC_SET_CHARGE: /* set the RTC TRICKLE CHARGE register */
322 {
323 int tcs_val;
324
325 if (!capable(CAP_SYS_TIME))
326 return -EPERM;
327
328 if(copy_from_user(&tcs_val, (int*)arg, sizeof(int)))
329 return -EFAULT;
330
331 tcs_val = RTC_TCR_PATTERN | (tcs_val & 0x0F);
332 ds1302_writereg(RTC_TRICKLECHARGER, tcs_val);
333 return 0;
334 }
335 case RTC_VL_READ:
336 {
337 /* TODO:
338 * Implement voltage low detection support
339 */
340 printk(KERN_WARNING "DS1302: RTC Voltage Low detection"
341 " is not supported\n");
342 return 0;
343 }
344 case RTC_VL_CLR:
345 {
346 /* TODO:
347 * Nothing to do since Voltage Low detection is not supported
348 */
349 return 0;
350 }
351 default:
352 return -ENOIOCTLCMD;
353 }
354}
355
356static long rtc_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
357{
358 int ret;
359
360 mutex_lock(&ds1302_mutex);
361 ret = rtc_ioctl(file, cmd, arg);
362 mutex_unlock(&ds1302_mutex);
363
364 return ret;
365}
366
367static void
368print_rtc_status(void)
369{
370 struct rtc_time tm;
371
372 get_rtc_time(&tm);
373
374 /*
375 * There is no way to tell if the luser has the RTC set for local
376 * time or for Universal Standard Time (GMT). Probably local though.
377 */
378
379 printk(KERN_INFO "rtc_time\t: %02d:%02d:%02d\n",
380 tm.tm_hour, tm.tm_min, tm.tm_sec);
381 printk(KERN_INFO "rtc_date\t: %04d-%02d-%02d\n",
382 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday);
383}
384
385/* The various file operations we support. */
386
387static const struct file_operations rtc_fops = {
388 .owner = THIS_MODULE,
389 .unlocked_ioctl = rtc_unlocked_ioctl,
390 .llseek = noop_llseek,
391};
392
393/* Probe for the chip by writing something to its RAM and try reading it back. */
394
395#define MAGIC_PATTERN 0x42
396
397static int __init
398ds1302_probe(void)
399{
400 int retval, res;
401
402 TK_RST_DIR(1);
403 TK_SCL_DIR(1);
404 TK_SDA_DIR(0);
405
406 /* Try to talk to timekeeper. */
407
408 ds1302_wenable();
409 start();
410 out_byte(0xc0); /* write RAM byte 0 */
411 out_byte(MAGIC_PATTERN); /* write something magic */
412 start();
413 out_byte(0xc1); /* read RAM byte 0 */
414
415 if((res = in_byte()) == MAGIC_PATTERN) {
416 stop();
417 ds1302_wdisable();
418 printk(KERN_INFO "%s: RTC found.\n", ds1302_name);
419 printk(KERN_INFO "%s: SDA, SCL, RST on PB%i, PB%i, %s%i\n",
420 ds1302_name,
421 CONFIG_ETRAX_DS1302_SDABIT,
422 CONFIG_ETRAX_DS1302_SCLBIT,
423#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
424 "GENIO",
425#else
426 "PB",
427#endif
428 CONFIG_ETRAX_DS1302_RSTBIT);
429 print_rtc_status();
430 retval = 1;
431 } else {
432 stop();
433 retval = 0;
434 }
435
436 return retval;
437}
438
439
440/* Just probe for the RTC and register the device to handle the ioctl needed. */
441
442int __init
443ds1302_init(void)
444{
445#ifdef CONFIG_ETRAX_I2C
446 i2c_init();
447#endif
448
449 if (!ds1302_probe()) {
450#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
451#if CONFIG_ETRAX_DS1302_RSTBIT == 27
452 /*
453 * The only way to set g27 to output is to enable ATA.
454 *
455 * Make sure that R_GEN_CONFIG is setup correct.
456 */
457 /* Allocating the ATA interface will grab almost all
458 * pins in I/O groups a, b, c and d. A consequence of
459 * allocating the ATA interface is that the fixed
460 * interfaces shared RAM, parallel port 0, parallel
461 * port 1, parallel port W, SCSI-8 port 0, SCSI-8 port
462 * 1, SCSI-W, serial port 2, serial port 3,
463 * synchronous serial port 3 and USB port 2 and almost
464 * all GPIO pins on port g cannot be used.
465 */
466 if (cris_request_io_interface(if_ata, "ds1302/ATA")) {
467 printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
468 return -1;
469 }
470
471#elif CONFIG_ETRAX_DS1302_RSTBIT == 0
472 if (cris_io_interface_allocate_pins(if_gpio_grp_a,
473 'g',
474 CONFIG_ETRAX_DS1302_RSTBIT,
475 CONFIG_ETRAX_DS1302_RSTBIT)) {
476 printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
477 return -1;
478 }
479
480 /* Set the direction of this bit to out. */
481 genconfig_shadow = ((genconfig_shadow &
482 ~IO_MASK(R_GEN_CONFIG, g0dir)) |
483 (IO_STATE(R_GEN_CONFIG, g0dir, out)));
484 *R_GEN_CONFIG = genconfig_shadow;
485#endif
486 if (!ds1302_probe()) {
487 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
488 return -1;
489 }
490#else
491 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
492 return -1;
493#endif
494 }
495 /* Initialise trickle charger */
496 ds1302_writereg(RTC_TRICKLECHARGER,
497 RTC_TCR_PATTERN |(CONFIG_ETRAX_DS1302_TRICKLE_CHARGE & 0x0F));
498 /* Start clock by resetting CLOCK_HALT */
499 ds1302_writereg(RTC_SECONDS, (ds1302_readreg(RTC_SECONDS) & 0x7F));
500 return 0;
501}
502
503static int __init ds1302_register(void)
504{
505 ds1302_init();
506 if (register_chrdev(RTC_MAJOR_NR, ds1302_name, &rtc_fops)) {
507 printk(KERN_INFO "%s: unable to get major %d for rtc\n",
508 ds1302_name, RTC_MAJOR_NR);
509 return -1;
510 }
511 return 0;
512
513}
514
515module_init(ds1302_register);
diff --git a/arch/cris/arch-v10/drivers/pcf8563.c b/arch/cris/arch-v10/drivers/pcf8563.c
deleted file mode 100644
index 9da056860c92..000000000000
--- a/arch/cris/arch-v10/drivers/pcf8563.c
+++ /dev/null
@@ -1,380 +0,0 @@
1/*
2 * PCF8563 RTC
3 *
4 * From Phillips' datasheet:
5 *
6 * The PCF8563 is a CMOS real-time clock/calendar optimized for low power
7 * consumption. A programmable clock output, interrupt output and voltage
8 * low detector are also provided. All address and data are transferred
9 * serially via two-line bidirectional I2C-bus. Maximum bus speed is
10 * 400 kbits/s. The built-in word address register is incremented
11 * automatically after each written or read byte.
12 *
13 * Copyright (c) 2002-2007, Axis Communications AB
14 * All rights reserved.
15 *
16 * Author: Tobias Anderberg <tobiasa@axis.com>.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/types.h>
23#include <linux/sched.h>
24#include <linux/init.h>
25#include <linux/fs.h>
26#include <linux/ioctl.h>
27#include <linux/delay.h>
28#include <linux/bcd.h>
29#include <linux/mutex.h>
30
31#include <asm/uaccess.h>
32#include <asm/io.h>
33#include <asm/rtc.h>
34
35#include "i2c.h"
36
37#define PCF8563_MAJOR 121 /* Local major number. */
38#define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */
39#define PCF8563_NAME "PCF8563"
40#define DRIVER_VERSION "$Revision: 1.24 $"
41
42/* I2C bus slave registers. */
43#define RTC_I2C_READ 0xa3
44#define RTC_I2C_WRITE 0xa2
45
46/* Two simple wrapper macros, saves a few keystrokes. */
47#define rtc_read(x) i2c_readreg(RTC_I2C_READ, x)
48#define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y)
49
50static DEFINE_MUTEX(pcf8563_mutex);
51static DEFINE_MUTEX(rtc_lock); /* Protect state etc */
52
53static const unsigned char days_in_month[] =
54 { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
55
56static long pcf8563_unlocked_ioctl(struct file *, unsigned int, unsigned long);
57
58/* Cache VL bit value read at driver init since writing the RTC_SECOND
59 * register clears the VL status.
60 */
61static int voltage_low;
62
63static const struct file_operations pcf8563_fops = {
64 .owner = THIS_MODULE,
65 .unlocked_ioctl = pcf8563_unlocked_ioctl,
66 .llseek = noop_llseek,
67};
68
69unsigned char
70pcf8563_readreg(int reg)
71{
72 unsigned char res = rtc_read(reg);
73
74 /* The PCF8563 does not return 0 for unimplemented bits. */
75 switch (reg) {
76 case RTC_SECONDS:
77 case RTC_MINUTES:
78 res &= 0x7F;
79 break;
80 case RTC_HOURS:
81 case RTC_DAY_OF_MONTH:
82 res &= 0x3F;
83 break;
84 case RTC_WEEKDAY:
85 res &= 0x07;
86 break;
87 case RTC_MONTH:
88 res &= 0x1F;
89 break;
90 case RTC_CONTROL1:
91 res &= 0xA8;
92 break;
93 case RTC_CONTROL2:
94 res &= 0x1F;
95 break;
96 case RTC_CLOCKOUT_FREQ:
97 case RTC_TIMER_CONTROL:
98 res &= 0x83;
99 break;
100 }
101 return res;
102}
103
104void
105pcf8563_writereg(int reg, unsigned char val)
106{
107 rtc_write(reg, val);
108}
109
110void
111get_rtc_time(struct rtc_time *tm)
112{
113 tm->tm_sec = rtc_read(RTC_SECONDS);
114 tm->tm_min = rtc_read(RTC_MINUTES);
115 tm->tm_hour = rtc_read(RTC_HOURS);
116 tm->tm_mday = rtc_read(RTC_DAY_OF_MONTH);
117 tm->tm_wday = rtc_read(RTC_WEEKDAY);
118 tm->tm_mon = rtc_read(RTC_MONTH);
119 tm->tm_year = rtc_read(RTC_YEAR);
120
121 if (tm->tm_sec & 0x80) {
122 printk(KERN_ERR "%s: RTC Voltage Low - reliable date/time "
123 "information is no longer guaranteed!\n", PCF8563_NAME);
124 }
125
126 tm->tm_year = bcd2bin(tm->tm_year) +
127 ((tm->tm_mon & 0x80) ? 100 : 0);
128 tm->tm_sec &= 0x7F;
129 tm->tm_min &= 0x7F;
130 tm->tm_hour &= 0x3F;
131 tm->tm_mday &= 0x3F;
132 tm->tm_wday &= 0x07; /* Not coded in BCD. */
133 tm->tm_mon &= 0x1F;
134
135 tm->tm_sec = bcd2bin(tm->tm_sec);
136 tm->tm_min = bcd2bin(tm->tm_min);
137 tm->tm_hour = bcd2bin(tm->tm_hour);
138 tm->tm_mday = bcd2bin(tm->tm_mday);
139 tm->tm_mon = bcd2bin(tm->tm_mon);
140 tm->tm_mon--; /* Month is 1..12 in RTC but 0..11 in linux */
141}
142
143int __init
144pcf8563_init(void)
145{
146 static int res;
147 static int first = 1;
148
149 if (!first)
150 return res;
151 first = 0;
152
153 /* Initiate the i2c protocol. */
154 res = i2c_init();
155 if (res < 0) {
156 printk(KERN_CRIT "pcf8563_init: Failed to init i2c.\n");
157 return res;
158 }
159
160 /*
161 * First of all we need to reset the chip. This is done by
162 * clearing control1, control2 and clk freq and resetting
163 * all alarms.
164 */
165 if (rtc_write(RTC_CONTROL1, 0x00) < 0)
166 goto err;
167
168 if (rtc_write(RTC_CONTROL2, 0x00) < 0)
169 goto err;
170
171 if (rtc_write(RTC_CLOCKOUT_FREQ, 0x00) < 0)
172 goto err;
173
174 if (rtc_write(RTC_TIMER_CONTROL, 0x03) < 0)
175 goto err;
176
177 /* Reset the alarms. */
178 if (rtc_write(RTC_MINUTE_ALARM, 0x80) < 0)
179 goto err;
180
181 if (rtc_write(RTC_HOUR_ALARM, 0x80) < 0)
182 goto err;
183
184 if (rtc_write(RTC_DAY_ALARM, 0x80) < 0)
185 goto err;
186
187 if (rtc_write(RTC_WEEKDAY_ALARM, 0x80) < 0)
188 goto err;
189
190 /* Check for low voltage, and warn about it. */
191 if (rtc_read(RTC_SECONDS) & 0x80) {
192 voltage_low = 1;
193 printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
194 "date/time information is no longer guaranteed!\n",
195 PCF8563_NAME);
196 }
197
198 return res;
199
200err:
201 printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME);
202 res = -1;
203 return res;
204}
205
206void __exit
207pcf8563_exit(void)
208{
209 unregister_chrdev(PCF8563_MAJOR, DEVICE_NAME);
210}
211
212/*
213 * ioctl calls for this driver. Why return -ENOTTY upon error? Because
214 * POSIX says so!
215 */
216static int pcf8563_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
217{
218 /* Some sanity checks. */
219 if (_IOC_TYPE(cmd) != RTC_MAGIC)
220 return -ENOTTY;
221
222 if (_IOC_NR(cmd) > RTC_MAX_IOCTL)
223 return -ENOTTY;
224
225 switch (cmd) {
226 case RTC_RD_TIME:
227 {
228 struct rtc_time tm;
229
230 mutex_lock(&rtc_lock);
231 memset(&tm, 0, sizeof tm);
232 get_rtc_time(&tm);
233
234 if (copy_to_user((struct rtc_time *) arg, &tm,
235 sizeof tm)) {
236 mutex_unlock(&rtc_lock);
237 return -EFAULT;
238 }
239
240 mutex_unlock(&rtc_lock);
241
242 return 0;
243 }
244 case RTC_SET_TIME:
245 {
246 int leap;
247 int year;
248 int century;
249 struct rtc_time tm;
250
251 memset(&tm, 0, sizeof tm);
252 if (!capable(CAP_SYS_TIME))
253 return -EPERM;
254
255 if (copy_from_user(&tm, (struct rtc_time *) arg, sizeof tm))
256 return -EFAULT;
257
258 /* Convert from struct tm to struct rtc_time. */
259 tm.tm_year += 1900;
260 tm.tm_mon += 1;
261
262 /*
263 * Check if tm.tm_year is a leap year. A year is a leap
264 * year if it is divisible by 4 but not 100, except
265 * that years divisible by 400 _are_ leap years.
266 */
267 year = tm.tm_year;
268 leap = (tm.tm_mon == 2) &&
269 ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
270
271 /* Perform some sanity checks. */
272 if ((tm.tm_year < 1970) ||
273 (tm.tm_mon > 12) ||
274 (tm.tm_mday == 0) ||
275 (tm.tm_mday > days_in_month[tm.tm_mon] + leap) ||
276 (tm.tm_wday >= 7) ||
277 (tm.tm_hour >= 24) ||
278 (tm.tm_min >= 60) ||
279 (tm.tm_sec >= 60))
280 return -EINVAL;
281
282 century = (tm.tm_year >= 2000) ? 0x80 : 0;
283 tm.tm_year = tm.tm_year % 100;
284
285 tm.tm_year = bin2bcd(tm.tm_year);
286 tm.tm_mon = bin2bcd(tm.tm_mon);
287 tm.tm_mday = bin2bcd(tm.tm_mday);
288 tm.tm_hour = bin2bcd(tm.tm_hour);
289 tm.tm_min = bin2bcd(tm.tm_min);
290 tm.tm_sec = bin2bcd(tm.tm_sec);
291 tm.tm_mon |= century;
292
293 mutex_lock(&rtc_lock);
294
295 rtc_write(RTC_YEAR, tm.tm_year);
296 rtc_write(RTC_MONTH, tm.tm_mon);
297 rtc_write(RTC_WEEKDAY, tm.tm_wday); /* Not coded in BCD. */
298 rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);
299 rtc_write(RTC_HOURS, tm.tm_hour);
300 rtc_write(RTC_MINUTES, tm.tm_min);
301 rtc_write(RTC_SECONDS, tm.tm_sec);
302
303 mutex_unlock(&rtc_lock);
304
305 return 0;
306 }
307 case RTC_VL_READ:
308 if (voltage_low) {
309 printk(KERN_ERR "%s: RTC Voltage Low - "
310 "reliable date/time information is no "
311 "longer guaranteed!\n", PCF8563_NAME);
312 }
313
314 if (copy_to_user((int *) arg, &voltage_low, sizeof(int)))
315 return -EFAULT;
316 return 0;
317
318 case RTC_VL_CLR:
319 {
320 /* Clear the VL bit in the seconds register in case
321 * the time has not been set already (which would
322 * have cleared it). This does not really matter
323 * because of the cached voltage_low value but do it
324 * anyway for consistency. */
325
326 int ret = rtc_read(RTC_SECONDS);
327
328 rtc_write(RTC_SECONDS, (ret & 0x7F));
329
330 /* Clear the cached value. */
331 voltage_low = 0;
332
333 return 0;
334 }
335 default:
336 return -ENOTTY;
337 }
338
339 return 0;
340}
341
342static long pcf8563_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
343{
344 int ret;
345
346 mutex_lock(&pcf8563_mutex);
347 ret = pcf8563_ioctl(filp, cmd, arg);
348 mutex_unlock(&pcf8563_mutex);
349
350 return ret;
351}
352
353static int __init pcf8563_register(void)
354{
355 if (pcf8563_init() < 0) {
356 printk(KERN_INFO "%s: Unable to initialize Real-Time Clock "
357 "Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
358 return -1;
359 }
360
361 if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) {
362 printk(KERN_INFO "%s: Unable to get major number %d for RTC device.\n",
363 PCF8563_NAME, PCF8563_MAJOR);
364 return -1;
365 }
366
367 printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,
368 DRIVER_VERSION);
369
370 /* Check for low voltage, and warn about it. */
371 if (voltage_low) {
372 printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
373 "information is no longer guaranteed!\n", PCF8563_NAME);
374 }
375
376 return 0;
377}
378
379module_init(pcf8563_register);
380module_exit(pcf8563_exit);
diff --git a/arch/cris/arch-v10/kernel/fasttimer.c b/arch/cris/arch-v10/kernel/fasttimer.c
index 8a8196ee8ce8..082f1890bacb 100644
--- a/arch/cris/arch-v10/kernel/fasttimer.c
+++ b/arch/cris/arch-v10/kernel/fasttimer.c
@@ -21,8 +21,6 @@
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <asm/delay.h> 23#include <asm/delay.h>
24#include <asm/rtc.h>
25
26 24
27#include <arch/svinto.h> 25#include <arch/svinto.h>
28#include <asm/fasttimer.h> 26#include <asm/fasttimer.h>
diff --git a/arch/cris/arch-v10/kernel/kgdb.c b/arch/cris/arch-v10/kernel/kgdb.c
index b579dd02e098..37e6d2c50b76 100644
--- a/arch/cris/arch-v10/kernel/kgdb.c
+++ b/arch/cris/arch-v10/kernel/kgdb.c
@@ -264,7 +264,7 @@ static int write_register (int regno, char *val);
264 264
265/* Write a value to a specified register in the stack of a thread other 265/* Write a value to a specified register in the stack of a thread other
266 than the current thread. */ 266 than the current thread. */
267static write_stack_register (int thread_id, int regno, char *valptr); 267static int write_stack_register(int thread_id, int regno, char *valptr);
268 268
269/* Read a value from a specified register in the register image. Returns the 269/* Read a value from a specified register in the register image. Returns the
270 status of the read operation. The register value is returned in valptr. */ 270 status of the read operation. The register value is returned in valptr. */
diff --git a/arch/cris/arch-v10/kernel/time.c b/arch/cris/arch-v10/kernel/time.c
index 20c85b5dc7d0..bcffcb6a9415 100644
--- a/arch/cris/arch-v10/kernel/time.c
+++ b/arch/cris/arch-v10/kernel/time.c
@@ -19,16 +19,12 @@
19#include <asm/signal.h> 19#include <asm/signal.h>
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/delay.h> 21#include <asm/delay.h>
22#include <asm/rtc.h>
23#include <asm/irq_regs.h> 22#include <asm/irq_regs.h>
24 23
25/* define this if you need to use print_timestamp */ 24/* define this if you need to use print_timestamp */
26/* it will make jiffies at 96 hz instead of 100 hz though */ 25/* it will make jiffies at 96 hz instead of 100 hz though */
27#undef USE_CASCADE_TIMERS 26#undef USE_CASCADE_TIMERS
28 27
29extern int set_rtc_mmss(unsigned long nowtime);
30extern int have_rtc;
31
32unsigned long get_ns_in_jiffie(void) 28unsigned long get_ns_in_jiffie(void)
33{ 29{
34 unsigned char timer_count, t1; 30 unsigned char timer_count, t1;
@@ -203,11 +199,6 @@ time_init(void)
203 */ 199 */
204 loops_per_usec = 50; 200 loops_per_usec = 50;
205 201
206 if(RTC_INIT() < 0)
207 have_rtc = 0;
208 else
209 have_rtc = 1;
210
211 /* Setup the etrax timers 202 /* Setup the etrax timers
212 * Base frequency is 25000 hz, divider 250 -> 100 HZ 203 * Base frequency is 25000 hz, divider 250 -> 100 HZ
213 * In normal mode, we use timer0, so timer1 is free. In cascade 204 * In normal mode, we use timer0, so timer1 is free. In cascade
diff --git a/arch/cris/arch-v10/lib/Makefile b/arch/cris/arch-v10/lib/Makefile
index 36e9a9c5239b..725153edb764 100644
--- a/arch/cris/arch-v10/lib/Makefile
+++ b/arch/cris/arch-v10/lib/Makefile
@@ -2,8 +2,5 @@
2# Makefile for Etrax-specific library files.. 2# Makefile for Etrax-specific library files..
3# 3#
4 4
5
6EXTRA_AFLAGS := -traditional
7
8lib-y = checksum.o checksumcopy.o string.o usercopy.o memset.o csumcpfruser.o 5lib-y = checksum.o checksumcopy.o string.o usercopy.o memset.o csumcpfruser.o
9 6
diff --git a/arch/cris/arch-v32/drivers/cryptocop.c b/arch/cris/arch-v32/drivers/cryptocop.c
index 642c6fed43d7..f8476d9e856b 100644
--- a/arch/cris/arch-v32/drivers/cryptocop.c
+++ b/arch/cris/arch-v32/drivers/cryptocop.c
@@ -1394,11 +1394,10 @@ static int create_md5_pad(int alloc_flag, unsigned long long hashed_length, char
1394 1394
1395 if (padlen < MD5_MIN_PAD_LENGTH) padlen += MD5_BLOCK_LENGTH; 1395 if (padlen < MD5_MIN_PAD_LENGTH) padlen += MD5_BLOCK_LENGTH;
1396 1396
1397 p = kmalloc(padlen, alloc_flag); 1397 p = kzalloc(padlen, alloc_flag);
1398 if (!p) return -ENOMEM; 1398 if (!p) return -ENOMEM;
1399 1399
1400 *p = 0x80; 1400 *p = 0x80;
1401 memset(p+1, 0, padlen - 1);
1402 1401
1403 DEBUG(printk("create_md5_pad: hashed_length=%lld bits == %lld bytes\n", bit_length, hashed_length)); 1402 DEBUG(printk("create_md5_pad: hashed_length=%lld bits == %lld bytes\n", bit_length, hashed_length));
1404 1403
@@ -1426,11 +1425,10 @@ static int create_sha1_pad(int alloc_flag, unsigned long long hashed_length, cha
1426 1425
1427 if (padlen < SHA1_MIN_PAD_LENGTH) padlen += SHA1_BLOCK_LENGTH; 1426 if (padlen < SHA1_MIN_PAD_LENGTH) padlen += SHA1_BLOCK_LENGTH;
1428 1427
1429 p = kmalloc(padlen, alloc_flag); 1428 p = kzalloc(padlen, alloc_flag);
1430 if (!p) return -ENOMEM; 1429 if (!p) return -ENOMEM;
1431 1430
1432 *p = 0x80; 1431 *p = 0x80;
1433 memset(p+1, 0, padlen - 1);
1434 1432
1435 DEBUG(printk("create_sha1_pad: hashed_length=%lld bits == %lld bytes\n", bit_length, hashed_length)); 1433 DEBUG(printk("create_sha1_pad: hashed_length=%lld bits == %lld bytes\n", bit_length, hashed_length));
1436 1434
diff --git a/arch/cris/arch-v32/kernel/ptrace.c b/arch/cris/arch-v32/kernel/ptrace.c
index f7ad9e8637df..f085229cf870 100644
--- a/arch/cris/arch-v32/kernel/ptrace.c
+++ b/arch/cris/arch-v32/kernel/ptrace.c
@@ -114,8 +114,6 @@ void user_disable_single_step(struct task_struct *child)
114void 114void
115ptrace_disable(struct task_struct *child) 115ptrace_disable(struct task_struct *child)
116{ 116{
117 unsigned long tmp;
118
119 /* Deconfigure SPC and S-bit. */ 117 /* Deconfigure SPC and S-bit. */
120 user_disable_single_step(child); 118 user_disable_single_step(child);
121 put_reg(child, PT_SPC, 0); 119 put_reg(child, PT_SPC, 0);
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
index 6773fc83a670..8c4b45efd7b6 100644
--- a/arch/cris/arch-v32/kernel/time.c
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -18,7 +18,6 @@
18#include <asm/signal.h> 18#include <asm/signal.h>
19#include <asm/io.h> 19#include <asm/io.h>
20#include <asm/delay.h> 20#include <asm/delay.h>
21#include <asm/rtc.h>
22#include <asm/irq.h> 21#include <asm/irq.h>
23#include <asm/irq_regs.h> 22#include <asm/irq_regs.h>
24 23
@@ -67,7 +66,6 @@ unsigned long timer_regs[NR_CPUS] =
67}; 66};
68 67
69extern int set_rtc_mmss(unsigned long nowtime); 68extern int set_rtc_mmss(unsigned long nowtime);
70extern int have_rtc;
71 69
72#ifdef CONFIG_CPU_FREQ 70#ifdef CONFIG_CPU_FREQ
73static int 71static int
@@ -265,11 +263,6 @@ void __init time_init(void)
265 */ 263 */
266 loops_per_usec = 50; 264 loops_per_usec = 50;
267 265
268 if(RTC_INIT() < 0)
269 have_rtc = 0;
270 else
271 have_rtc = 1;
272
273 /* Start CPU local timer. */ 266 /* Start CPU local timer. */
274 cris_timer_init(); 267 cris_timer_init();
275 268
diff --git a/arch/cris/include/arch-v32/arch/cache.h b/arch/cris/include/arch-v32/arch/cache.h
index 1de779f4f240..7caf25d58e6b 100644
--- a/arch/cris/include/arch-v32/arch/cache.h
+++ b/arch/cris/include/arch-v32/arch/cache.h
@@ -7,7 +7,7 @@
7#define L1_CACHE_BYTES 32 7#define L1_CACHE_BYTES 32
8#define L1_CACHE_SHIFT 5 8#define L1_CACHE_SHIFT 5
9 9
10#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 10#define __read_mostly __attribute__((__section__(".data..read_mostly")))
11 11
12void flush_dma_list(dma_descr_data *descr); 12void flush_dma_list(dma_descr_data *descr);
13void flush_dma_descr(dma_descr_data *descr, int flush_buf); 13void flush_dma_descr(dma_descr_data *descr, int flush_buf);
diff --git a/arch/cris/include/asm/Kbuild b/arch/cris/include/asm/Kbuild
index 956eea246b97..04d02a51c5e9 100644
--- a/arch/cris/include/asm/Kbuild
+++ b/arch/cris/include/asm/Kbuild
@@ -6,5 +6,4 @@ header-y += arch-v32/
6header-y += ethernet.h 6header-y += ethernet.h
7header-y += etraxgpio.h 7header-y += etraxgpio.h
8header-y += rs485.h 8header-y += rs485.h
9header-y += rtc.h
10header-y += sync_serial.h 9header-y += sync_serial.h
diff --git a/arch/cris/include/asm/posix_types.h b/arch/cris/include/asm/posix_types.h
index 72b3cd6eda0b..234891c74e2b 100644
--- a/arch/cris/include/asm/posix_types.h
+++ b/arch/cris/include/asm/posix_types.h
@@ -33,4 +33,6 @@ typedef int __kernel_ptrdiff_t;
33typedef unsigned short __kernel_old_dev_t; 33typedef unsigned short __kernel_old_dev_t;
34#define __kernel_old_dev_t __kernel_old_dev_t 34#define __kernel_old_dev_t __kernel_old_dev_t
35 35
36#include <asm-generic/posix_types.h>
37
36#endif /* __ARCH_CRIS_POSIX_TYPES_H */ 38#endif /* __ARCH_CRIS_POSIX_TYPES_H */
diff --git a/arch/cris/include/asm/rtc.h b/arch/cris/include/asm/rtc.h
deleted file mode 100644
index 17d3019529e1..000000000000
--- a/arch/cris/include/asm/rtc.h
+++ /dev/null
@@ -1,107 +0,0 @@
1
2#ifndef __RTC_H__
3#define __RTC_H__
4
5#ifdef CONFIG_ETRAX_DS1302
6 /* Dallas DS1302 clock/calendar register numbers. */
7# define RTC_SECONDS 0
8# define RTC_MINUTES 1
9# define RTC_HOURS 2
10# define RTC_DAY_OF_MONTH 3
11# define RTC_MONTH 4
12# define RTC_WEEKDAY 5
13# define RTC_YEAR 6
14# define RTC_CONTROL 7
15
16 /* Bits in CONTROL register. */
17# define RTC_CONTROL_WRITEPROTECT 0x80
18# define RTC_TRICKLECHARGER 8
19
20 /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */
21# define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */
22# define RTC_TCR_1DIOD 0x04 /* xxxx01xx */
23# define RTC_TCR_2DIOD 0x08 /* xxxx10xx */
24# define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */
25# define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */
26# define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */
27# define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */
28
29#elif defined(CONFIG_ETRAX_PCF8563)
30 /* I2C bus slave registers. */
31# define RTC_I2C_READ 0xa3
32# define RTC_I2C_WRITE 0xa2
33
34 /* Phillips PCF8563 registers. */
35# define RTC_CONTROL1 0x00 /* Control/Status register 1. */
36# define RTC_CONTROL2 0x01 /* Control/Status register 2. */
37# define RTC_CLOCKOUT_FREQ 0x0d /* CLKOUT frequency. */
38# define RTC_TIMER_CONTROL 0x0e /* Timer control. */
39# define RTC_TIMER_CNTDOWN 0x0f /* Timer countdown. */
40
41 /* BCD encoded clock registers. */
42# define RTC_SECONDS 0x02
43# define RTC_MINUTES 0x03
44# define RTC_HOURS 0x04
45# define RTC_DAY_OF_MONTH 0x05
46# define RTC_WEEKDAY 0x06 /* Not coded in BCD! */
47# define RTC_MONTH 0x07
48# define RTC_YEAR 0x08
49# define RTC_MINUTE_ALARM 0x09
50# define RTC_HOUR_ALARM 0x0a
51# define RTC_DAY_ALARM 0x0b
52# define RTC_WEEKDAY_ALARM 0x0c
53
54#endif
55
56#ifdef CONFIG_ETRAX_DS1302
57extern unsigned char ds1302_readreg(int reg);
58extern void ds1302_writereg(int reg, unsigned char val);
59extern int ds1302_init(void);
60# define CMOS_READ(x) ds1302_readreg(x)
61# define CMOS_WRITE(val,reg) ds1302_writereg(reg,val)
62# define RTC_INIT() ds1302_init()
63#elif defined(CONFIG_ETRAX_PCF8563)
64extern unsigned char pcf8563_readreg(int reg);
65extern void pcf8563_writereg(int reg, unsigned char val);
66extern int pcf8563_init(void);
67# define CMOS_READ(x) pcf8563_readreg(x)
68# define CMOS_WRITE(val,reg) pcf8563_writereg(reg,val)
69# define RTC_INIT() pcf8563_init()
70#else
71 /* No RTC configured so we shouldn't try to access any. */
72# define CMOS_READ(x) 42
73# define CMOS_WRITE(x,y)
74# define RTC_INIT() (-1)
75#endif
76
77/*
78 * The struct used to pass data via the following ioctl. Similar to the
79 * struct tm in <time.h>, but it needs to be here so that the kernel
80 * source is self contained, allowing cross-compiles, etc. etc.
81 */
82struct rtc_time {
83 int tm_sec;
84 int tm_min;
85 int tm_hour;
86 int tm_mday;
87 int tm_mon;
88 int tm_year;
89 int tm_wday;
90 int tm_yday;
91 int tm_isdst;
92};
93
94/* ioctl() calls that are permitted to the /dev/rtc interface. */
95#define RTC_MAGIC 'p'
96/* Read RTC time. */
97#define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time)
98/* Set RTC time. */
99#define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time)
100#define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int)
101/* Voltage low detector */
102#define RTC_VL_READ _IOR(RTC_MAGIC, 0x13, int)
103/* Clear voltage low information */
104#define RTC_VL_CLR _IO(RTC_MAGIC, 0x14)
105#define RTC_MAX_IOCTL 0x14
106
107#endif /* __RTC_H__ */
diff --git a/arch/cris/kernel/time.c b/arch/cris/kernel/time.c
index 4e73092e85c0..277ffc459e4b 100644
--- a/arch/cris/kernel/time.c
+++ b/arch/cris/kernel/time.c
@@ -21,7 +21,6 @@
21 * 21 *
22 */ 22 */
23 23
24#include <asm/rtc.h>
25#include <linux/errno.h> 24#include <linux/errno.h>
26#include <linux/module.h> 25#include <linux/module.h>
27#include <linux/param.h> 26#include <linux/param.h>
@@ -32,7 +31,8 @@
32#include <linux/profile.h> 31#include <linux/profile.h>
33#include <linux/sched.h> /* just for sched_clock() - funny that */ 32#include <linux/sched.h> /* just for sched_clock() - funny that */
34 33
35int have_rtc; /* used to remember if we have an RTC or not */; 34
35#define D(x)
36 36
37#define TICK_SIZE tick 37#define TICK_SIZE tick
38 38
@@ -50,78 +50,16 @@ u32 arch_gettimeoffset(void)
50} 50}
51#endif 51#endif
52 52
53/*
54 * BUG: This routine does not handle hour overflow properly; it just
55 * sets the minutes. Usually you'll only notice that after reboot!
56 */
57
58int set_rtc_mmss(unsigned long nowtime) 53int set_rtc_mmss(unsigned long nowtime)
59{ 54{
60 int retval = 0; 55 D(printk(KERN_DEBUG "set_rtc_mmss(%lu)\n", nowtime));
61 int real_seconds, real_minutes, cmos_minutes; 56 return 0;
62
63 printk(KERN_DEBUG "set_rtc_mmss(%lu)\n", nowtime);
64
65 if(!have_rtc)
66 return 0;
67
68 cmos_minutes = CMOS_READ(RTC_MINUTES);
69 cmos_minutes = bcd2bin(cmos_minutes);
70
71 /*
72 * since we're only adjusting minutes and seconds,
73 * don't interfere with hour overflow. This avoids
74 * messing with unknown time zones but requires your
75 * RTC not to be off by more than 15 minutes
76 */
77 real_seconds = nowtime % 60;
78 real_minutes = nowtime / 60;
79 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
80 real_minutes += 30; /* correct for half hour time zone */
81 real_minutes %= 60;
82
83 if (abs(real_minutes - cmos_minutes) < 30) {
84 real_seconds = bin2bcd(real_seconds);
85 real_minutes = bin2bcd(real_minutes);
86 CMOS_WRITE(real_seconds,RTC_SECONDS);
87 CMOS_WRITE(real_minutes,RTC_MINUTES);
88 } else {
89 printk_once(KERN_NOTICE
90 "set_rtc_mmss: can't update from %d to %d\n",
91 cmos_minutes, real_minutes);
92 retval = -1;
93 }
94
95 return retval;
96} 57}
97 58
98/* grab the time from the RTC chip */ 59/* grab the time from the RTC chip */
99 60unsigned long get_cmos_time(void)
100unsigned long
101get_cmos_time(void)
102{ 61{
103 unsigned int year, mon, day, hour, min, sec; 62 return 0;
104 if(!have_rtc)
105 return 0;
106
107 sec = CMOS_READ(RTC_SECONDS);
108 min = CMOS_READ(RTC_MINUTES);
109 hour = CMOS_READ(RTC_HOURS);
110 day = CMOS_READ(RTC_DAY_OF_MONTH);
111 mon = CMOS_READ(RTC_MONTH);
112 year = CMOS_READ(RTC_YEAR);
113
114 sec = bcd2bin(sec);
115 min = bcd2bin(min);
116 hour = bcd2bin(hour);
117 day = bcd2bin(day);
118 mon = bcd2bin(mon);
119 year = bcd2bin(year);
120
121 if ((year += 1900) < 1970)
122 year += 100;
123
124 return mktime(year, mon, day, hour, min, sec);
125} 63}
126 64
127 65
@@ -132,7 +70,7 @@ int update_persistent_clock(struct timespec now)
132 70
133void read_persistent_clock(struct timespec *ts) 71void read_persistent_clock(struct timespec *ts)
134{ 72{
135 ts->tv_sec = get_cmos_time(); 73 ts->tv_sec = 0;
136 ts->tv_nsec = 0; 74 ts->tv_nsec = 0;
137} 75}
138 76
diff --git a/arch/cris/kernel/vmlinux.lds.S b/arch/cris/kernel/vmlinux.lds.S
index a6990cb0f098..a68b983dcea1 100644
--- a/arch/cris/kernel/vmlinux.lds.S
+++ b/arch/cris/kernel/vmlinux.lds.S
@@ -52,6 +52,7 @@ SECTIONS
52 52
53 EXCEPTION_TABLE(4) 53 EXCEPTION_TABLE(4)
54 54
55 _sdata = .;
55 RODATA 56 RODATA
56 57
57 . = ALIGN (4); 58 . = ALIGN (4);
diff --git a/arch/cris/mm/fault.c b/arch/cris/mm/fault.c
index b4760d86e1bb..45fd542cf173 100644
--- a/arch/cris/mm/fault.c
+++ b/arch/cris/mm/fault.c
@@ -58,6 +58,8 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
58 struct vm_area_struct * vma; 58 struct vm_area_struct * vma;
59 siginfo_t info; 59 siginfo_t info;
60 int fault; 60 int fault;
61 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
62 ((writeaccess & 1) ? FAULT_FLAG_WRITE : 0);
61 63
62 D(printk(KERN_DEBUG 64 D(printk(KERN_DEBUG
63 "Page fault for %lX on %X at %lX, prot %d write %d\n", 65 "Page fault for %lX on %X at %lX, prot %d write %d\n",
@@ -115,6 +117,7 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
115 if (in_atomic() || !mm) 117 if (in_atomic() || !mm)
116 goto no_context; 118 goto no_context;
117 119
120retry:
118 down_read(&mm->mmap_sem); 121 down_read(&mm->mmap_sem);
119 vma = find_vma(mm, address); 122 vma = find_vma(mm, address);
120 if (!vma) 123 if (!vma)
@@ -163,7 +166,11 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
163 * the fault. 166 * the fault.
164 */ 167 */
165 168
166 fault = handle_mm_fault(mm, vma, address, (writeaccess & 1) ? FAULT_FLAG_WRITE : 0); 169 fault = handle_mm_fault(mm, vma, address, flags);
170
171 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
172 return;
173
167 if (unlikely(fault & VM_FAULT_ERROR)) { 174 if (unlikely(fault & VM_FAULT_ERROR)) {
168 if (fault & VM_FAULT_OOM) 175 if (fault & VM_FAULT_OOM)
169 goto out_of_memory; 176 goto out_of_memory;
@@ -171,10 +178,24 @@ do_page_fault(unsigned long address, struct pt_regs *regs,
171 goto do_sigbus; 178 goto do_sigbus;
172 BUG(); 179 BUG();
173 } 180 }
174 if (fault & VM_FAULT_MAJOR) 181
175 tsk->maj_flt++; 182 if (flags & FAULT_FLAG_ALLOW_RETRY) {
176 else 183 if (fault & VM_FAULT_MAJOR)
177 tsk->min_flt++; 184 tsk->maj_flt++;
185 else
186 tsk->min_flt++;
187 if (fault & VM_FAULT_RETRY) {
188 flags &= ~FAULT_FLAG_ALLOW_RETRY;
189
190 /*
191 * No need to up_read(&mm->mmap_sem) as we would
192 * have already released it in __lock_page_or_retry
193 * in mm/filemap.c.
194 */
195
196 goto retry;
197 }
198 }
178 199
179 up_read(&mm->mmap_sem); 200 up_read(&mm->mmap_sem);
180 return; 201 return;
diff --git a/drivers/net/cris/eth_v10.c b/drivers/net/cris/eth_v10.c
index ec03b401620a..9c755db6b16d 100644
--- a/drivers/net/cris/eth_v10.c
+++ b/drivers/net/cris/eth_v10.c
@@ -1131,7 +1131,6 @@ static irqreturn_t
1131e100rxtx_interrupt(int irq, void *dev_id) 1131e100rxtx_interrupt(int irq, void *dev_id)
1132{ 1132{
1133 struct net_device *dev = (struct net_device *)dev_id; 1133 struct net_device *dev = (struct net_device *)dev_id;
1134 struct net_local *np = netdev_priv(dev);
1135 unsigned long irqbits; 1134 unsigned long irqbits;
1136 1135
1137 /* 1136 /*
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-15 19:45:17 -0400