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-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c2
-rw-r--r--drivers/gpu/drm/i915/intel_display.c106
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h3
3 files changed, 53 insertions, 58 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 98ab492ee60a..601caa88c092 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2353,7 +2353,7 @@ static int i915_display_info(struct seq_file *m, void *unused)
2353 2353
2354 active = cursor_position(dev, crtc->pipe, &x, &y); 2354 active = cursor_position(dev, crtc->pipe, &x, &y);
2355 seq_printf(m, "\tcursor visible? %s, position (%d, %d), addr 0x%08x, active? %s\n", 2355 seq_printf(m, "\tcursor visible? %s, position (%d, %d), addr 0x%08x, active? %s\n",
2356 yesno(crtc->cursor_visible), 2356 yesno(crtc->cursor_base),
2357 x, y, crtc->cursor_addr, 2357 x, y, crtc->cursor_addr,
2358 yesno(active)); 2358 yesno(active));
2359 } 2359 }
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ea0b5df226fb..5abef0426cc5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7866,29 +7866,33 @@ static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
7866 struct drm_device *dev = crtc->dev; 7866 struct drm_device *dev = crtc->dev;
7867 struct drm_i915_private *dev_priv = dev->dev_private; 7867 struct drm_i915_private *dev_priv = dev->dev_private;
7868 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 7868 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
7869 bool visible = base != 0; 7869 uint32_t cntl;
7870 u32 cntl;
7871 7870
7872 if (intel_crtc->cursor_visible == visible) 7871 if (base != intel_crtc->cursor_base) {
7873 return;
7874
7875 cntl = I915_READ(_CURACNTR);
7876 if (visible) {
7877 /* On these chipsets we can only modify the base whilst 7872 /* On these chipsets we can only modify the base whilst
7878 * the cursor is disabled. 7873 * the cursor is disabled.
7879 */ 7874 */
7875 if (intel_crtc->cursor_cntl) {
7876 I915_WRITE(_CURACNTR, 0);
7877 POSTING_READ(_CURACNTR);
7878 intel_crtc->cursor_cntl = 0;
7879 }
7880
7880 I915_WRITE(_CURABASE, base); 7881 I915_WRITE(_CURABASE, base);
7882 POSTING_READ(_CURABASE);
7883 }
7881 7884
7882 cntl &= ~(CURSOR_FORMAT_MASK); 7885 /* XXX width must be 64, stride 256 => 0x00 << 28 */
7883 /* XXX width must be 64, stride 256 => 0x00 << 28 */ 7886 cntl = 0;
7884 cntl |= CURSOR_ENABLE | 7887 if (base)
7888 cntl = (CURSOR_ENABLE |
7885 CURSOR_GAMMA_ENABLE | 7889 CURSOR_GAMMA_ENABLE |
7886 CURSOR_FORMAT_ARGB; 7890 CURSOR_FORMAT_ARGB);
7887 } else 7891 if (intel_crtc->cursor_cntl != cntl) {
7888 cntl &= ~(CURSOR_ENABLE | CURSOR_GAMMA_ENABLE); 7892 I915_WRITE(_CURACNTR, cntl);
7889 I915_WRITE(_CURACNTR, cntl); 7893 POSTING_READ(_CURACNTR);
7890 7894 intel_crtc->cursor_cntl = cntl;
7891 intel_crtc->cursor_visible = visible; 7895 }
7892} 7896}
7893 7897
7894static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) 7898static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
@@ -7897,16 +7901,12 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
7897 struct drm_i915_private *dev_priv = dev->dev_private; 7901 struct drm_i915_private *dev_priv = dev->dev_private;
7898 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 7902 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
7899 int pipe = intel_crtc->pipe; 7903 int pipe = intel_crtc->pipe;
7900 bool visible = base != 0; 7904 uint32_t cntl;
7901
7902 if (intel_crtc->cursor_visible != visible) {
7903 int16_t width = intel_crtc->cursor_width;
7904 uint32_t cntl = I915_READ(CURCNTR(pipe));
7905 if (base) {
7906 cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
7907 cntl |= MCURSOR_GAMMA_ENABLE;
7908 7905
7909 switch (width) { 7906 cntl = 0;
7907 if (base) {
7908 cntl = MCURSOR_GAMMA_ENABLE;
7909 switch (intel_crtc->cursor_width) {
7910 case 64: 7910 case 64:
7911 cntl |= CURSOR_MODE_64_ARGB_AX; 7911 cntl |= CURSOR_MODE_64_ARGB_AX;
7912 break; 7912 break;
@@ -7919,18 +7919,16 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
7919 default: 7919 default:
7920 WARN_ON(1); 7920 WARN_ON(1);
7921 return; 7921 return;
7922 }
7923 cntl |= pipe << 28; /* Connect to correct pipe */
7924 } else {
7925 cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
7926 cntl |= CURSOR_MODE_DISABLE;
7927 } 7922 }
7923 cntl |= pipe << 28; /* Connect to correct pipe */
7924 }
7925 if (intel_crtc->cursor_cntl != cntl) {
7928 I915_WRITE(CURCNTR(pipe), cntl); 7926 I915_WRITE(CURCNTR(pipe), cntl);
7929 7927 POSTING_READ(CURCNTR(pipe));
7930 intel_crtc->cursor_visible = visible; 7928 intel_crtc->cursor_cntl = cntl;
7931 } 7929 }
7930
7932 /* and commit changes on next vblank */ 7931 /* and commit changes on next vblank */
7933 POSTING_READ(CURCNTR(pipe));
7934 I915_WRITE(CURBASE(pipe), base); 7932 I915_WRITE(CURBASE(pipe), base);
7935 POSTING_READ(CURBASE(pipe)); 7933 POSTING_READ(CURBASE(pipe));
7936} 7934}
@@ -7941,15 +7939,12 @@ static void ivb_update_cursor(struct drm_crtc *crtc, u32 base)
7941 struct drm_i915_private *dev_priv = dev->dev_private; 7939 struct drm_i915_private *dev_priv = dev->dev_private;
7942 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 7940 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
7943 int pipe = intel_crtc->pipe; 7941 int pipe = intel_crtc->pipe;
7944 bool visible = base != 0; 7942 uint32_t cntl;
7945 7943
7946 if (intel_crtc->cursor_visible != visible) { 7944 cntl = 0;
7947 int16_t width = intel_crtc->cursor_width; 7945 if (base) {
7948 uint32_t cntl = I915_READ(CURCNTR(pipe)); 7946 cntl = MCURSOR_GAMMA_ENABLE;
7949 if (base) { 7947 switch (intel_crtc->cursor_width) {
7950 cntl &= ~CURSOR_MODE;
7951 cntl |= MCURSOR_GAMMA_ENABLE;
7952 switch (width) {
7953 case 64: 7948 case 64:
7954 cntl |= CURSOR_MODE_64_ARGB_AX; 7949 cntl |= CURSOR_MODE_64_ARGB_AX;
7955 break; 7950 break;
@@ -7962,21 +7957,18 @@ static void ivb_update_cursor(struct drm_crtc *crtc, u32 base)
7962 default: 7957 default:
7963 WARN_ON(1); 7958 WARN_ON(1);
7964 return; 7959 return;
7965 }
7966 } else {
7967 cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
7968 cntl |= CURSOR_MODE_DISABLE;
7969 }
7970 if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
7971 cntl |= CURSOR_PIPE_CSC_ENABLE;
7972 cntl &= ~CURSOR_TRICKLE_FEED_DISABLE;
7973 } 7960 }
7974 I915_WRITE(CURCNTR(pipe), cntl); 7961 }
7962 if (IS_HASWELL(dev) || IS_BROADWELL(dev))
7963 cntl |= CURSOR_PIPE_CSC_ENABLE;
7975 7964
7976 intel_crtc->cursor_visible = visible; 7965 if (intel_crtc->cursor_cntl != cntl) {
7966 I915_WRITE(CURCNTR(pipe), cntl);
7967 POSTING_READ(CURCNTR(pipe));
7968 intel_crtc->cursor_cntl = cntl;
7977 } 7969 }
7970
7978 /* and commit changes on next vblank */ 7971 /* and commit changes on next vblank */
7979 POSTING_READ(CURCNTR(pipe));
7980 I915_WRITE(CURBASE(pipe), base); 7972 I915_WRITE(CURBASE(pipe), base);
7981 POSTING_READ(CURBASE(pipe)); 7973 POSTING_READ(CURBASE(pipe));
7982} 7974}
@@ -7992,7 +7984,6 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
7992 int x = intel_crtc->cursor_x; 7984 int x = intel_crtc->cursor_x;
7993 int y = intel_crtc->cursor_y; 7985 int y = intel_crtc->cursor_y;
7994 u32 base = 0, pos = 0; 7986 u32 base = 0, pos = 0;
7995 bool visible;
7996 7987
7997 if (on) 7988 if (on)
7998 base = intel_crtc->cursor_addr; 7989 base = intel_crtc->cursor_addr;
@@ -8021,8 +8012,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
8021 } 8012 }
8022 pos |= y << CURSOR_Y_SHIFT; 8013 pos |= y << CURSOR_Y_SHIFT;
8023 8014
8024 visible = base != 0; 8015 if (base == 0 && intel_crtc->cursor_base == 0)
8025 if (!visible && !intel_crtc->cursor_visible)
8026 return; 8016 return;
8027 8017
8028 I915_WRITE(CURPOS(pipe), pos); 8018 I915_WRITE(CURPOS(pipe), pos);
@@ -8033,6 +8023,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
8033 i845_update_cursor(crtc, base); 8023 i845_update_cursor(crtc, base);
8034 else 8024 else
8035 i9xx_update_cursor(crtc, base); 8025 i9xx_update_cursor(crtc, base);
8026 intel_crtc->cursor_base = base;
8036} 8027}
8037 8028
8038static int intel_crtc_cursor_set(struct drm_crtc *crtc, 8029static int intel_crtc_cursor_set(struct drm_crtc *crtc,
@@ -10993,6 +10984,9 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
10993 intel_crtc->plane = !pipe; 10984 intel_crtc->plane = !pipe;
10994 } 10985 }
10995 10986
10987 intel_crtc->cursor_base = ~0;
10988 intel_crtc->cursor_cntl = ~0;
10989
10996 init_waitqueue_head(&intel_crtc->vbl_wait); 10990 init_waitqueue_head(&intel_crtc->vbl_wait);
10997 10991
10998 BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) || 10992 BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8ce90d621c20..bda0ae3d80cc 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -386,7 +386,8 @@ struct intel_crtc {
386 uint32_t cursor_addr; 386 uint32_t cursor_addr;
387 int16_t cursor_x, cursor_y; 387 int16_t cursor_x, cursor_y;
388 int16_t cursor_width, cursor_height; 388 int16_t cursor_width, cursor_height;
389 bool cursor_visible; 389 uint32_t cursor_cntl;
390 uint32_t cursor_base;
390 391
391 struct intel_plane_config plane_config; 392 struct intel_plane_config plane_config;
392 struct intel_crtc_config config; 393 struct intel_crtc_config config;