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-rw-r--r--drivers/irqchip/irq-gic-v3-its.c6
-rw-r--r--include/linux/irqchip/arm-gic-v3.h13
2 files changed, 16 insertions, 3 deletions
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index fa0c43660c8b..56353f6b5952 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -986,8 +986,8 @@ static void its_cpu_init_lpis(void)
986 986
987 /* set PENDBASE */ 987 /* set PENDBASE */
988 val = (page_to_phys(pend_page) | 988 val = (page_to_phys(pend_page) |
989 GICR_PROPBASER_InnerShareable | 989 GICR_PENDBASER_InnerShareable |
990 GICR_PROPBASER_WaWb); 990 GICR_PENDBASER_WaWb);
991 991
992 writeq_relaxed(val, rbase + GICR_PENDBASER); 992 writeq_relaxed(val, rbase + GICR_PENDBASER);
993 993
@@ -1425,7 +1425,7 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
1425 writeq_relaxed(0, its->base + GITS_CWRITER); 1425 writeq_relaxed(0, its->base + GITS_CWRITER);
1426 writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR); 1426 writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR);
1427 1427
1428 if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) { 1428 if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) {
1429 pr_info("ITS: using cache flushing for cmd queue\n"); 1429 pr_info("ITS: using cache flushing for cmd queue\n");
1430 its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 1430 its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING;
1431 } 1431 }
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index 781974afff9f..826a4bd63d4a 100644
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -128,6 +128,19 @@
128#define GICR_PROPBASER_RaWaWb (7U << 7) 128#define GICR_PROPBASER_RaWaWb (7U << 7)
129#define GICR_PROPBASER_IDBITS_MASK (0x1f) 129#define GICR_PROPBASER_IDBITS_MASK (0x1f)
130 130
131#define GICR_PENDBASER_NonShareable (0U << 10)
132#define GICR_PENDBASER_InnerShareable (1U << 10)
133#define GICR_PENDBASER_OuterShareable (2U << 10)
134#define GICR_PENDBASER_SHAREABILITY_MASK (3UL << 10)
135#define GICR_PENDBASER_nCnB (0U << 7)
136#define GICR_PENDBASER_nC (1U << 7)
137#define GICR_PENDBASER_RaWt (2U << 7)
138#define GICR_PENDBASER_RaWb (3U << 7)
139#define GICR_PENDBASER_WaWt (4U << 7)
140#define GICR_PENDBASER_WaWb (5U << 7)
141#define GICR_PENDBASER_RaWaWt (6U << 7)
142#define GICR_PENDBASER_RaWaWb (7U << 7)
143
131/* 144/*
132 * Re-Distributor registers, offsets from SGI_base 145 * Re-Distributor registers, offsets from SGI_base
133 */ 146 */