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-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi1
-rw-r--r--arch/arm/mach-at91/at91sam9n12.c6
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h6
4 files changed, 5 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 70b5ccbac234..84c4bef2d726 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -264,7 +264,7 @@
264 atmel,pins = 264 atmel,pins =
265 <0 10 0x2 0x0 /* PA10 periph B */ 265 <0 10 0x2 0x0 /* PA10 periph B */
266 0 11 0x2 0x0 /* PA11 periph B */ 266 0 11 0x2 0x0 /* PA11 periph B */
267 0 24 0x2 0x0 /* PA24 periph B */ 267 0 22 0x2 0x0 /* PA22 periph B */
268 0 25 0x2 0x0 /* PA25 periph B */ 268 0 25 0x2 0x0 /* PA25 periph B */
269 0 26 0x2 0x0 /* PA26 periph B */ 269 0 26 0x2 0x0 /* PA26 periph B */
270 0 27 0x2 0x0 /* PA27 periph B */ 270 0 27 0x2 0x0 /* PA27 periph B */
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 3de8e6dfbcb1..8d25f889928e 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -57,6 +57,7 @@
57 compatible = "atmel,at91rm9200-aic"; 57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller; 58 interrupt-controller;
59 reg = <0xfffff000 0x200>; 59 reg = <0xfffff000 0x200>;
60 atmel,external-irqs = <31>;
60 }; 61 };
61 62
62 ramc0: ramc@ffffe800 { 63 ramc0: ramc@ffffe800 {
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 13cdbcd48f51..c7d670d11802 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -223,13 +223,7 @@ static void __init at91sam9n12_map_io(void)
223 at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE); 223 at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
224} 224}
225 225
226void __init at91sam9n12_initialize(void)
227{
228 at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
229}
230
231AT91_SOC_START(at91sam9n12) 226AT91_SOC_START(at91sam9n12)
232 .map_io = at91sam9n12_map_io, 227 .map_io = at91sam9n12_map_io,
233 .register_clocks = at91sam9n12_register_clocks, 228 .register_clocks = at91sam9n12_register_clocks,
234 .init = at91sam9n12_initialize,
235AT91_SOC_END 229AT91_SOC_END
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 31df12029c4e..2bd7f51b0b82 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -179,9 +179,9 @@ extern void __iomem *at91_pmc_base;
179#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */ 179#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */
180#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */ 180#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */
181#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */ 181#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */
182#define AT91_PMC_PCR_DIV2 0x2 /* Peripheral clock is MCK/2 */ 182#define AT91_PMC_PCR_DIV2 0x1 /* Peripheral clock is MCK/2 */
183#define AT91_PMC_PCR_DIV4 0x4 /* Peripheral clock is MCK/4 */ 183#define AT91_PMC_PCR_DIV4 0x2 /* Peripheral clock is MCK/4 */
184#define AT91_PMC_PCR_DIV8 0x8 /* Peripheral clock is MCK/8 */ 184#define AT91_PMC_PCR_DIV8 0x3 /* Peripheral clock is MCK/8 */
185#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ 185#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */
186 186
187#endif 187#endif