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-rw-r--r--drivers/clk/samsung/clk-exynos4.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 010f071af883..12a9f28f9f17 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -908,12 +908,13 @@ static unsigned long exynos4_get_xom(void)
908 return xom; 908 return xom;
909} 909}
910 910
911static void __init exynos4_clk_register_finpll(unsigned long xom) 911static void __init exynos4_clk_register_finpll(void)
912{ 912{
913 struct samsung_fixed_rate_clock fclk; 913 struct samsung_fixed_rate_clock fclk;
914 struct clk *clk; 914 struct clk *clk;
915 unsigned long finpll_f = 24000000; 915 unsigned long finpll_f = 24000000;
916 char *parent_name; 916 char *parent_name;
917 unsigned int xom = exynos4_get_xom();
917 918
918 parent_name = xom & 1 ? "xusbxti" : "xxti"; 919 parent_name = xom & 1 ? "xusbxti" : "xxti";
919 clk = clk_get(NULL, parent_name); 920 clk = clk_get(NULL, parent_name);
@@ -1038,9 +1039,10 @@ static struct samsung_pll_clock exynos4x12_plls[nr_plls] __initdata = {
1038 1039
1039/* register exynos4 clocks */ 1040/* register exynos4 clocks */
1040static void __init exynos4_clk_init(struct device_node *np, 1041static void __init exynos4_clk_init(struct device_node *np,
1041 enum exynos4_soc exynos4_soc, 1042 enum exynos4_soc exynos4_soc)
1042 void __iomem *reg_base, unsigned long xom)
1043{ 1043{
1044 void __iomem *reg_base;
1045
1044 reg_base = of_iomap(np, 0); 1046 reg_base = of_iomap(np, 0);
1045 if (!reg_base) 1047 if (!reg_base)
1046 panic("%s: failed to map registers\n", __func__); 1048 panic("%s: failed to map registers\n", __func__);
@@ -1058,7 +1060,7 @@ static void __init exynos4_clk_init(struct device_node *np,
1058 ARRAY_SIZE(exynos4_fixed_rate_ext_clks), 1060 ARRAY_SIZE(exynos4_fixed_rate_ext_clks),
1059 ext_clk_match); 1061 ext_clk_match);
1060 1062
1061 exynos4_clk_register_finpll(xom); 1063 exynos4_clk_register_finpll();
1062 1064
1063 if (exynos4_soc == EXYNOS4210) { 1065 if (exynos4_soc == EXYNOS4210) {
1064 samsung_clk_register_mux(exynos4210_mux_early, 1066 samsung_clk_register_mux(exynos4210_mux_early,
@@ -1136,12 +1138,12 @@ static void __init exynos4_clk_init(struct device_node *np,
1136 1138
1137static void __init exynos4210_clk_init(struct device_node *np) 1139static void __init exynos4210_clk_init(struct device_node *np)
1138{ 1140{
1139 exynos4_clk_init(np, EXYNOS4210, NULL, exynos4_get_xom()); 1141 exynos4_clk_init(np, EXYNOS4210);
1140} 1142}
1141CLK_OF_DECLARE(exynos4210_clk, "samsung,exynos4210-clock", exynos4210_clk_init); 1143CLK_OF_DECLARE(exynos4210_clk, "samsung,exynos4210-clock", exynos4210_clk_init);
1142 1144
1143static void __init exynos4412_clk_init(struct device_node *np) 1145static void __init exynos4412_clk_init(struct device_node *np)
1144{ 1146{
1145 exynos4_clk_init(np, EXYNOS4X12, NULL, exynos4_get_xom()); 1147 exynos4_clk_init(np, EXYNOS4X12);
1146} 1148}
1147CLK_OF_DECLARE(exynos4412_clk, "samsung,exynos4412-clock", exynos4412_clk_init); 1149CLK_OF_DECLARE(exynos4412_clk, "samsung,exynos4412-clock", exynos4412_clk_init);