5 files changed, 10 insertions, 8 deletions

diff --git a/arch/m68k/Kconfig.machine b/arch/m68k/Kconfig.machine
index 7cdf6b010381..7240584d3439 100644
--- a/arch/m68k/Kconfig.machine
+++ b/arch/m68k/Kconfig.machine
@@ -310,7 +310,6 @@ config COBRA5282
 config SOM5282EM
         bool "EMAC.Inc SOM5282EM board support"
         depends on M528x
-        select EMAC_INC
         help
           Support for the EMAC.Inc SOM5282EM module.
 
diff --git a/arch/m68k/include/asm/MC68328.h b/arch/m68k/include/asm/MC68328.h
index a337e56d09bf..4ebf098b8a1f 100644
--- a/arch/m68k/include/asm/MC68328.h
+++ b/arch/m68k/include/asm/MC68328.h
@@ -293,7 +293,7 @@
 /*
  * Here go the bitmasks themselves
  */
-#define IMR_MSPIM       (1 << SPIM _IRQ_NUM)    /* Mask SPI Master interrupt */
+#define IMR_MSPIM       (1 << SPIM_IRQ_NUM)     /* Mask SPI Master interrupt */
 #define IMR_MTMR2       (1 << TMR2_IRQ_NUM)     /* Mask Timer 2 interrupt */
 #define IMR_MUART       (1 << UART_IRQ_NUM)     /* Mask UART interrupt */       
 #define IMR_MWDT        (1 << WDT_IRQ_NUM)      /* Mask Watchdog Timer interrupt */
@@ -327,7 +327,7 @@
 #define IWR_ADDR        0xfffff308
 #define IWR             LONG_REF(IWR_ADDR)
 
-#define IWR_SPIM        (1 << SPIM _IRQ_NUM)    /* SPI Master interrupt */
+#define IWR_SPIM        (1 << SPIM_IRQ_NUM)     /* SPI Master interrupt */
 #define IWR_TMR2        (1 << TMR2_IRQ_NUM)     /* Timer 2 interrupt */
 #define IWR_UART        (1 << UART_IRQ_NUM)     /* UART interrupt */    
 #define IWR_WDT         (1 << WDT_IRQ_NUM)      /* Watchdog Timer interrupt */
@@ -357,7 +357,7 @@
 #define ISR_ADDR        0xfffff30c
 #define ISR             LONG_REF(ISR_ADDR)
 
-#define ISR_SPIM        (1 << SPIM _IRQ_NUM)    /* SPI Master interrupt */
+#define ISR_SPIM        (1 << SPIM_IRQ_NUM)     /* SPI Master interrupt */
 #define ISR_TMR2        (1 << TMR2_IRQ_NUM)     /* Timer 2 interrupt */
 #define ISR_UART        (1 << UART_IRQ_NUM)     /* UART interrupt */    
 #define ISR_WDT         (1 << WDT_IRQ_NUM)      /* Watchdog Timer interrupt */
@@ -391,7 +391,7 @@
 #define IPR_ADDR        0xfffff310
 #define IPR             LONG_REF(IPR_ADDR)
 
-#define IPR_SPIM        (1 << SPIM _IRQ_NUM)    /* SPI Master interrupt */
+#define IPR_SPIM        (1 << SPIM_IRQ_NUM)     /* SPI Master interrupt */
 #define IPR_TMR2        (1 << TMR2_IRQ_NUM)     /* Timer 2 interrupt */
 #define IPR_UART        (1 << UART_IRQ_NUM)     /* UART interrupt */    
 #define IPR_WDT         (1 << WDT_IRQ_NUM)      /* Watchdog Timer interrupt */
@@ -757,7 +757,7 @@
 
 /* 'EZ328-compatible definitions */
 #define TCN_ADDR        TCN1_ADDR
-#define TCN             TCN
+#define TCN             TCN1
 
 /*
  * Timer Unit 1 and 2 Status Registers
diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c
index 71fb29938dba..911ba472e6c4 100644
--- a/arch/m68k/kernel/setup_no.c
+++ b/arch/m68k/kernel/setup_no.c
@@ -57,6 +57,9 @@ void (*mach_reset)(void);
 void (*mach_halt)(void);
 void (*mach_power_off)(void);
 
+#ifdef CONFIG_M68000
+#define CPU_NAME        "MC68000"
+#endif
 #ifdef CONFIG_M68328
 #define CPU_NAME        "MC68328"
 #endif
diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c
index afd8106fd83b..519aad8fa812 100644
--- a/arch/m68k/mm/init.c
+++ b/arch/m68k/mm/init.c
@@ -188,7 +188,7 @@ void __init mem_init(void)
                 }
         }
 
-#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
+#if defined(CONFIG_MMU) && !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
         /* insert pointer tables allocated so far into the tablelist */
         init_pointer_table((unsigned long)kernel_pg_dir);
         for (i = 0; i < PTRS_PER_PGD; i++) {
diff --git a/arch/m68k/platform/coldfire/m528x.c b/arch/m68k/platform/coldfire/m528x.c
index 83b7dad7a84e..b03a9d271837 100644
--- a/arch/m68k/platform/coldfire/m528x.c
+++ b/arch/m68k/platform/coldfire/m528x.c
@@ -69,7 +69,7 @@ static void __init m528x_uarts_init(void)
         u8 port;
 
         /* make sure PUAPAR is set for UART0 and UART1 */
-        port = readb(MCF5282_GPIO_PUAPAR);
+        port = readb(MCFGPIO_PUAPAR);
         port |= 0x03 | (0x03 << 2);
         writeb(port, MCFGPIO_PUAPAR);
 }