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-rw-r--r--Documentation/devicetree/bindings/arm/arch_timer.txt8
1 files changed, 6 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
index 256b4d8bab7b..e774128935d5 100644
--- a/Documentation/devicetree/bindings/arm/arch_timer.txt
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -17,7 +17,10 @@ to deliver its interrupts via SPIs.
17- interrupts : Interrupt list for secure, non-secure, virtual and 17- interrupts : Interrupt list for secure, non-secure, virtual and
18 hypervisor timers, in that order. 18 hypervisor timers, in that order.
19 19
20- clock-frequency : The frequency of the main counter, in Hz. Optional. 20- clock-frequency : The frequency of the main counter, in Hz. Should be present
21 only where necessary to work around broken firmware which does not configure
22 CNTFRQ on all CPUs to a uniform correct value. Use of this property is
23 strongly discouraged; fix your firmware unless absolutely impossible.
21 24
22- always-on : a boolean property. If present, the timer is powered through an 25- always-on : a boolean property. If present, the timer is powered through an
23 always-on power domain, therefore it never loses context. 26 always-on power domain, therefore it never loses context.
@@ -46,7 +49,8 @@ Example:
46 49
47- compatible : Should at least contain "arm,armv7-timer-mem". 50- compatible : Should at least contain "arm,armv7-timer-mem".
48 51
49- clock-frequency : The frequency of the main counter, in Hz. Optional. 52- clock-frequency : The frequency of the main counter, in Hz. Should be present
53 only when firmware has not configured the MMIO CNTFRQ registers.
50 54
51- reg : The control frame base address. 55- reg : The control frame base address.
52 56