diff options
-rw-r--r-- | drivers/clk/samsung/clk-exynos-audss.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c index 39b40aaede2b..68e515d093d8 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c | |||
@@ -26,17 +26,17 @@ static struct clk_onecell_data clk_data; | |||
26 | #define ASS_CLK_DIV 0x4 | 26 | #define ASS_CLK_DIV 0x4 |
27 | #define ASS_CLK_GATE 0x8 | 27 | #define ASS_CLK_GATE 0x8 |
28 | 28 | ||
29 | /* list of all parent clock list */ | ||
30 | static const char *mout_audss_p[] = { "fin_pll", "fout_epll" }; | ||
31 | static const char *mout_i2s_p[] = { "mout_audss", "cdclk0", "sclk_audio0" }; | ||
32 | |||
33 | #ifdef CONFIG_PM_SLEEP | ||
29 | static unsigned long reg_save[][2] = { | 34 | static unsigned long reg_save[][2] = { |
30 | {ASS_CLK_SRC, 0}, | 35 | {ASS_CLK_SRC, 0}, |
31 | {ASS_CLK_DIV, 0}, | 36 | {ASS_CLK_DIV, 0}, |
32 | {ASS_CLK_GATE, 0}, | 37 | {ASS_CLK_GATE, 0}, |
33 | }; | 38 | }; |
34 | 39 | ||
35 | /* list of all parent clock list */ | ||
36 | static const char *mout_audss_p[] = { "fin_pll", "fout_epll" }; | ||
37 | static const char *mout_i2s_p[] = { "mout_audss", "cdclk0", "sclk_audio0" }; | ||
38 | |||
39 | #ifdef CONFIG_PM_SLEEP | ||
40 | static int exynos_audss_clk_suspend(void) | 40 | static int exynos_audss_clk_suspend(void) |
41 | { | 41 | { |
42 | int i; | 42 | int i; |