1 files changed, 6 insertions, 5 deletions

diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index b5988b4e56e5..233fe8a88264 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -257,11 +257,6 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
         struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
         int ret;
 
-        regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
-                        IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
-        regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
-                        IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
-
         ret = clk_prepare_enable(imx6_pcie->pcie_phy);
         if (ret) {
                 dev_err(pp->dev, "unable to enable pcie_phy clock\n");
@@ -283,6 +278,12 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
         /* allow the clocks to stabilize */
         usleep_range(200, 500);
 
+        /* power up core phy and enable ref clock */
+        regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
+                        IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
+        regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
+                        IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
+
         /* Some boards don't have PCIe reset GPIO. */
         if (gpio_is_valid(imx6_pcie->reset_gpio)) {
                 gpio_set_value(imx6_pcie->reset_gpio, 0);