diff options
| -rw-r--r-- | arch/arm/mach-realview/realview_eb.c | 19 | ||||
| -rw-r--r-- | include/asm-arm/arch-realview/irqs.h | 5 | ||||
| -rw-r--r-- | include/asm-arm/arch-realview/platform.h | 6 |
3 files changed, 29 insertions, 1 deletions
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index b6a6f68cb699..00139143dcc1 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
| @@ -57,7 +57,21 @@ static struct map_desc realview_eb_io_desc[] __initdata = { | |||
| 57 | .pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE), | 57 | .pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE), |
| 58 | .length = SZ_4K, | 58 | .length = SZ_4K, |
| 59 | .type = MT_DEVICE, | 59 | .type = MT_DEVICE, |
| 60 | }, | ||
| 61 | #ifdef CONFIG_REALVIEW_MPCORE | ||
| 62 | { | ||
| 63 | .virtual = IO_ADDRESS(REALVIEW_GIC1_CPU_BASE), | ||
| 64 | .pfn = __phys_to_pfn(REALVIEW_GIC1_CPU_BASE), | ||
| 65 | .length = SZ_4K, | ||
| 66 | .type = MT_DEVICE, | ||
| 60 | }, { | 67 | }, { |
| 68 | .virtual = IO_ADDRESS(REALVIEW_GIC1_DIST_BASE), | ||
| 69 | .pfn = __phys_to_pfn(REALVIEW_GIC1_DIST_BASE), | ||
| 70 | .length = SZ_4K, | ||
| 71 | .type = MT_DEVICE, | ||
| 72 | }, | ||
| 73 | #endif | ||
| 74 | { | ||
| 61 | .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), | 75 | .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), |
| 62 | .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), | 76 | .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), |
| 63 | .length = SZ_4K, | 77 | .length = SZ_4K, |
| @@ -145,6 +159,11 @@ static void __init gic_init_irq(void) | |||
| 145 | #endif | 159 | #endif |
| 146 | gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29); | 160 | gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29); |
| 147 | gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE)); | 161 | gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE)); |
| 162 | #ifdef CONFIG_REALVIEW_MPCORE | ||
| 163 | gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64); | ||
| 164 | gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE)); | ||
| 165 | gic_cascade_irq(1, IRQ_EB_IRQ1); | ||
| 166 | #endif | ||
| 148 | } | 167 | } |
| 149 | 168 | ||
| 150 | static void __init realview_eb_init(void) | 169 | static void __init realview_eb_init(void) |
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h index 76b498eb20a6..5a5db56f86b8 100644 --- a/include/asm-arm/arch-realview/irqs.h +++ b/include/asm-arm/arch-realview/irqs.h | |||
| @@ -78,6 +78,9 @@ | |||
| 78 | #define IRQ_PMU_SCU6 (IRQ_GIC_START + INT_PMU_SCU6) | 78 | #define IRQ_PMU_SCU6 (IRQ_GIC_START + INT_PMU_SCU6) |
| 79 | #define IRQ_PMU_SCU7 (IRQ_GIC_START + INT_PMU_SCU7) | 79 | #define IRQ_PMU_SCU7 (IRQ_GIC_START + INT_PMU_SCU7) |
| 80 | 80 | ||
| 81 | #define IRQ_EB_IRQ1 (IRQ_GIC_START + INT_EB_IRQ1) | ||
| 82 | #define IRQ_EB_IRQ2 (IRQ_GIC_START + INT_EB_IRQ2) | ||
| 83 | |||
| 81 | #define IRQMASK_WDOGINT INTMASK_WDOGINT | 84 | #define IRQMASK_WDOGINT INTMASK_WDOGINT |
| 82 | #define IRQMASK_SOFTINT INTMASK_SOFTINT | 85 | #define IRQMASK_SOFTINT INTMASK_SOFTINT |
| 83 | #define IRQMASK_COMMRx INTMASK_COMMRx | 86 | #define IRQMASK_COMMRx INTMASK_COMMRx |
| @@ -115,4 +118,4 @@ | |||
| 115 | #define IRQMASK_ETH INTMASK_ETH | 118 | #define IRQMASK_ETH INTMASK_ETH |
| 116 | #define IRQMASK_USB INTMASK_USB | 119 | #define IRQMASK_USB INTMASK_USB |
| 117 | 120 | ||
| 118 | #define NR_IRQS (IRQ_GIC_START + 64) | 121 | #define NR_IRQS (IRQ_GIC_START + 96) |
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h index 18d7c18b738c..bf52ca752a75 100644 --- a/include/asm-arm/arch-realview/platform.h +++ b/include/asm-arm/arch-realview/platform.h | |||
| @@ -212,6 +212,8 @@ | |||
| 212 | #define REALVIEW_TWD_BASE 0x10100700 | 212 | #define REALVIEW_TWD_BASE 0x10100700 |
| 213 | #define REALVIEW_TWD_SIZE 0x00000100 | 213 | #define REALVIEW_TWD_SIZE 0x00000100 |
| 214 | #define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ | 214 | #define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ |
| 215 | #define REALVIEW_GIC1_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ | ||
| 216 | #define REALVIEW_GIC1_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ | ||
| 215 | #endif | 217 | #endif |
| 216 | #define REALVIEW_SMC_BASE 0x10080000 /* SMC */ | 218 | #define REALVIEW_SMC_BASE 0x10080000 /* SMC */ |
| 217 | /* Reserved 0x10090000 - 0x100EFFFF */ | 219 | /* Reserved 0x10090000 - 0x100EFFFF */ |
| @@ -306,7 +308,11 @@ | |||
| 306 | #define INT_USB 29 /* USB controller */ | 308 | #define INT_USB 29 /* USB controller */ |
| 307 | #define INT_TSPENINT 30 /* Touchscreen pen */ | 309 | #define INT_TSPENINT 30 /* Touchscreen pen */ |
| 308 | #define INT_TSKPADINT 31 /* Touchscreen keypad */ | 310 | #define INT_TSKPADINT 31 /* Touchscreen keypad */ |
| 311 | |||
| 309 | #else | 312 | #else |
| 313 | |||
| 314 | #define MAX_GIC_NR 2 | ||
| 315 | |||
| 310 | #define INT_AACI 0 | 316 | #define INT_AACI 0 |
| 311 | #define INT_TIMERINT0_1 1 | 317 | #define INT_TIMERINT0_1 1 |
| 312 | #define INT_TIMERINT2_3 2 | 318 | #define INT_TIMERINT2_3 2 |
