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-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c2
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c11
-rw-r--r--arch/arm/mach-omap2/mcbsp.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c392
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c217
-rw-r--r--arch/arm/mach-omap2/prcm-common.h2
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h2
-rw-r--r--arch/arm/plat-omap/include/plat/serial.h1
8 files changed, 611 insertions, 22 deletions
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index bd18d691c6ad..108fee6146fc 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -193,7 +193,7 @@ static struct platform_device rx51_charger_device = {
193static void __init rx51_charger_init(void) 193static void __init rx51_charger_init(void)
194{ 194{
195 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, 195 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
196 GPIOF_OUT_INIT_LOW, "isp1704_reset")); 196 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
197 197
198 platform_device_register(&rx51_charger_device); 198 platform_device_register(&rx51_charger_device);
199} 199}
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 5d0064a4fb5a..4e1b1a2f0537 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -2480,6 +2480,16 @@ static struct clk uart4_fck = {
2480 .recalc = &followparent_recalc, 2480 .recalc = &followparent_recalc,
2481}; 2481};
2482 2482
2483static struct clk uart4_fck_am35xx = {
2484 .name = "uart4_fck",
2485 .ops = &clkops_omap2_dflt_wait,
2486 .parent = &per_48m_fck,
2487 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2488 .enable_bit = OMAP3430_EN_UART4_SHIFT,
2489 .clkdm_name = "core_l4_clkdm",
2490 .recalc = &followparent_recalc,
2491};
2492
2483static struct clk gpt2_fck = { 2493static struct clk gpt2_fck = {
2484 .name = "gpt2_fck", 2494 .name = "gpt2_fck",
2485 .ops = &clkops_omap2_dflt_wait, 2495 .ops = &clkops_omap2_dflt_wait,
@@ -3403,6 +3413,7 @@ static struct omap_clk omap3xxx_clks[] = {
3403 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), 3413 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
3404 CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), 3414 CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
3405 CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX), 3415 CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX),
3416 CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_3505 | CK_3517),
3406 CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX), 3417 CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX),
3407 CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX), 3418 CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX),
3408 CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX), 3419 CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX),
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 292eee3be15f..28fcb27005d2 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -145,6 +145,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
145 pdata->reg_size = 4; 145 pdata->reg_size = 4;
146 pdata->has_ccr = true; 146 pdata->has_ccr = true;
147 } 147 }
148 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
149 if (id == 1)
150 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
148 151
149 if (oh->class->rev == MCBSP_CONFIG_TYPE3) { 152 if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
150 if (id == 2) 153 if (id == 2)
@@ -174,9 +177,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
174 name, oh->name); 177 name, oh->name);
175 return PTR_ERR(pdev); 178 return PTR_ERR(pdev);
176 } 179 }
177 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
178 if (id == 1)
179 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
180 omap_mcbsp_count++; 180 omap_mcbsp_count++;
181 return 0; 181 return 0;
182} 182}
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 7f8915ad5099..5324e8d93bc0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -84,6 +84,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
84static struct omap_hwmod omap3xxx_mcbsp5_hwmod; 84static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
85static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod; 85static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
86static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod; 86static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
87static struct omap_hwmod omap3xxx_usb_host_hs_hwmod;
88static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod;
87 89
88/* L3 -> L4_CORE interface */ 90/* L3 -> L4_CORE interface */
89static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { 91static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -164,6 +166,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod;
164static struct omap_hwmod omap3xxx_uart2_hwmod; 166static struct omap_hwmod omap3xxx_uart2_hwmod;
165static struct omap_hwmod omap3xxx_uart3_hwmod; 167static struct omap_hwmod omap3xxx_uart3_hwmod;
166static struct omap_hwmod omap3xxx_uart4_hwmod; 168static struct omap_hwmod omap3xxx_uart4_hwmod;
169static struct omap_hwmod am35xx_uart4_hwmod;
167static struct omap_hwmod omap3xxx_usbhsotg_hwmod; 170static struct omap_hwmod omap3xxx_usbhsotg_hwmod;
168 171
169/* l3_core -> usbhsotg interface */ 172/* l3_core -> usbhsotg interface */
@@ -299,6 +302,23 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
299 .user = OCP_USER_MPU | OCP_USER_SDMA, 302 .user = OCP_USER_MPU | OCP_USER_SDMA,
300}; 303};
301 304
305/* AM35xx: L4 CORE -> UART4 interface */
306static struct omap_hwmod_addr_space am35xx_uart4_addr_space[] = {
307 {
308 .pa_start = OMAP3_UART4_AM35XX_BASE,
309 .pa_end = OMAP3_UART4_AM35XX_BASE + SZ_1K - 1,
310 .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
311 },
312};
313
314static struct omap_hwmod_ocp_if am35xx_l4_core__uart4 = {
315 .master = &omap3xxx_l4_core_hwmod,
316 .slave = &am35xx_uart4_hwmod,
317 .clk = "uart4_ick",
318 .addr = am35xx_uart4_addr_space,
319 .user = OCP_USER_MPU | OCP_USER_SDMA,
320};
321
302/* L4 CORE -> I2C1 interface */ 322/* L4 CORE -> I2C1 interface */
303static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { 323static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
304 .master = &omap3xxx_l4_core_hwmod, 324 .master = &omap3xxx_l4_core_hwmod,
@@ -1162,6 +1182,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
1162 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 1182 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1163 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 1183 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1164 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 1184 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1185 .clockact = CLOCKACT_TEST_ICLK,
1165 .sysc_fields = &omap_hwmod_sysc_type1, 1186 .sysc_fields = &omap_hwmod_sysc_type1,
1166}; 1187};
1167 1188
@@ -1309,6 +1330,39 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
1309 .class = &omap2_uart_class, 1330 .class = &omap2_uart_class,
1310}; 1331};
1311 1332
1333static struct omap_hwmod_irq_info am35xx_uart4_mpu_irqs[] = {
1334 { .irq = INT_35XX_UART4_IRQ, },
1335};
1336
1337static struct omap_hwmod_dma_info am35xx_uart4_sdma_reqs[] = {
1338 { .name = "rx", .dma_req = AM35XX_DMA_UART4_RX, },
1339 { .name = "tx", .dma_req = AM35XX_DMA_UART4_TX, },
1340};
1341
1342static struct omap_hwmod_ocp_if *am35xx_uart4_slaves[] = {
1343 &am35xx_l4_core__uart4,
1344};
1345
1346static struct omap_hwmod am35xx_uart4_hwmod = {
1347 .name = "uart4",
1348 .mpu_irqs = am35xx_uart4_mpu_irqs,
1349 .sdma_reqs = am35xx_uart4_sdma_reqs,
1350 .main_clk = "uart4_fck",
1351 .prcm = {
1352 .omap2 = {
1353 .module_offs = CORE_MOD,
1354 .prcm_reg_id = 1,
1355 .module_bit = OMAP3430_EN_UART4_SHIFT,
1356 .idlest_reg_id = 1,
1357 .idlest_idle_bit = OMAP3430_EN_UART4_SHIFT,
1358 },
1359 },
1360 .slaves = am35xx_uart4_slaves,
1361 .slaves_cnt = ARRAY_SIZE(am35xx_uart4_slaves),
1362 .class = &omap2_uart_class,
1363};
1364
1365
1312static struct omap_hwmod_class i2c_class = { 1366static struct omap_hwmod_class i2c_class = {
1313 .name = "i2c", 1367 .name = "i2c",
1314 .sysc = &i2c_sysc, 1368 .sysc = &i2c_sysc,
@@ -1636,7 +1690,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
1636 1690
1637static struct omap_hwmod omap3xxx_i2c1_hwmod = { 1691static struct omap_hwmod omap3xxx_i2c1_hwmod = {
1638 .name = "i2c1", 1692 .name = "i2c1",
1639 .flags = HWMOD_16BIT_REG, 1693 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
1640 .mpu_irqs = omap2_i2c1_mpu_irqs, 1694 .mpu_irqs = omap2_i2c1_mpu_irqs,
1641 .sdma_reqs = omap2_i2c1_sdma_reqs, 1695 .sdma_reqs = omap2_i2c1_sdma_reqs,
1642 .main_clk = "i2c1_fck", 1696 .main_clk = "i2c1_fck",
@@ -1670,7 +1724,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
1670 1724
1671static struct omap_hwmod omap3xxx_i2c2_hwmod = { 1725static struct omap_hwmod omap3xxx_i2c2_hwmod = {
1672 .name = "i2c2", 1726 .name = "i2c2",
1673 .flags = HWMOD_16BIT_REG, 1727 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
1674 .mpu_irqs = omap2_i2c2_mpu_irqs, 1728 .mpu_irqs = omap2_i2c2_mpu_irqs,
1675 .sdma_reqs = omap2_i2c2_sdma_reqs, 1729 .sdma_reqs = omap2_i2c2_sdma_reqs,
1676 .main_clk = "i2c2_fck", 1730 .main_clk = "i2c2_fck",
@@ -1715,7 +1769,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
1715 1769
1716static struct omap_hwmod omap3xxx_i2c3_hwmod = { 1770static struct omap_hwmod omap3xxx_i2c3_hwmod = {
1717 .name = "i2c3", 1771 .name = "i2c3",
1718 .flags = HWMOD_16BIT_REG, 1772 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
1719 .mpu_irqs = i2c3_mpu_irqs, 1773 .mpu_irqs = i2c3_mpu_irqs,
1720 .sdma_reqs = i2c3_sdma_reqs, 1774 .sdma_reqs = i2c3_sdma_reqs,
1721 .main_clk = "i2c3_fck", 1775 .main_clk = "i2c3_fck",
@@ -3072,7 +3126,35 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
3072 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 3126 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
3073}; 3127};
3074 3128
3075static struct omap_hwmod omap3xxx_mmc1_hwmod = { 3129/* See 35xx errata 2.1.1.128 in SPRZ278F */
3130static struct omap_mmc_dev_attr mmc1_pre_es3_dev_attr = {
3131 .flags = (OMAP_HSMMC_SUPPORTS_DUAL_VOLT |
3132 OMAP_HSMMC_BROKEN_MULTIBLOCK_READ),
3133};
3134
3135static struct omap_hwmod omap3xxx_pre_es3_mmc1_hwmod = {
3136 .name = "mmc1",
3137 .mpu_irqs = omap34xx_mmc1_mpu_irqs,
3138 .sdma_reqs = omap34xx_mmc1_sdma_reqs,
3139 .opt_clks = omap34xx_mmc1_opt_clks,
3140 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks),
3141 .main_clk = "mmchs1_fck",
3142 .prcm = {
3143 .omap2 = {
3144 .module_offs = CORE_MOD,
3145 .prcm_reg_id = 1,
3146 .module_bit = OMAP3430_EN_MMC1_SHIFT,
3147 .idlest_reg_id = 1,
3148 .idlest_idle_bit = OMAP3430_ST_MMC1_SHIFT,
3149 },
3150 },
3151 .dev_attr = &mmc1_pre_es3_dev_attr,
3152 .slaves = omap3xxx_mmc1_slaves,
3153 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves),
3154 .class = &omap34xx_mmc_class,
3155};
3156
3157static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = {
3076 .name = "mmc1", 3158 .name = "mmc1",
3077 .mpu_irqs = omap34xx_mmc1_mpu_irqs, 3159 .mpu_irqs = omap34xx_mmc1_mpu_irqs,
3078 .sdma_reqs = omap34xx_mmc1_sdma_reqs, 3160 .sdma_reqs = omap34xx_mmc1_sdma_reqs,
@@ -3115,7 +3197,34 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {
3115 &omap3xxx_l4_core__mmc2, 3197 &omap3xxx_l4_core__mmc2,
3116}; 3198};
3117 3199
3118static struct omap_hwmod omap3xxx_mmc2_hwmod = { 3200/* See 35xx errata 2.1.1.128 in SPRZ278F */
3201static struct omap_mmc_dev_attr mmc2_pre_es3_dev_attr = {
3202 .flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ,
3203};
3204
3205static struct omap_hwmod omap3xxx_pre_es3_mmc2_hwmod = {
3206 .name = "mmc2",
3207 .mpu_irqs = omap34xx_mmc2_mpu_irqs,
3208 .sdma_reqs = omap34xx_mmc2_sdma_reqs,
3209 .opt_clks = omap34xx_mmc2_opt_clks,
3210 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks),
3211 .main_clk = "mmchs2_fck",
3212 .prcm = {
3213 .omap2 = {
3214 .module_offs = CORE_MOD,
3215 .prcm_reg_id = 1,
3216 .module_bit = OMAP3430_EN_MMC2_SHIFT,
3217 .idlest_reg_id = 1,
3218 .idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
3219 },
3220 },
3221 .dev_attr = &mmc2_pre_es3_dev_attr,
3222 .slaves = omap3xxx_mmc2_slaves,
3223 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves),
3224 .class = &omap34xx_mmc_class,
3225};
3226
3227static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = {
3119 .name = "mmc2", 3228 .name = "mmc2",
3120 .mpu_irqs = omap34xx_mmc2_mpu_irqs, 3229 .mpu_irqs = omap34xx_mmc2_mpu_irqs,
3121 .sdma_reqs = omap34xx_mmc2_sdma_reqs, 3230 .sdma_reqs = omap34xx_mmc2_sdma_reqs,
@@ -3177,13 +3286,223 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
3177 .class = &omap34xx_mmc_class, 3286 .class = &omap34xx_mmc_class,
3178}; 3287};
3179 3288
3289/*
3290 * 'usb_host_hs' class
3291 * high-speed multi-port usb host controller
3292 */
3293static struct omap_hwmod_ocp_if omap3xxx_usb_host_hs__l3_main_2 = {
3294 .master = &omap3xxx_usb_host_hs_hwmod,
3295 .slave = &omap3xxx_l3_main_hwmod,
3296 .clk = "core_l3_ick",
3297 .user = OCP_USER_MPU,
3298};
3299
3300static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {
3301 .rev_offs = 0x0000,
3302 .sysc_offs = 0x0010,
3303 .syss_offs = 0x0014,
3304 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
3305 SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
3306 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
3307 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
3308 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
3309 .sysc_fields = &omap_hwmod_sysc_type1,
3310};
3311
3312static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = {
3313 .name = "usb_host_hs",
3314 .sysc = &omap3xxx_usb_host_hs_sysc,
3315};
3316
3317static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_masters[] = {
3318 &omap3xxx_usb_host_hs__l3_main_2,
3319};
3320
3321static struct omap_hwmod_addr_space omap3xxx_usb_host_hs_addrs[] = {
3322 {
3323 .name = "uhh",
3324 .pa_start = 0x48064000,
3325 .pa_end = 0x480643ff,
3326 .flags = ADDR_TYPE_RT
3327 },
3328 {
3329 .name = "ohci",
3330 .pa_start = 0x48064400,
3331 .pa_end = 0x480647ff,
3332 },
3333 {
3334 .name = "ehci",
3335 .pa_start = 0x48064800,
3336 .pa_end = 0x48064cff,
3337 },
3338 {}
3339};
3340
3341static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_host_hs = {
3342 .master = &omap3xxx_l4_core_hwmod,
3343 .slave = &omap3xxx_usb_host_hs_hwmod,
3344 .clk = "usbhost_ick",
3345 .addr = omap3xxx_usb_host_hs_addrs,
3346 .user = OCP_USER_MPU | OCP_USER_SDMA,
3347};
3348
3349static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_slaves[] = {
3350 &omap3xxx_l4_core__usb_host_hs,
3351};
3352
3353static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = {
3354 { .role = "ehci_logic_fck", .clk = "usbhost_120m_fck", },
3355};
3356
3357static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
3358 { .name = "ohci-irq", .irq = 76 },
3359 { .name = "ehci-irq", .irq = 77 },
3360 { .irq = -1 }
3361};
3362
3363static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
3364 .name = "usb_host_hs",
3365 .class = &omap3xxx_usb_host_hs_hwmod_class,
3366 .clkdm_name = "l3_init_clkdm",
3367 .mpu_irqs = omap3xxx_usb_host_hs_irqs,
3368 .main_clk = "usbhost_48m_fck",
3369 .prcm = {
3370 .omap2 = {
3371 .module_offs = OMAP3430ES2_USBHOST_MOD,
3372 .prcm_reg_id = 1,
3373 .module_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
3374 .idlest_reg_id = 1,
3375 .idlest_idle_bit = OMAP3430ES2_ST_USBHOST_IDLE_SHIFT,
3376 .idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT,
3377 },
3378 },
3379 .opt_clks = omap3xxx_usb_host_hs_opt_clks,
3380 .opt_clks_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_opt_clks),
3381 .slaves = omap3xxx_usb_host_hs_slaves,
3382 .slaves_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_slaves),
3383 .masters = omap3xxx_usb_host_hs_masters,
3384 .masters_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_masters),
3385
3386 /*
3387 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
3388 * id: i660
3389 *
3390 * Description:
3391 * In the following configuration :
3392 * - USBHOST module is set to smart-idle mode
3393 * - PRCM asserts idle_req to the USBHOST module ( This typically
3394 * happens when the system is going to a low power mode : all ports
3395 * have been suspended, the master part of the USBHOST module has
3396 * entered the standby state, and SW has cut the functional clocks)
3397 * - an USBHOST interrupt occurs before the module is able to answer
3398 * idle_ack, typically a remote wakeup IRQ.
3399 * Then the USB HOST module will enter a deadlock situation where it
3400 * is no more accessible nor functional.
3401 *
3402 * Workaround:
3403 * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE
3404 */
3405
3406 /*
3407 * Errata: USB host EHCI may stall when entering smart-standby mode
3408 * Id: i571
3409 *
3410 * Description:
3411 * When the USBHOST module is set to smart-standby mode, and when it is
3412 * ready to enter the standby state (i.e. all ports are suspended and
3413 * all attached devices are in suspend mode), then it can wrongly assert
3414 * the Mstandby signal too early while there are still some residual OCP
3415 * transactions ongoing. If this condition occurs, the internal state
3416 * machine may go to an undefined state and the USB link may be stuck
3417 * upon the next resume.
3418 *
3419 * Workaround:
3420 * Don't use smart standby; use only force standby,
3421 * hence HWMOD_SWSUP_MSTANDBY
3422 */
3423
3424 /*
3425 * During system boot; If the hwmod framework resets the module
3426 * the module will have smart idle settings; which can lead to deadlock
3427 * (above Errata Id:i660); so, dont reset the module during boot;
3428 * Use HWMOD_INIT_NO_RESET.
3429 */
3430
3431 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
3432 HWMOD_INIT_NO_RESET,
3433};
3434
3435/*
3436 * 'usb_tll_hs' class
3437 * usb_tll_hs module is the adapter on the usb_host_hs ports
3438 */
3439static struct omap_hwmod_class_sysconfig omap3xxx_usb_tll_hs_sysc = {
3440 .rev_offs = 0x0000,
3441 .sysc_offs = 0x0010,
3442 .syss_offs = 0x0014,
3443 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
3444 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
3445 SYSC_HAS_AUTOIDLE),
3446 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
3447 .sysc_fields = &omap_hwmod_sysc_type1,
3448};
3449
3450static struct omap_hwmod_class omap3xxx_usb_tll_hs_hwmod_class = {
3451 .name = "usb_tll_hs",
3452 .sysc = &omap3xxx_usb_tll_hs_sysc,
3453};
3454
3455static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
3456 { .name = "tll-irq", .irq = 78 },
3457 { .irq = -1 }
3458};
3459
3460static struct omap_hwmod_addr_space omap3xxx_usb_tll_hs_addrs[] = {
3461 {
3462 .name = "tll",
3463 .pa_start = 0x48062000,
3464 .pa_end = 0x48062fff,
3465 .flags = ADDR_TYPE_RT
3466 },
3467 {}
3468};
3469
3470static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_tll_hs = {
3471 .master = &omap3xxx_l4_core_hwmod,
3472 .slave = &omap3xxx_usb_tll_hs_hwmod,
3473 .clk = "usbtll_ick",
3474 .addr = omap3xxx_usb_tll_hs_addrs,
3475 .user = OCP_USER_MPU | OCP_USER_SDMA,
3476};
3477
3478static struct omap_hwmod_ocp_if *omap3xxx_usb_tll_hs_slaves[] = {
3479 &omap3xxx_l4_core__usb_tll_hs,
3480};
3481
3482static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
3483 .name = "usb_tll_hs",
3484 .class = &omap3xxx_usb_tll_hs_hwmod_class,
3485 .clkdm_name = "l3_init_clkdm",
3486 .mpu_irqs = omap3xxx_usb_tll_hs_irqs,
3487 .main_clk = "usbtll_fck",
3488 .prcm = {
3489 .omap2 = {
3490 .module_offs = CORE_MOD,
3491 .prcm_reg_id = 3,
3492 .module_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
3493 .idlest_reg_id = 3,
3494 .idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,
3495 },
3496 },
3497 .slaves = omap3xxx_usb_tll_hs_slaves,
3498 .slaves_cnt = ARRAY_SIZE(omap3xxx_usb_tll_hs_slaves),
3499};
3500
3180static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { 3501static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3181 &omap3xxx_l3_main_hwmod, 3502 &omap3xxx_l3_main_hwmod,
3182 &omap3xxx_l4_core_hwmod, 3503 &omap3xxx_l4_core_hwmod,
3183 &omap3xxx_l4_per_hwmod, 3504 &omap3xxx_l4_per_hwmod,
3184 &omap3xxx_l4_wkup_hwmod, 3505 &omap3xxx_l4_wkup_hwmod,
3185 &omap3xxx_mmc1_hwmod,
3186 &omap3xxx_mmc2_hwmod,
3187 &omap3xxx_mmc3_hwmod, 3506 &omap3xxx_mmc3_hwmod,
3188 &omap3xxx_mpu_hwmod, 3507 &omap3xxx_mpu_hwmod,
3189 3508
@@ -3198,12 +3517,12 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3198 &omap3xxx_timer9_hwmod, 3517 &omap3xxx_timer9_hwmod,
3199 &omap3xxx_timer10_hwmod, 3518 &omap3xxx_timer10_hwmod,
3200 &omap3xxx_timer11_hwmod, 3519 &omap3xxx_timer11_hwmod,
3201 &omap3xxx_timer12_hwmod,
3202 3520
3203 &omap3xxx_wd_timer2_hwmod, 3521 &omap3xxx_wd_timer2_hwmod,
3204 &omap3xxx_uart1_hwmod, 3522 &omap3xxx_uart1_hwmod,
3205 &omap3xxx_uart2_hwmod, 3523 &omap3xxx_uart2_hwmod,
3206 &omap3xxx_uart3_hwmod, 3524 &omap3xxx_uart3_hwmod,
3525
3207 /* dss class */ 3526 /* dss class */
3208 &omap3xxx_dss_dispc_hwmod, 3527 &omap3xxx_dss_dispc_hwmod,
3209 &omap3xxx_dss_dsi1_hwmod, 3528 &omap3xxx_dss_dsi1_hwmod,
@@ -3245,20 +3564,38 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3245 NULL, 3564 NULL,
3246}; 3565};
3247 3566
3567/* GP-only hwmods */
3568static __initdata struct omap_hwmod *omap3xxx_gp_hwmods[] = {
3569 &omap3xxx_timer12_hwmod,
3570 NULL
3571};
3572
3248/* 3430ES1-only hwmods */ 3573/* 3430ES1-only hwmods */
3249static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { 3574static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
3250 &omap3xxx_iva_hwmod,
3251 &omap3430es1_dss_core_hwmod, 3575 &omap3430es1_dss_core_hwmod,
3252 &omap3xxx_mailbox_hwmod,
3253 NULL 3576 NULL
3254}; 3577};
3255 3578
3256/* 3430ES2+-only hwmods */ 3579/* 3430ES2+-only hwmods */
3257static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { 3580static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
3258 &omap3xxx_iva_hwmod,
3259 &omap3xxx_dss_core_hwmod, 3581 &omap3xxx_dss_core_hwmod,
3260 &omap3xxx_usbhsotg_hwmod, 3582 &omap3xxx_usbhsotg_hwmod,
3261 &omap3xxx_mailbox_hwmod, 3583 &omap3xxx_usb_host_hs_hwmod,
3584 &omap3xxx_usb_tll_hs_hwmod,
3585 NULL
3586};
3587
3588/* <= 3430ES3-only hwmods */
3589static struct omap_hwmod *omap3430_pre_es3_hwmods[] __initdata = {
3590 &omap3xxx_pre_es3_mmc1_hwmod,
3591 &omap3xxx_pre_es3_mmc2_hwmod,
3592 NULL
3593};
3594
3595/* 3430ES3+-only hwmods */
3596static struct omap_hwmod *omap3430_es3plus_hwmods[] __initdata = {
3597 &omap3xxx_es3plus_mmc1_hwmod,
3598 &omap3xxx_es3plus_mmc2_hwmod,
3262 NULL 3599 NULL
3263}; 3600};
3264 3601
@@ -3280,12 +3617,21 @@ static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
3280 &omap36xx_sr2_hwmod, 3617 &omap36xx_sr2_hwmod,
3281 &omap3xxx_usbhsotg_hwmod, 3618 &omap3xxx_usbhsotg_hwmod,
3282 &omap3xxx_mailbox_hwmod, 3619 &omap3xxx_mailbox_hwmod,
3620 &omap3xxx_usb_host_hs_hwmod,
3621 &omap3xxx_usb_tll_hs_hwmod,
3622 &omap3xxx_es3plus_mmc1_hwmod,
3623 &omap3xxx_es3plus_mmc2_hwmod,
3283 NULL 3624 NULL
3284}; 3625};
3285 3626
3286static __initdata struct omap_hwmod *am35xx_hwmods[] = { 3627static __initdata struct omap_hwmod *am35xx_hwmods[] = {
3287 &omap3xxx_dss_core_hwmod, /* XXX ??? */ 3628 &omap3xxx_dss_core_hwmod, /* XXX ??? */
3288 &am35xx_usbhsotg_hwmod, 3629 &am35xx_usbhsotg_hwmod,
3630 &am35xx_uart4_hwmod,
3631 &omap3xxx_usb_host_hs_hwmod,
3632 &omap3xxx_usb_tll_hs_hwmod,
3633 &omap3xxx_es3plus_mmc1_hwmod,
3634 &omap3xxx_es3plus_mmc2_hwmod,
3289 NULL 3635 NULL
3290}; 3636};
3291 3637
@@ -3300,6 +3646,13 @@ int __init omap3xxx_hwmod_init(void)
3300 if (r < 0) 3646 if (r < 0)
3301 return r; 3647 return r;
3302 3648
3649 /* Register GP-only hwmods. */
3650 if (omap_type() == OMAP2_DEVICE_TYPE_GP) {
3651 r = omap_hwmod_register(omap3xxx_gp_hwmods);
3652 if (r < 0)
3653 return r;
3654 }
3655
3303 rev = omap_rev(); 3656 rev = omap_rev();
3304 3657
3305 /* 3658 /*
@@ -3338,6 +3691,21 @@ int __init omap3xxx_hwmod_init(void)
3338 h = omap3430es2plus_hwmods; 3691 h = omap3430es2plus_hwmods;
3339 }; 3692 };
3340 3693
3694 if (h) {
3695 r = omap_hwmod_register(h);
3696 if (r < 0)
3697 return r;
3698 }
3699
3700 h = NULL;
3701 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||
3702 rev == OMAP3430_REV_ES2_1) {
3703 h = omap3430_pre_es3_hwmods;
3704 } else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
3705 rev == OMAP3430_REV_ES3_1_2) {
3706 h = omap3430_es3plus_hwmods;
3707 };
3708
3341 if (h) 3709 if (h)
3342 r = omap_hwmod_register(h); 3710 r = omap_hwmod_register(h);
3343 3711
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index daaf165af696..f9f151081760 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -70,6 +70,8 @@ static struct omap_hwmod omap44xx_mmc2_hwmod;
70static struct omap_hwmod omap44xx_mpu_hwmod; 70static struct omap_hwmod omap44xx_mpu_hwmod;
71static struct omap_hwmod omap44xx_mpu_private_hwmod; 71static struct omap_hwmod omap44xx_mpu_private_hwmod;
72static struct omap_hwmod omap44xx_usb_otg_hs_hwmod; 72static struct omap_hwmod omap44xx_usb_otg_hs_hwmod;
73static struct omap_hwmod omap44xx_usb_host_hs_hwmod;
74static struct omap_hwmod omap44xx_usb_tll_hs_hwmod;
73 75
74/* 76/*
75 * Interconnects omap_hwmod structures 77 * Interconnects omap_hwmod structures
@@ -2246,6 +2248,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
2246 SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), 2248 SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
2247 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 2249 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
2248 SIDLE_SMART_WKUP), 2250 SIDLE_SMART_WKUP),
2251 .clockact = CLOCKACT_TEST_ICLK,
2249 .sysc_fields = &omap_hwmod_sysc_type1, 2252 .sysc_fields = &omap_hwmod_sysc_type1,
2250}; 2253};
2251 2254
@@ -2300,7 +2303,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
2300 .name = "i2c1", 2303 .name = "i2c1",
2301 .class = &omap44xx_i2c_hwmod_class, 2304 .class = &omap44xx_i2c_hwmod_class,
2302 .clkdm_name = "l4_per_clkdm", 2305 .clkdm_name = "l4_per_clkdm",
2303 .flags = HWMOD_16BIT_REG, 2306 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
2304 .mpu_irqs = omap44xx_i2c1_irqs, 2307 .mpu_irqs = omap44xx_i2c1_irqs,
2305 .sdma_reqs = omap44xx_i2c1_sdma_reqs, 2308 .sdma_reqs = omap44xx_i2c1_sdma_reqs,
2306 .main_clk = "i2c1_fck", 2309 .main_clk = "i2c1_fck",
@@ -2356,7 +2359,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
2356 .name = "i2c2", 2359 .name = "i2c2",
2357 .class = &omap44xx_i2c_hwmod_class, 2360 .class = &omap44xx_i2c_hwmod_class,
2358 .clkdm_name = "l4_per_clkdm", 2361 .clkdm_name = "l4_per_clkdm",
2359 .flags = HWMOD_16BIT_REG, 2362 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
2360 .mpu_irqs = omap44xx_i2c2_irqs, 2363 .mpu_irqs = omap44xx_i2c2_irqs,
2361 .sdma_reqs = omap44xx_i2c2_sdma_reqs, 2364 .sdma_reqs = omap44xx_i2c2_sdma_reqs,
2362 .main_clk = "i2c2_fck", 2365 .main_clk = "i2c2_fck",
@@ -2412,7 +2415,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
2412 .name = "i2c3", 2415 .name = "i2c3",
2413 .class = &omap44xx_i2c_hwmod_class, 2416 .class = &omap44xx_i2c_hwmod_class,
2414 .clkdm_name = "l4_per_clkdm", 2417 .clkdm_name = "l4_per_clkdm",
2415 .flags = HWMOD_16BIT_REG, 2418 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
2416 .mpu_irqs = omap44xx_i2c3_irqs, 2419 .mpu_irqs = omap44xx_i2c3_irqs,
2417 .sdma_reqs = omap44xx_i2c3_sdma_reqs, 2420 .sdma_reqs = omap44xx_i2c3_sdma_reqs,
2418 .main_clk = "i2c3_fck", 2421 .main_clk = "i2c3_fck",
@@ -2468,7 +2471,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
2468 .name = "i2c4", 2471 .name = "i2c4",
2469 .class = &omap44xx_i2c_hwmod_class, 2472 .class = &omap44xx_i2c_hwmod_class,
2470 .clkdm_name = "l4_per_clkdm", 2473 .clkdm_name = "l4_per_clkdm",
2471 .flags = HWMOD_16BIT_REG, 2474 .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
2472 .mpu_irqs = omap44xx_i2c4_irqs, 2475 .mpu_irqs = omap44xx_i2c4_irqs,
2473 .sdma_reqs = omap44xx_i2c4_sdma_reqs, 2476 .sdma_reqs = omap44xx_i2c4_sdma_reqs,
2474 .main_clk = "i2c4_fck", 2477 .main_clk = "i2c4_fck",
@@ -5276,6 +5279,207 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
5276 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves), 5279 .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves),
5277}; 5280};
5278 5281
5282/*
5283 * 'usb_host_hs' class
5284 * high-speed multi-port usb host controller
5285 */
5286static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = {
5287 .master = &omap44xx_usb_host_hs_hwmod,
5288 .slave = &omap44xx_l3_main_2_hwmod,
5289 .clk = "l3_div_ck",
5290 .user = OCP_USER_MPU | OCP_USER_SDMA,
5291};
5292
5293static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
5294 .rev_offs = 0x0000,
5295 .sysc_offs = 0x0010,
5296 .syss_offs = 0x0014,
5297 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
5298 SYSC_HAS_SOFTRESET),
5299 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
5300 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
5301 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
5302 .sysc_fields = &omap_hwmod_sysc_type2,
5303};
5304
5305static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {
5306 .name = "usb_host_hs",
5307 .sysc = &omap44xx_usb_host_hs_sysc,
5308};
5309
5310static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = {
5311 &omap44xx_usb_host_hs__l3_main_2,
5312};
5313
5314static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {
5315 {
5316 .name = "uhh",
5317 .pa_start = 0x4a064000,
5318 .pa_end = 0x4a0647ff,
5319 .flags = ADDR_TYPE_RT
5320 },
5321 {
5322 .name = "ohci",
5323 .pa_start = 0x4a064800,
5324 .pa_end = 0x4a064bff,
5325 },
5326 {
5327 .name = "ehci",
5328 .pa_start = 0x4a064c00,
5329 .pa_end = 0x4a064fff,
5330 },
5331 {}
5332};
5333
5334static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = {
5335 { .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START },
5336 { .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START },
5337 { .irq = -1 }
5338};
5339
5340static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {
5341 .master = &omap44xx_l4_cfg_hwmod,
5342 .slave = &omap44xx_usb_host_hs_hwmod,
5343 .clk = "l4_div_ck",
5344 .addr = omap44xx_usb_host_hs_addrs,
5345 .user = OCP_USER_MPU | OCP_USER_SDMA,
5346};
5347
5348static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = {
5349 &omap44xx_l4_cfg__usb_host_hs,
5350};
5351
5352static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
5353 .name = "usb_host_hs",
5354 .class = &omap44xx_usb_host_hs_hwmod_class,
5355 .clkdm_name = "l3_init_clkdm",
5356 .main_clk = "usb_host_hs_fck",
5357 .prcm = {
5358 .omap4 = {
5359 .clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET,
5360 .context_offs = OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET,
5361 .modulemode = MODULEMODE_SWCTRL,
5362 },
5363 },
5364 .mpu_irqs = omap44xx_usb_host_hs_irqs,
5365 .slaves = omap44xx_usb_host_hs_slaves,
5366 .slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves),
5367 .masters = omap44xx_usb_host_hs_masters,
5368 .masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters),
5369
5370 /*
5371 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
5372 * id: i660
5373 *
5374 * Description:
5375 * In the following configuration :
5376 * - USBHOST module is set to smart-idle mode
5377 * - PRCM asserts idle_req to the USBHOST module ( This typically
5378 * happens when the system is going to a low power mode : all ports
5379 * have been suspended, the master part of the USBHOST module has
5380 * entered the standby state, and SW has cut the functional clocks)
5381 * - an USBHOST interrupt occurs before the module is able to answer
5382 * idle_ack, typically a remote wakeup IRQ.
5383 * Then the USB HOST module will enter a deadlock situation where it
5384 * is no more accessible nor functional.
5385 *
5386 * Workaround:
5387 * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE
5388 */
5389
5390 /*
5391 * Errata: USB host EHCI may stall when entering smart-standby mode
5392 * Id: i571
5393 *
5394 * Description:
5395 * When the USBHOST module is set to smart-standby mode, and when it is
5396 * ready to enter the standby state (i.e. all ports are suspended and
5397 * all attached devices are in suspend mode), then it can wrongly assert
5398 * the Mstandby signal too early while there are still some residual OCP
5399 * transactions ongoing. If this condition occurs, the internal state
5400 * machine may go to an undefined state and the USB link may be stuck
5401 * upon the next resume.
5402 *
5403 * Workaround:
5404 * Don't use smart standby; use only force standby,
5405 * hence HWMOD_SWSUP_MSTANDBY
5406 */
5407
5408 /*
5409 * During system boot; If the hwmod framework resets the module
5410 * the module will have smart idle settings; which can lead to deadlock
5411 * (above Errata Id:i660); so, dont reset the module during boot;
5412 * Use HWMOD_INIT_NO_RESET.
5413 */
5414
5415 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
5416 HWMOD_INIT_NO_RESET,
5417};
5418
5419/*
5420 * 'usb_tll_hs' class
5421 * usb_tll_hs module is the adapter on the usb_host_hs ports
5422 */
5423static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = {
5424 .rev_offs = 0x0000,
5425 .sysc_offs = 0x0010,
5426 .syss_offs = 0x0014,
5427 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
5428 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
5429 SYSC_HAS_AUTOIDLE),
5430 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
5431 .sysc_fields = &omap_hwmod_sysc_type1,
5432};
5433
5434static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = {
5435 .name = "usb_tll_hs",
5436 .sysc = &omap44xx_usb_tll_hs_sysc,
5437};
5438
5439static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = {
5440 { .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START },
5441 { .irq = -1 }
5442};
5443
5444static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = {
5445 {
5446 .name = "tll",
5447 .pa_start = 0x4a062000,
5448 .pa_end = 0x4a063fff,
5449 .flags = ADDR_TYPE_RT
5450 },
5451 {}
5452};
5453
5454static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {
5455 .master = &omap44xx_l4_cfg_hwmod,
5456 .slave = &omap44xx_usb_tll_hs_hwmod,
5457 .clk = "l4_div_ck",
5458 .addr = omap44xx_usb_tll_hs_addrs,
5459 .user = OCP_USER_MPU | OCP_USER_SDMA,
5460};
5461
5462static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = {
5463 &omap44xx_l4_cfg__usb_tll_hs,
5464};
5465
5466static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {
5467 .name = "usb_tll_hs",
5468 .class = &omap44xx_usb_tll_hs_hwmod_class,
5469 .clkdm_name = "l3_init_clkdm",
5470 .main_clk = "usb_tll_hs_ick",
5471 .prcm = {
5472 .omap4 = {
5473 .clkctrl_offs = OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET,
5474 .context_offs = OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET,
5475 .modulemode = MODULEMODE_HWCTRL,
5476 },
5477 },
5478 .mpu_irqs = omap44xx_usb_tll_hs_irqs,
5479 .slaves = omap44xx_usb_tll_hs_slaves,
5480 .slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves),
5481};
5482
5279static __initdata struct omap_hwmod *omap44xx_hwmods[] = { 5483static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
5280 5484
5281 /* dmm class */ 5485 /* dmm class */
@@ -5415,13 +5619,16 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
5415 &omap44xx_uart3_hwmod, 5619 &omap44xx_uart3_hwmod,
5416 &omap44xx_uart4_hwmod, 5620 &omap44xx_uart4_hwmod,
5417 5621
5622 /* usb host class */
5623 &omap44xx_usb_host_hs_hwmod,
5624 &omap44xx_usb_tll_hs_hwmod,
5625
5418 /* usb_otg_hs class */ 5626 /* usb_otg_hs class */
5419 &omap44xx_usb_otg_hs_hwmod, 5627 &omap44xx_usb_otg_hs_hwmod,
5420 5628
5421 /* wd_timer class */ 5629 /* wd_timer class */
5422 &omap44xx_wd_timer2_hwmod, 5630 &omap44xx_wd_timer2_hwmod,
5423 &omap44xx_wd_timer3_hwmod, 5631 &omap44xx_wd_timer3_hwmod,
5424
5425 NULL, 5632 NULL,
5426}; 5633};
5427 5634
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 0363dcb0ef93..da2d80f5fcbd 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -201,6 +201,8 @@
201#define OMAP3430_EN_MMC2_SHIFT 25 201#define OMAP3430_EN_MMC2_SHIFT 25
202#define OMAP3430_EN_MMC1_MASK (1 << 24) 202#define OMAP3430_EN_MMC1_MASK (1 << 24)
203#define OMAP3430_EN_MMC1_SHIFT 24 203#define OMAP3430_EN_MMC1_SHIFT 24
204#define OMAP3430_EN_UART4_MASK (1 << 23)
205#define OMAP3430_EN_UART4_SHIFT 23
204#define OMAP3430_EN_MCSPI4_MASK (1 << 21) 206#define OMAP3430_EN_MCSPI4_MASK (1 << 21)
205#define OMAP3430_EN_MCSPI4_SHIFT 21 207#define OMAP3430_EN_MCSPI4_SHIFT 21
206#define OMAP3430_EN_MCSPI3_MASK (1 << 20) 208#define OMAP3430_EN_MCSPI3_MASK (1 << 20)
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index ebda7382c65b..2efd6454bce0 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -357,7 +357,7 @@
357#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69 357#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69
358#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70 358#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70
359#define INT_35XX_USBOTG_IRQ 71 359#define INT_35XX_USBOTG_IRQ 71
360#define INT_35XX_UART4 84 360#define INT_35XX_UART4_IRQ 84
361#define INT_35XX_CCDC_VD0_IRQ 88 361#define INT_35XX_CCDC_VD0_IRQ 88
362#define INT_35XX_CCDC_VD1_IRQ 92 362#define INT_35XX_CCDC_VD1_IRQ 92
363#define INT_35XX_CCDC_VD2_IRQ 93 363#define INT_35XX_CCDC_VD2_IRQ 93
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 1ab9fd6abe6d..865a2ba7ffa8 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -44,6 +44,7 @@
44#define OMAP3_UART2_BASE OMAP2_UART2_BASE 44#define OMAP3_UART2_BASE OMAP2_UART2_BASE
45#define OMAP3_UART3_BASE 0x49020000 45#define OMAP3_UART3_BASE 0x49020000
46#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */ 46#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
47#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
47 48
48/* OMAP4 serial ports */ 49/* OMAP4 serial ports */
49#define OMAP4_UART1_BASE OMAP2_UART1_BASE 50#define OMAP4_UART1_BASE OMAP2_UART1_BASE
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-14 23:22:48 -0400