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-rw-r--r--drivers/gpio/Kconfig6
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/gpio-tps65912.c156
-rw-r--r--drivers/mfd/Kconfig53
-rw-r--r--drivers/mfd/Makefile8
-rw-r--r--drivers/mfd/aat2870-core.c535
-rw-r--r--drivers/mfd/ab3550-core.c41
-rw-r--r--drivers/mfd/ab8500-core.c231
-rw-r--r--drivers/mfd/ab8500-debugfs.c41
-rw-r--r--drivers/mfd/jz4740-adc.c90
-rw-r--r--drivers/mfd/lpc_sch.c49
-rw-r--r--drivers/mfd/max8997-irq.c2
-rw-r--r--drivers/mfd/omap-usb-host.c4
-rw-r--r--drivers/mfd/stmpe.c2
-rw-r--r--drivers/mfd/stmpe.h1
-rw-r--r--drivers/mfd/tps65910.c13
-rw-r--r--drivers/mfd/tps65911-comparator.c2
-rw-r--r--drivers/mfd/tps65912-core.c177
-rw-r--r--drivers/mfd/tps65912-i2c.c139
-rw-r--r--drivers/mfd/tps65912-irq.c224
-rw-r--r--drivers/mfd/tps65912-spi.c142
-rw-r--r--drivers/mfd/twl-core.c2
-rw-r--r--drivers/mfd/twl4030-madc.c8
-rw-r--r--drivers/mfd/twl6030-pwm.c2
-rw-r--r--drivers/mfd/wm831x-auxadc.c299
-rw-r--r--drivers/mfd/wm831x-core.c259
-rw-r--r--drivers/mfd/wm831x-irq.c77
-rw-r--r--drivers/mfd/wm8350-irq.c18
-rw-r--r--drivers/mfd/wm8994-core.c33
-rw-r--r--drivers/mfd/wm8994-irq.c12
-rw-r--r--drivers/regulator/Kconfig13
-rw-r--r--drivers/regulator/Makefile2
-rw-r--r--drivers/regulator/aat2870-regulator.c232
-rw-r--r--drivers/regulator/tps65912-regulator.c800
-rw-r--r--drivers/video/backlight/Kconfig7
-rw-r--r--drivers/video/backlight/Makefile1
-rw-r--r--drivers/video/backlight/aat2870_bl.c246
-rw-r--r--include/linux/mfd/aat2870.h181
-rw-r--r--include/linux/mfd/ab8500.h8
-rw-r--r--include/linux/mfd/stmpe.h3
-rw-r--r--include/linux/mfd/tps65910.h1
-rw-r--r--include/linux/mfd/tps65912.h327
-rw-r--r--include/linux/mfd/wm831x/core.h119
-rw-r--r--include/linux/mfd/wm831x/pdata.h3
44 files changed, 4118 insertions, 452 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 363498697c2c..6778f56a4c64 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -280,6 +280,12 @@ config GPIO_TC3589X
280 This enables support for the GPIOs found on the TC3589X 280 This enables support for the GPIOs found on the TC3589X
281 I/O Expander. 281 I/O Expander.
282 282
283config GPIO_TPS65912
284 tristate "TI TPS65912 GPIO"
285 depends on (MFD_TPS65912_I2C || MFD_TPS65912_SPI)
286 help
287 This driver supports TPS65912 gpio chip
288
283config GPIO_TWL4030 289config GPIO_TWL4030
284 tristate "TWL4030, TWL5030, and TPS659x0 GPIOs" 290 tristate "TWL4030, TWL5030, and TPS659x0 GPIOs"
285 depends on TWL4030_CORE 291 depends on TWL4030_CORE
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 720711251391..4b81d4e1e709 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o
48obj-$(CONFIG_ARCH_TEGRA) += gpio-tegra.o 48obj-$(CONFIG_ARCH_TEGRA) += gpio-tegra.o
49obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o 49obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o
50obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o 50obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o
51obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o
51obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o 52obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
52obj-$(CONFIG_MACH_U300) += gpio-u300.o 53obj-$(CONFIG_MACH_U300) += gpio-u300.o
53obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o 54obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o
diff --git a/drivers/gpio/gpio-tps65912.c b/drivers/gpio/gpio-tps65912.c
new file mode 100644
index 000000000000..79e66c002350
--- /dev/null
+++ b/drivers/gpio/gpio-tps65912.c
@@ -0,0 +1,156 @@
1/*
2 * Copyright 2011 Texas Instruments Inc.
3 *
4 * Author: Margarita Olaya <magi@slimlogic.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * This driver is based on wm8350 implementation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/errno.h>
17#include <linux/gpio.h>
18#include <linux/mfd/core.h>
19#include <linux/platform_device.h>
20#include <linux/seq_file.h>
21#include <linux/slab.h>
22#include <linux/mfd/tps65912.h>
23
24struct tps65912_gpio_data {
25 struct tps65912 *tps65912;
26 struct gpio_chip gpio_chip;
27};
28
29static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset)
30{
31 struct tps65912 *tps65912 = container_of(gc, struct tps65912, gpio);
32 int val;
33
34 val = tps65912_reg_read(tps65912, TPS65912_GPIO1 + offset);
35
36 if (val & GPIO_STS_MASK)
37 return 1;
38
39 return 0;
40}
41
42static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset,
43 int value)
44{
45 struct tps65912 *tps65912 = container_of(gc, struct tps65912, gpio);
46
47 if (value)
48 tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset,
49 GPIO_SET_MASK);
50 else
51 tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset,
52 GPIO_SET_MASK);
53}
54
55static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset,
56 int value)
57{
58 struct tps65912 *tps65912 = container_of(gc, struct tps65912, gpio);
59
60 /* Set the initial value */
61 tps65912_gpio_set(gc, offset, value);
62
63 return tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset,
64 GPIO_CFG_MASK);
65}
66
67static int tps65912_gpio_input(struct gpio_chip *gc, unsigned offset)
68{
69 struct tps65912 *tps65912 = container_of(gc, struct tps65912, gpio);
70
71 return tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset,
72 GPIO_CFG_MASK);
73
74}
75
76static struct gpio_chip template_chip = {
77 .label = "tps65912",
78 .owner = THIS_MODULE,
79 .direction_input = tps65912_gpio_input,
80 .direction_output = tps65912_gpio_output,
81 .get = tps65912_gpio_get,
82 .set = tps65912_gpio_set,
83 .can_sleep = 1,
84 .ngpio = 5,
85 .base = -1,
86};
87
88static int __devinit tps65912_gpio_probe(struct platform_device *pdev)
89{
90 struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent);
91 struct tps65912_board *pdata = tps65912->dev->platform_data;
92 struct tps65912_gpio_data *tps65912_gpio;
93 int ret;
94
95 tps65912_gpio = kzalloc(sizeof(*tps65912_gpio), GFP_KERNEL);
96 if (tps65912_gpio == NULL)
97 return -ENOMEM;
98
99 tps65912_gpio->tps65912 = tps65912;
100 tps65912_gpio->gpio_chip = template_chip;
101 tps65912_gpio->gpio_chip.dev = &pdev->dev;
102 if (pdata && pdata->gpio_base)
103 tps65912_gpio->gpio_chip.base = pdata->gpio_base;
104
105 ret = gpiochip_add(&tps65912_gpio->gpio_chip);
106 if (ret < 0) {
107 dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret);
108 goto err;
109 }
110
111 platform_set_drvdata(pdev, tps65912_gpio);
112
113 return ret;
114
115err:
116 kfree(tps65912_gpio);
117 return ret;
118}
119
120static int __devexit tps65912_gpio_remove(struct platform_device *pdev)
121{
122 struct tps65912_gpio_data *tps65912_gpio = platform_get_drvdata(pdev);
123 int ret;
124
125 ret = gpiochip_remove(&tps65912_gpio->gpio_chip);
126 if (ret == 0)
127 kfree(tps65912_gpio);
128
129 return ret;
130}
131
132static struct platform_driver tps65912_gpio_driver = {
133 .driver = {
134 .name = "tps65912-gpio",
135 .owner = THIS_MODULE,
136 },
137 .probe = tps65912_gpio_probe,
138 .remove = __devexit_p(tps65912_gpio_remove),
139};
140
141static int __init tps65912_gpio_init(void)
142{
143 return platform_driver_register(&tps65912_gpio_driver);
144}
145subsys_initcall(tps65912_gpio_init);
146
147static void __exit tps65912_gpio_exit(void)
148{
149 platform_driver_unregister(&tps65912_gpio_driver);
150}
151module_exit(tps65912_gpio_exit);
152
153MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>");
154MODULE_DESCRIPTION("GPIO interface for TPS65912 PMICs");
155MODULE_LICENSE("GPL v2");
156MODULE_ALIAS("platform:tps65912-gpio");
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 37b83eb6d703..21574bdf485f 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -171,6 +171,37 @@ config MFD_TPS6586X
171 This driver can also be built as a module. If so, the module 171 This driver can also be built as a module. If so, the module
172 will be called tps6586x. 172 will be called tps6586x.
173 173
174config MFD_TPS65910
175 bool "TPS65910 Power Management chip"
176 depends on I2C=y && GPIOLIB
177 select MFD_CORE
178 select GPIO_TPS65910
179 help
180 if you say yes here you get support for the TPS65910 series of
181 Power Management chips.
182
183config MFD_TPS65912
184 bool
185 depends on GPIOLIB
186
187config MFD_TPS65912_I2C
188 bool "TPS95612 Power Management chip with I2C"
189 select MFD_CORE
190 select MFD_TPS65912
191 depends on I2C=y && GPIOLIB
192 help
193 If you say yes here you get support for the TPS65912 series of
194 PM chips with I2C interface.
195
196config MFD_TPS65912_SPI
197 bool "TPS65912 Power Management chip with SPI"
198 select MFD_CORE
199 select MFD_TPS65912
200 depends on SPI_MASTER && GPIOLIB
201 help
202 If you say yes here you get support for the TPS65912 series of
203 PM chips with SPI interface.
204
174config MENELAUS 205config MENELAUS
175 bool "Texas Instruments TWL92330/Menelaus PM chip" 206 bool "Texas Instruments TWL92330/Menelaus PM chip"
176 depends on I2C=y && ARCH_OMAP2 207 depends on I2C=y && ARCH_OMAP2
@@ -662,8 +693,9 @@ config MFD_JANZ_CMODIO
662 CAN and GPIO controllers. 693 CAN and GPIO controllers.
663 694
664config MFD_JZ4740_ADC 695config MFD_JZ4740_ADC
665 tristate "Support for the JZ4740 SoC ADC core" 696 bool "Support for the JZ4740 SoC ADC core"
666 select MFD_CORE 697 select MFD_CORE
698 select GENERIC_IRQ_CHIP
667 depends on MACH_JZ4740 699 depends on MACH_JZ4740
668 help 700 help
669 Say yes here if you want support for the ADC unit in the JZ4740 SoC. 701 Say yes here if you want support for the ADC unit in the JZ4740 SoC.
@@ -725,18 +757,19 @@ config MFD_PM8XXX_IRQ
725 This is required to use certain other PM 8xxx features, such as GPIO 757 This is required to use certain other PM 8xxx features, such as GPIO
726 and MPP. 758 and MPP.
727 759
728config MFD_TPS65910
729 bool "TPS65910 Power Management chip"
730 depends on I2C=y && GPIOLIB
731 select MFD_CORE
732 select GPIO_TPS65910
733 help
734 if you say yes here you get support for the TPS65910 series of
735 Power Management chips.
736
737config TPS65911_COMPARATOR 760config TPS65911_COMPARATOR
738 tristate 761 tristate
739 762
763config MFD_AAT2870_CORE
764 bool "Support for the AnalogicTech AAT2870"
765 select MFD_CORE
766 depends on I2C=y && GPIOLIB
767 help
768 If you say yes here you get support for the AAT2870.
769 This driver provides common support for accessing the device,
770 additional drivers must be enabled in order to use the
771 functionality of the device.
772
740endif # MFD_SUPPORT 773endif # MFD_SUPPORT
741 774
742menu "Multimedia Capabilities Port drivers" 775menu "Multimedia Capabilities Port drivers"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 22a280fcb705..c58020303d18 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o tmio_core.o
23 23
24obj-$(CONFIG_MFD_WM8400) += wm8400-core.o 24obj-$(CONFIG_MFD_WM8400) += wm8400-core.o
25wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o 25wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o
26wm831x-objs += wm831x-auxadc.o
26obj-$(CONFIG_MFD_WM831X) += wm831x.o 27obj-$(CONFIG_MFD_WM831X) += wm831x.o
27obj-$(CONFIG_MFD_WM831X_I2C) += wm831x-i2c.o 28obj-$(CONFIG_MFD_WM831X_I2C) += wm831x-i2c.o
28obj-$(CONFIG_MFD_WM831X_SPI) += wm831x-spi.o 29obj-$(CONFIG_MFD_WM831X_SPI) += wm831x-spi.o
@@ -35,6 +36,11 @@ obj-$(CONFIG_MFD_WM8994) += wm8994-core.o wm8994-irq.o
35obj-$(CONFIG_TPS6105X) += tps6105x.o 36obj-$(CONFIG_TPS6105X) += tps6105x.o
36obj-$(CONFIG_TPS65010) += tps65010.o 37obj-$(CONFIG_TPS65010) += tps65010.o
37obj-$(CONFIG_TPS6507X) += tps6507x.o 38obj-$(CONFIG_TPS6507X) += tps6507x.o
39obj-$(CONFIG_MFD_TPS65910) += tps65910.o tps65910-irq.o
40tps65912-objs := tps65912-core.o tps65912-irq.o
41obj-$(CONFIG_MFD_TPS65912) += tps65912.o
42obj-$(CONFIG_MFD_TPS65912_I2C) += tps65912-i2c.o
43obj-$(CONFIG_MFD_TPS65912_SPI) += tps65912-spi.o
38obj-$(CONFIG_MENELAUS) += menelaus.o 44obj-$(CONFIG_MENELAUS) += menelaus.o
39 45
40obj-$(CONFIG_TWL4030_CORE) += twl-core.o twl4030-irq.o twl6030-irq.o 46obj-$(CONFIG_TWL4030_CORE) += twl-core.o twl4030-irq.o twl6030-irq.o
@@ -94,5 +100,5 @@ obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o
94obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o 100obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o
95obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o 101obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o
96obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o 102obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o
97obj-$(CONFIG_MFD_TPS65910) += tps65910.o tps65910-irq.o
98obj-$(CONFIG_TPS65911_COMPARATOR) += tps65911-comparator.o 103obj-$(CONFIG_TPS65911_COMPARATOR) += tps65911-comparator.o
104obj-$(CONFIG_MFD_AAT2870_CORE) += aat2870-core.o
diff --git a/drivers/mfd/aat2870-core.c b/drivers/mfd/aat2870-core.c
new file mode 100644
index 000000000000..345dc658ef06
--- /dev/null
+++ b/drivers/mfd/aat2870-core.c
@@ -0,0 +1,535 @@
1/*
2 * linux/drivers/mfd/aat2870-core.c
3 *
4 * Copyright (c) 2011, NVIDIA Corporation.
5 * Author: Jin Park <jinyoungp@nvidia.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 */
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/debugfs.h>
26#include <linux/slab.h>
27#include <linux/uaccess.h>
28#include <linux/i2c.h>
29#include <linux/delay.h>
30#include <linux/gpio.h>
31#include <linux/mfd/core.h>
32#include <linux/mfd/aat2870.h>
33#include <linux/regulator/machine.h>
34
35static struct aat2870_register aat2870_regs[AAT2870_REG_NUM] = {
36 /* readable, writeable, value */
37 { 0, 1, 0x00 }, /* 0x00 AAT2870_BL_CH_EN */
38 { 0, 1, 0x16 }, /* 0x01 AAT2870_BLM */
39 { 0, 1, 0x16 }, /* 0x02 AAT2870_BLS */
40 { 0, 1, 0x56 }, /* 0x03 AAT2870_BL1 */
41 { 0, 1, 0x56 }, /* 0x04 AAT2870_BL2 */
42 { 0, 1, 0x56 }, /* 0x05 AAT2870_BL3 */
43 { 0, 1, 0x56 }, /* 0x06 AAT2870_BL4 */
44 { 0, 1, 0x56 }, /* 0x07 AAT2870_BL5 */
45 { 0, 1, 0x56 }, /* 0x08 AAT2870_BL6 */
46 { 0, 1, 0x56 }, /* 0x09 AAT2870_BL7 */
47 { 0, 1, 0x56 }, /* 0x0A AAT2870_BL8 */
48 { 0, 1, 0x00 }, /* 0x0B AAT2870_FLR */
49 { 0, 1, 0x03 }, /* 0x0C AAT2870_FM */
50 { 0, 1, 0x03 }, /* 0x0D AAT2870_FS */
51 { 0, 1, 0x10 }, /* 0x0E AAT2870_ALS_CFG0 */
52 { 0, 1, 0x06 }, /* 0x0F AAT2870_ALS_CFG1 */
53 { 0, 1, 0x00 }, /* 0x10 AAT2870_ALS_CFG2 */
54 { 1, 0, 0x00 }, /* 0x11 AAT2870_AMB */
55 { 0, 1, 0x00 }, /* 0x12 AAT2870_ALS0 */
56 { 0, 1, 0x00 }, /* 0x13 AAT2870_ALS1 */
57 { 0, 1, 0x00 }, /* 0x14 AAT2870_ALS2 */
58 { 0, 1, 0x00 }, /* 0x15 AAT2870_ALS3 */
59 { 0, 1, 0x00 }, /* 0x16 AAT2870_ALS4 */
60 { 0, 1, 0x00 }, /* 0x17 AAT2870_ALS5 */
61 { 0, 1, 0x00 }, /* 0x18 AAT2870_ALS6 */
62 { 0, 1, 0x00 }, /* 0x19 AAT2870_ALS7 */
63 { 0, 1, 0x00 }, /* 0x1A AAT2870_ALS8 */
64 { 0, 1, 0x00 }, /* 0x1B AAT2870_ALS9 */
65 { 0, 1, 0x00 }, /* 0x1C AAT2870_ALSA */
66 { 0, 1, 0x00 }, /* 0x1D AAT2870_ALSB */
67 { 0, 1, 0x00 }, /* 0x1E AAT2870_ALSC */
68 { 0, 1, 0x00 }, /* 0x1F AAT2870_ALSD */
69 { 0, 1, 0x00 }, /* 0x20 AAT2870_ALSE */
70 { 0, 1, 0x00 }, /* 0x21 AAT2870_ALSF */
71 { 0, 1, 0x00 }, /* 0x22 AAT2870_SUB_SET */
72 { 0, 1, 0x00 }, /* 0x23 AAT2870_SUB_CTRL */
73 { 0, 1, 0x00 }, /* 0x24 AAT2870_LDO_AB */
74 { 0, 1, 0x00 }, /* 0x25 AAT2870_LDO_CD */
75 { 0, 1, 0x00 }, /* 0x26 AAT2870_LDO_EN */
76};
77
78static struct mfd_cell aat2870_devs[] = {
79 {
80 .name = "aat2870-backlight",
81 .id = AAT2870_ID_BL,
82 .pdata_size = sizeof(struct aat2870_bl_platform_data),
83 },
84 {
85 .name = "aat2870-regulator",
86 .id = AAT2870_ID_LDOA,
87 .pdata_size = sizeof(struct regulator_init_data),
88 },
89 {
90 .name = "aat2870-regulator",
91 .id = AAT2870_ID_LDOB,
92 .pdata_size = sizeof(struct regulator_init_data),
93 },
94 {
95 .name = "aat2870-regulator",
96 .id = AAT2870_ID_LDOC,
97 .pdata_size = sizeof(struct regulator_init_data),
98 },
99 {
100 .name = "aat2870-regulator",
101 .id = AAT2870_ID_LDOD,
102 .pdata_size = sizeof(struct regulator_init_data),
103 },
104};
105
106static int __aat2870_read(struct aat2870_data *aat2870, u8 addr, u8 *val)
107{
108 int ret;
109
110 if (addr >= AAT2870_REG_NUM) {
111 dev_err(aat2870->dev, "Invalid address, 0x%02x\n", addr);
112 return -EINVAL;
113 }
114
115 if (!aat2870->reg_cache[addr].readable) {
116 *val = aat2870->reg_cache[addr].value;
117 goto out;
118 }
119
120 ret = i2c_master_send(aat2870->client, &addr, 1);
121 if (ret < 0)
122 return ret;
123 if (ret != 1)
124 return -EIO;
125
126 ret = i2c_master_recv(aat2870->client, val, 1);
127 if (ret < 0)
128 return ret;
129 if (ret != 1)
130 return -EIO;
131
132out:
133 dev_dbg(aat2870->dev, "read: addr=0x%02x, val=0x%02x\n", addr, *val);
134 return 0;
135}
136
137static int __aat2870_write(struct aat2870_data *aat2870, u8 addr, u8 val)
138{
139 u8 msg[2];
140 int ret;
141
142 if (addr >= AAT2870_REG_NUM) {
143 dev_err(aat2870->dev, "Invalid address, 0x%02x\n", addr);
144 return -EINVAL;
145 }
146
147 if (!aat2870->reg_cache[addr].writeable) {
148 dev_err(aat2870->dev, "Address 0x%02x is not writeable\n",
149 addr);
150 return -EINVAL;
151 }
152
153 msg[0] = addr;
154 msg[1] = val;
155 ret = i2c_master_send(aat2870->client, msg, 2);
156 if (ret < 0)
157 return ret;
158 if (ret != 2)
159 return -EIO;
160
161 aat2870->reg_cache[addr].value = val;
162
163 dev_dbg(aat2870->dev, "write: addr=0x%02x, val=0x%02x\n", addr, val);
164 return 0;
165}
166
167static int aat2870_read(struct aat2870_data *aat2870, u8 addr, u8 *val)
168{
169 int ret;
170
171 mutex_lock(&aat2870->io_lock);
172 ret = __aat2870_read(aat2870, addr, val);
173 mutex_unlock(&aat2870->io_lock);
174
175 return ret;
176}
177
178static int aat2870_write(struct aat2870_data *aat2870, u8 addr, u8 val)
179{
180 int ret;
181
182 mutex_lock(&aat2870->io_lock);
183 ret = __aat2870_write(aat2870, addr, val);
184 mutex_unlock(&aat2870->io_lock);
185
186 return ret;
187}
188
189static int aat2870_update(struct aat2870_data *aat2870, u8 addr, u8 mask,
190 u8 val)
191{
192 int change;
193 u8 old_val, new_val;
194 int ret;
195
196 mutex_lock(&aat2870->io_lock);
197
198 ret = __aat2870_read(aat2870, addr, &old_val);
199 if (ret)
200 goto out_unlock;
201
202 new_val = (old_val & ~mask) | (val & mask);
203 change = old_val != new_val;
204 if (change)
205 ret = __aat2870_write(aat2870, addr, new_val);
206
207out_unlock:
208 mutex_unlock(&aat2870->io_lock);
209
210 return ret;
211}
212
213static inline void aat2870_enable(struct aat2870_data *aat2870)
214{
215 if (aat2870->en_pin >= 0)
216 gpio_set_value(aat2870->en_pin, 1);
217
218 aat2870->is_enable = 1;
219}
220
221static inline void aat2870_disable(struct aat2870_data *aat2870)
222{
223 if (aat2870->en_pin >= 0)
224 gpio_set_value(aat2870->en_pin, 0);
225
226 aat2870->is_enable = 0;
227}
228
229#ifdef CONFIG_DEBUG_FS
230static ssize_t aat2870_dump_reg(struct aat2870_data *aat2870, char *buf)
231{
232 u8 addr, val;
233 ssize_t count = 0;
234 int ret;
235
236 count += sprintf(buf, "aat2870 registers\n");
237 for (addr = 0; addr < AAT2870_REG_NUM; addr++) {
238 count += sprintf(buf + count, "0x%02x: ", addr);
239 if (count >= PAGE_SIZE - 1)
240 break;
241
242 ret = aat2870->read(aat2870, addr, &val);
243 if (ret == 0)
244 count += snprintf(buf + count, PAGE_SIZE - count,
245 "0x%02x", val);
246 else
247 count += snprintf(buf + count, PAGE_SIZE - count,
248 "<read fail: %d>", ret);
249
250 if (count >= PAGE_SIZE - 1)
251 break;
252
253 count += snprintf(buf + count, PAGE_SIZE - count, "\n");
254 if (count >= PAGE_SIZE - 1)
255 break;
256 }
257
258 /* Truncate count; min() would cause a warning */
259 if (count >= PAGE_SIZE)
260 count = PAGE_SIZE - 1;
261
262 return count;
263}
264
265static int aat2870_reg_open_file(struct inode *inode, struct file *file)
266{
267 file->private_data = inode->i_private;
268
269 return 0;
270}
271
272static ssize_t aat2870_reg_read_file(struct file *file, char __user *user_buf,
273 size_t count, loff_t *ppos)
274{
275 struct aat2870_data *aat2870 = file->private_data;
276 char *buf;
277 ssize_t ret;
278
279 buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
280 if (!buf)
281 return -ENOMEM;
282
283 ret = aat2870_dump_reg(aat2870, buf);
284 if (ret >= 0)
285 ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
286
287 kfree(buf);
288
289 return ret;
290}
291
292static ssize_t aat2870_reg_write_file(struct file *file,
293 const char __user *user_buf, size_t count,
294 loff_t *ppos)
295{
296 struct aat2870_data *aat2870 = file->private_data;
297 char buf[32];
298 int buf_size;
299 char *start = buf;
300 unsigned long addr, val;
301 int ret;
302
303 buf_size = min(count, (sizeof(buf)-1));
304 if (copy_from_user(buf, user_buf, buf_size)) {
305 dev_err(aat2870->dev, "Failed to copy from user\n");
306 return -EFAULT;
307 }
308 buf[buf_size] = 0;
309
310 while (*start == ' ')
311 start++;
312
313 addr = simple_strtoul(start, &start, 16);
314 if (addr >= AAT2870_REG_NUM) {
315 dev_err(aat2870->dev, "Invalid address, 0x%lx\n", addr);
316 return -EINVAL;
317 }
318
319 while (*start == ' ')
320 start++;
321
322 if (strict_strtoul(start, 16, &val))
323 return -EINVAL;
324
325 ret = aat2870->write(aat2870, (u8)addr, (u8)val);
326 if (ret)
327 return ret;
328
329 return buf_size;
330}
331
332static const struct file_operations aat2870_reg_fops = {
333 .open = aat2870_reg_open_file,
334 .read = aat2870_reg_read_file,
335 .write = aat2870_reg_write_file,
336};
337
338static void aat2870_init_debugfs(struct aat2870_data *aat2870)
339{
340 aat2870->dentry_root = debugfs_create_dir("aat2870", NULL);
341 if (!aat2870->dentry_root) {
342 dev_warn(aat2870->dev,
343 "Failed to create debugfs root directory\n");
344 return;
345 }
346
347 aat2870->dentry_reg = debugfs_create_file("regs", 0644,
348 aat2870->dentry_root,
349 aat2870, &aat2870_reg_fops);
350 if (!aat2870->dentry_reg)
351 dev_warn(aat2870->dev,
352 "Failed to create debugfs register file\n");
353}
354
355static void aat2870_uninit_debugfs(struct aat2870_data *aat2870)
356{
357 debugfs_remove_recursive(aat2870->dentry_root);
358}
359#else
360static inline void aat2870_init_debugfs(struct aat2870_data *aat2870)
361{
362}
363
364static inline void aat2870_uninit_debugfs(struct aat2870_data *aat2870)
365{
366}
367#endif /* CONFIG_DEBUG_FS */
368
369static int aat2870_i2c_probe(struct i2c_client *client,
370 const struct i2c_device_id *id)
371{
372 struct aat2870_platform_data *pdata = client->dev.platform_data;
373 struct aat2870_data *aat2870;
374 int i, j;
375 int ret = 0;
376
377 aat2870 = kzalloc(sizeof(struct aat2870_data), GFP_KERNEL);
378 if (!aat2870) {
379 dev_err(&client->dev,
380 "Failed to allocate memory for aat2870\n");
381 ret = -ENOMEM;
382 goto out;
383 }
384
385 aat2870->dev = &client->dev;
386 dev_set_drvdata(aat2870->dev, aat2870);
387
388 aat2870->client = client;
389 i2c_set_clientdata(client, aat2870);
390
391 aat2870->reg_cache = aat2870_regs;
392
393 if (pdata->en_pin < 0)
394 aat2870->en_pin = -1;
395 else
396 aat2870->en_pin = pdata->en_pin;
397
398 aat2870->init = pdata->init;
399 aat2870->uninit = pdata->uninit;
400 aat2870->read = aat2870_read;
401 aat2870->write = aat2870_write;
402 aat2870->update = aat2870_update;
403
404 mutex_init(&aat2870->io_lock);
405
406 if (aat2870->init)
407 aat2870->init(aat2870);
408
409 if (aat2870->en_pin >= 0) {
410 ret = gpio_request(aat2870->en_pin, "aat2870-en");
411 if (ret < 0) {
412 dev_err(&client->dev,
413 "Failed to request GPIO %d\n", aat2870->en_pin);
414 goto out_kfree;
415 }
416 gpio_direction_output(aat2870->en_pin, 1);
417 }
418
419 aat2870_enable(aat2870);
420
421 for (i = 0; i < pdata->num_subdevs; i++) {
422 for (j = 0; j < ARRAY_SIZE(aat2870_devs); j++) {
423 if ((pdata->subdevs[i].id == aat2870_devs[j].id) &&
424 !strcmp(pdata->subdevs[i].name,
425 aat2870_devs[j].name)) {
426 aat2870_devs[j].platform_data =
427 pdata->subdevs[i].platform_data;
428 break;
429 }
430 }
431 }
432
433 ret = mfd_add_devices(aat2870->dev, 0, aat2870_devs,
434 ARRAY_SIZE(aat2870_devs), NULL, 0);
435 if (ret != 0) {
436 dev_err(aat2870->dev, "Failed to add subdev: %d\n", ret);
437 goto out_disable;
438 }
439
440 aat2870_init_debugfs(aat2870);
441
442 return 0;
443
444out_disable:
445 aat2870_disable(aat2870);
446 if (aat2870->en_pin >= 0)
447 gpio_free(aat2870->en_pin);
448out_kfree:
449 kfree(aat2870);
450out:
451 return ret;
452}
453
454static int aat2870_i2c_remove(struct i2c_client *client)
455{
456 struct aat2870_data *aat2870 = i2c_get_clientdata(client);
457
458 aat2870_uninit_debugfs(aat2870);
459
460 mfd_remove_devices(aat2870->dev);
461 aat2870_disable(aat2870);
462 if (aat2870->en_pin >= 0)
463 gpio_free(aat2870->en_pin);
464 if (aat2870->uninit)
465 aat2870->uninit(aat2870);
466 kfree(aat2870);
467
468 return 0;
469}
470
471#ifdef CONFIG_PM
472static int aat2870_i2c_suspend(struct i2c_client *client, pm_message_t state)
473{
474 struct aat2870_data *aat2870 = i2c_get_clientdata(client);
475
476 aat2870_disable(aat2870);
477
478 return 0;
479}
480
481static int aat2870_i2c_resume(struct i2c_client *client)
482{
483 struct aat2870_data *aat2870 = i2c_get_clientdata(client);
484 struct aat2870_register *reg = NULL;
485 int i;
486
487 aat2870_enable(aat2870);
488
489 /* restore registers */
490 for (i = 0; i < AAT2870_REG_NUM; i++) {
491 reg = &aat2870->reg_cache[i];
492 if (reg->writeable)
493 aat2870->write(aat2870, i, reg->value);
494 }
495
496 return 0;
497}
498#else
499#define aat2870_i2c_suspend NULL
500#define aat2870_i2c_resume NULL
501#endif /* CONFIG_PM */
502
503static struct i2c_device_id aat2870_i2c_id_table[] = {
504 { "aat2870", 0 },
505 { }
506};
507MODULE_DEVICE_TABLE(i2c, aat2870_i2c_id_table);
508
509static struct i2c_driver aat2870_i2c_driver = {
510 .driver = {
511 .name = "aat2870",
512 .owner = THIS_MODULE,
513 },
514 .probe = aat2870_i2c_probe,
515 .remove = aat2870_i2c_remove,
516 .suspend = aat2870_i2c_suspend,
517 .resume = aat2870_i2c_resume,
518 .id_table = aat2870_i2c_id_table,
519};
520
521static int __init aat2870_init(void)
522{
523 return i2c_add_driver(&aat2870_i2c_driver);
524}
525subsys_initcall(aat2870_init);
526
527static void __exit aat2870_exit(void)
528{
529 i2c_del_driver(&aat2870_i2c_driver);
530}
531module_exit(aat2870_exit);
532
533MODULE_DESCRIPTION("Core support for the AnalogicTech AAT2870");
534MODULE_LICENSE("GPL");
535MODULE_AUTHOR("Jin Park <jinyoungp@nvidia.com>");
diff --git a/drivers/mfd/ab3550-core.c b/drivers/mfd/ab3550-core.c
index 3d7dce671b93..56ba1943c91d 100644
--- a/drivers/mfd/ab3550-core.c
+++ b/drivers/mfd/ab3550-core.c
@@ -879,20 +879,13 @@ static ssize_t ab3550_bank_write(struct file *file,
879 size_t count, loff_t *ppos) 879 size_t count, loff_t *ppos)
880{ 880{
881 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private; 881 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
882 char buf[32];
883 int buf_size;
884 unsigned long user_bank; 882 unsigned long user_bank;
885 int err; 883 int err;
886 884
887 /* Get userspace string and assure termination */ 885 /* Get userspace string and assure termination */
888 buf_size = min(count, (sizeof(buf) - 1)); 886 err = kstrtoul_from_user(user_buf, count, 0, &user_bank);
889 if (copy_from_user(buf, user_buf, buf_size))
890 return -EFAULT;
891 buf[buf_size] = 0;
892
893 err = strict_strtoul(buf, 0, &user_bank);
894 if (err) 887 if (err)
895 return -EINVAL; 888 return err;
896 889
897 if (user_bank >= AB3550_NUM_BANKS) { 890 if (user_bank >= AB3550_NUM_BANKS) {
898 dev_err(&ab->i2c_client[0]->dev, 891 dev_err(&ab->i2c_client[0]->dev,
@@ -902,7 +895,7 @@ static ssize_t ab3550_bank_write(struct file *file,
902 895
903 ab->debug_bank = user_bank; 896 ab->debug_bank = user_bank;
904 897
905 return buf_size; 898 return count;
906} 899}
907 900
908static int ab3550_address_print(struct seq_file *s, void *p) 901static int ab3550_address_print(struct seq_file *s, void *p)
@@ -923,27 +916,21 @@ static ssize_t ab3550_address_write(struct file *file,
923 size_t count, loff_t *ppos) 916 size_t count, loff_t *ppos)
924{ 917{
925 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private; 918 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
926 char buf[32];
927 int buf_size;
928 unsigned long user_address; 919 unsigned long user_address;
929 int err; 920 int err;
930 921
931 /* Get userspace string and assure termination */ 922 /* Get userspace string and assure termination */
932 buf_size = min(count, (sizeof(buf) - 1)); 923 err = kstrtoul_from_user(user_buf, count, 0, &user_address);
933 if (copy_from_user(buf, user_buf, buf_size))
934 return -EFAULT;
935 buf[buf_size] = 0;
936
937 err = strict_strtoul(buf, 0, &user_address);
938 if (err) 924 if (err)
939 return -EINVAL; 925 return err;
926
940 if (user_address > 0xff) { 927 if (user_address > 0xff) {
941 dev_err(&ab->i2c_client[0]->dev, 928 dev_err(&ab->i2c_client[0]->dev,
942 "debugfs error input > 0xff\n"); 929 "debugfs error input > 0xff\n");
943 return -EINVAL; 930 return -EINVAL;
944 } 931 }
945 ab->debug_address = user_address; 932 ab->debug_address = user_address;
946 return buf_size; 933 return count;
947} 934}
948 935
949static int ab3550_val_print(struct seq_file *s, void *p) 936static int ab3550_val_print(struct seq_file *s, void *p)
@@ -971,21 +958,15 @@ static ssize_t ab3550_val_write(struct file *file,
971 size_t count, loff_t *ppos) 958 size_t count, loff_t *ppos)
972{ 959{
973 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private; 960 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
974 char buf[32];
975 int buf_size;
976 unsigned long user_val; 961 unsigned long user_val;
977 int err; 962 int err;
978 u8 regvalue; 963 u8 regvalue;
979 964
980 /* Get userspace string and assure termination */ 965 /* Get userspace string and assure termination */
981 buf_size = min(count, (sizeof(buf)-1)); 966 err = kstrtoul_from_user(user_buf, count, 0, &user_val);
982 if (copy_from_user(buf, user_buf, buf_size))
983 return -EFAULT;
984 buf[buf_size] = 0;
985
986 err = strict_strtoul(buf, 0, &user_val);
987 if (err) 967 if (err)
988 return -EINVAL; 968 return err;
969
989 if (user_val > 0xff) { 970 if (user_val > 0xff) {
990 dev_err(&ab->i2c_client[0]->dev, 971 dev_err(&ab->i2c_client[0]->dev,
991 "debugfs error input > 0xff\n"); 972 "debugfs error input > 0xff\n");
@@ -1002,7 +983,7 @@ static ssize_t ab3550_val_write(struct file *file,
1002 if (err) 983 if (err)
1003 return -EINVAL; 984 return -EINVAL;
1004 985
1005 return buf_size; 986 return count;
1006} 987}
1007 988
1008static const struct file_operations ab3550_bank_fops = { 989static const struct file_operations ab3550_bank_fops = {
diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c
index fc0c1af1566e..387705e494b9 100644
--- a/drivers/mfd/ab8500-core.c
+++ b/drivers/mfd/ab8500-core.c
@@ -363,7 +363,7 @@ static void ab8500_irq_remove(struct ab8500 *ab8500)
363 } 363 }
364} 364}
365 365
366static struct resource ab8500_gpio_resources[] = { 366static struct resource __devinitdata ab8500_gpio_resources[] = {
367 { 367 {
368 .name = "GPIO_INT6", 368 .name = "GPIO_INT6",
369 .start = AB8500_INT_GPIO6R, 369 .start = AB8500_INT_GPIO6R,
@@ -372,7 +372,7 @@ static struct resource ab8500_gpio_resources[] = {
372 } 372 }
373}; 373};
374 374
375static struct resource ab8500_gpadc_resources[] = { 375static struct resource __devinitdata ab8500_gpadc_resources[] = {
376 { 376 {
377 .name = "HW_CONV_END", 377 .name = "HW_CONV_END",
378 .start = AB8500_INT_GP_HW_ADC_CONV_END, 378 .start = AB8500_INT_GP_HW_ADC_CONV_END,
@@ -387,7 +387,7 @@ static struct resource ab8500_gpadc_resources[] = {
387 }, 387 },
388}; 388};
389 389
390static struct resource ab8500_rtc_resources[] = { 390static struct resource __devinitdata ab8500_rtc_resources[] = {
391 { 391 {
392 .name = "60S", 392 .name = "60S",
393 .start = AB8500_INT_RTC_60S, 393 .start = AB8500_INT_RTC_60S,
@@ -402,7 +402,7 @@ static struct resource ab8500_rtc_resources[] = {
402 }, 402 },
403}; 403};
404 404
405static struct resource ab8500_poweronkey_db_resources[] = { 405static struct resource __devinitdata ab8500_poweronkey_db_resources[] = {
406 { 406 {
407 .name = "ONKEY_DBF", 407 .name = "ONKEY_DBF",
408 .start = AB8500_INT_PON_KEY1DB_F, 408 .start = AB8500_INT_PON_KEY1DB_F,
@@ -417,20 +417,47 @@ static struct resource ab8500_poweronkey_db_resources[] = {
417 }, 417 },
418}; 418};
419 419
420static struct resource ab8500_bm_resources[] = { 420static struct resource __devinitdata ab8500_av_acc_detect_resources[] = {
421 { 421 {
422 .name = "MAIN_EXT_CH_NOT_OK", 422 .name = "ACC_DETECT_1DB_F",
423 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 423 .start = AB8500_INT_ACC_DETECT_1DB_F,
424 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 424 .end = AB8500_INT_ACC_DETECT_1DB_F,
425 .flags = IORESOURCE_IRQ, 425 .flags = IORESOURCE_IRQ,
426 }, 426 },
427 { 427 {
428 .name = "BATT_OVV", 428 .name = "ACC_DETECT_1DB_R",
429 .start = AB8500_INT_BATT_OVV, 429 .start = AB8500_INT_ACC_DETECT_1DB_R,
430 .end = AB8500_INT_BATT_OVV, 430 .end = AB8500_INT_ACC_DETECT_1DB_R,
431 .flags = IORESOURCE_IRQ, 431 .flags = IORESOURCE_IRQ,
432 },
433 {
434 .name = "ACC_DETECT_21DB_F",
435 .start = AB8500_INT_ACC_DETECT_21DB_F,
436 .end = AB8500_INT_ACC_DETECT_21DB_F,
437 .flags = IORESOURCE_IRQ,
438 },
439 {
440 .name = "ACC_DETECT_21DB_R",
441 .start = AB8500_INT_ACC_DETECT_21DB_R,
442 .end = AB8500_INT_ACC_DETECT_21DB_R,
443 .flags = IORESOURCE_IRQ,
444 },
445 {
446 .name = "ACC_DETECT_22DB_F",
447 .start = AB8500_INT_ACC_DETECT_22DB_F,
448 .end = AB8500_INT_ACC_DETECT_22DB_F,
449 .flags = IORESOURCE_IRQ,
432 }, 450 },
433 { 451 {
452 .name = "ACC_DETECT_22DB_R",
453 .start = AB8500_INT_ACC_DETECT_22DB_R,
454 .end = AB8500_INT_ACC_DETECT_22DB_R,
455 .flags = IORESOURCE_IRQ,
456 },
457};
458
459static struct resource __devinitdata ab8500_charger_resources[] = {
460 {
434 .name = "MAIN_CH_UNPLUG_DET", 461 .name = "MAIN_CH_UNPLUG_DET",
435 .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 462 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
436 .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 463 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
@@ -443,27 +470,27 @@ static struct resource ab8500_bm_resources[] = {
443 .flags = IORESOURCE_IRQ, 470 .flags = IORESOURCE_IRQ,
444 }, 471 },
445 { 472 {
446 .name = "VBUS_DET_F",
447 .start = AB8500_INT_VBUS_DET_F,
448 .end = AB8500_INT_VBUS_DET_F,
449 .flags = IORESOURCE_IRQ,
450 },
451 {
452 .name = "VBUS_DET_R", 473 .name = "VBUS_DET_R",
453 .start = AB8500_INT_VBUS_DET_R, 474 .start = AB8500_INT_VBUS_DET_R,
454 .end = AB8500_INT_VBUS_DET_R, 475 .end = AB8500_INT_VBUS_DET_R,
455 .flags = IORESOURCE_IRQ, 476 .flags = IORESOURCE_IRQ,
456 }, 477 },
457 { 478 {
458 .name = "BAT_CTRL_INDB", 479 .name = "VBUS_DET_F",
459 .start = AB8500_INT_BAT_CTRL_INDB, 480 .start = AB8500_INT_VBUS_DET_F,
460 .end = AB8500_INT_BAT_CTRL_INDB, 481 .end = AB8500_INT_VBUS_DET_F,
461 .flags = IORESOURCE_IRQ, 482 .flags = IORESOURCE_IRQ,
462 }, 483 },
463 { 484 {
464 .name = "CH_WD_EXP", 485 .name = "USB_LINK_STATUS",
465 .start = AB8500_INT_CH_WD_EXP, 486 .start = AB8500_INT_USB_LINK_STATUS,
466 .end = AB8500_INT_CH_WD_EXP, 487 .end = AB8500_INT_USB_LINK_STATUS,
488 .flags = IORESOURCE_IRQ,
489 },
490 {
491 .name = "USB_CHARGE_DET_DONE",
492 .start = AB8500_INT_USB_CHG_DET_DONE,
493 .end = AB8500_INT_USB_CHG_DET_DONE,
467 .flags = IORESOURCE_IRQ, 494 .flags = IORESOURCE_IRQ,
468 }, 495 },
469 { 496 {
@@ -473,21 +500,60 @@ static struct resource ab8500_bm_resources[] = {
473 .flags = IORESOURCE_IRQ, 500 .flags = IORESOURCE_IRQ,
474 }, 501 },
475 { 502 {
476 .name = "NCONV_ACCU", 503 .name = "USB_CH_TH_PROT_R",
477 .start = AB8500_INT_CCN_CONV_ACC, 504 .start = AB8500_INT_USB_CH_TH_PROT_R,
478 .end = AB8500_INT_CCN_CONV_ACC, 505 .end = AB8500_INT_USB_CH_TH_PROT_R,
479 .flags = IORESOURCE_IRQ, 506 .flags = IORESOURCE_IRQ,
480 }, 507 },
481 { 508 {
482 .name = "LOW_BAT_F", 509 .name = "USB_CH_TH_PROT_F",
483 .start = AB8500_INT_LOW_BAT_F, 510 .start = AB8500_INT_USB_CH_TH_PROT_F,
484 .end = AB8500_INT_LOW_BAT_F, 511 .end = AB8500_INT_USB_CH_TH_PROT_F,
485 .flags = IORESOURCE_IRQ, 512 .flags = IORESOURCE_IRQ,
486 }, 513 },
487 { 514 {
488 .name = "LOW_BAT_R", 515 .name = "MAIN_EXT_CH_NOT_OK",
489 .start = AB8500_INT_LOW_BAT_R, 516 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
490 .end = AB8500_INT_LOW_BAT_R, 517 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
518 .flags = IORESOURCE_IRQ,
519 },
520 {
521 .name = "MAIN_CH_TH_PROT_R",
522 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
523 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
524 .flags = IORESOURCE_IRQ,
525 },
526 {
527 .name = "MAIN_CH_TH_PROT_F",
528 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
529 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
530 .flags = IORESOURCE_IRQ,
531 },
532 {
533 .name = "USB_CHARGER_NOT_OKR",
534 .start = AB8500_INT_USB_CHARGER_NOT_OK,
535 .end = AB8500_INT_USB_CHARGER_NOT_OK,
536 .flags = IORESOURCE_IRQ,
537 },
538 {
539 .name = "USB_CHARGER_NOT_OKF",
540 .start = AB8500_INT_USB_CHARGER_NOT_OKF,
541 .end = AB8500_INT_USB_CHARGER_NOT_OKF,
542 .flags = IORESOURCE_IRQ,
543 },
544 {
545 .name = "CH_WD_EXP",
546 .start = AB8500_INT_CH_WD_EXP,
547 .end = AB8500_INT_CH_WD_EXP,
548 .flags = IORESOURCE_IRQ,
549 },
550};
551
552static struct resource __devinitdata ab8500_btemp_resources[] = {
553 {
554 .name = "BAT_CTRL_INDB",
555 .start = AB8500_INT_BAT_CTRL_INDB,
556 .end = AB8500_INT_BAT_CTRL_INDB,
491 .flags = IORESOURCE_IRQ, 557 .flags = IORESOURCE_IRQ,
492 }, 558 },
493 { 559 {
@@ -503,38 +569,55 @@ static struct resource ab8500_bm_resources[] = {
503 .flags = IORESOURCE_IRQ, 569 .flags = IORESOURCE_IRQ,
504 }, 570 },
505 { 571 {
506 .name = "USB_CHARGER_NOT_OKR", 572 .name = "BTEMP_LOW_MEDIUM",
507 .start = AB8500_INT_USB_CHARGER_NOT_OK, 573 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
508 .end = AB8500_INT_USB_CHARGER_NOT_OK, 574 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
509 .flags = IORESOURCE_IRQ, 575 .flags = IORESOURCE_IRQ,
510 }, 576 },
511 { 577 {
512 .name = "USB_CHARGE_DET_DONE", 578 .name = "BTEMP_MEDIUM_HIGH",
513 .start = AB8500_INT_USB_CHG_DET_DONE, 579 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
514 .end = AB8500_INT_USB_CHG_DET_DONE, 580 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
515 .flags = IORESOURCE_IRQ, 581 .flags = IORESOURCE_IRQ,
516 }, 582 },
583};
584
585static struct resource __devinitdata ab8500_fg_resources[] = {
517 { 586 {
518 .name = "USB_CH_TH_PROT_R", 587 .name = "NCONV_ACCU",
519 .start = AB8500_INT_USB_CH_TH_PROT_R, 588 .start = AB8500_INT_CCN_CONV_ACC,
520 .end = AB8500_INT_USB_CH_TH_PROT_R, 589 .end = AB8500_INT_CCN_CONV_ACC,
521 .flags = IORESOURCE_IRQ, 590 .flags = IORESOURCE_IRQ,
522 }, 591 },
523 { 592 {
524 .name = "MAIN_CH_TH_PROT_R", 593 .name = "BATT_OVV",
525 .start = AB8500_INT_MAIN_CH_TH_PROT_R, 594 .start = AB8500_INT_BATT_OVV,
526 .end = AB8500_INT_MAIN_CH_TH_PROT_R, 595 .end = AB8500_INT_BATT_OVV,
527 .flags = IORESOURCE_IRQ, 596 .flags = IORESOURCE_IRQ,
528 }, 597 },
529 { 598 {
530 .name = "USB_CHARGER_NOT_OKF", 599 .name = "LOW_BAT_F",
531 .start = AB8500_INT_USB_CHARGER_NOT_OKF, 600 .start = AB8500_INT_LOW_BAT_F,
532 .end = AB8500_INT_USB_CHARGER_NOT_OKF, 601 .end = AB8500_INT_LOW_BAT_F,
602 .flags = IORESOURCE_IRQ,
603 },
604 {
605 .name = "LOW_BAT_R",
606 .start = AB8500_INT_LOW_BAT_R,
607 .end = AB8500_INT_LOW_BAT_R,
608 .flags = IORESOURCE_IRQ,
609 },
610 {
611 .name = "CC_INT_CALIB",
612 .start = AB8500_INT_CC_INT_CALIB,
613 .end = AB8500_INT_CC_INT_CALIB,
533 .flags = IORESOURCE_IRQ, 614 .flags = IORESOURCE_IRQ,
534 }, 615 },
535}; 616};
536 617
537static struct resource ab8500_debug_resources[] = { 618static struct resource __devinitdata ab8500_chargalg_resources[] = {};
619
620static struct resource __devinitdata ab8500_debug_resources[] = {
538 { 621 {
539 .name = "IRQ_FIRST", 622 .name = "IRQ_FIRST",
540 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 623 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
@@ -549,7 +632,7 @@ static struct resource ab8500_debug_resources[] = {
549 }, 632 },
550}; 633};
551 634
552static struct resource ab8500_usb_resources[] = { 635static struct resource __devinitdata ab8500_usb_resources[] = {
553 { 636 {
554 .name = "ID_WAKEUP_R", 637 .name = "ID_WAKEUP_R",
555 .start = AB8500_INT_ID_WAKEUP_R, 638 .start = AB8500_INT_ID_WAKEUP_R,
@@ -580,9 +663,21 @@ static struct resource ab8500_usb_resources[] = {
580 .end = AB8500_INT_USB_LINK_STATUS, 663 .end = AB8500_INT_USB_LINK_STATUS,
581 .flags = IORESOURCE_IRQ, 664 .flags = IORESOURCE_IRQ,
582 }, 665 },
666 {
667 .name = "USB_ADP_PROBE_PLUG",
668 .start = AB8500_INT_ADP_PROBE_PLUG,
669 .end = AB8500_INT_ADP_PROBE_PLUG,
670 .flags = IORESOURCE_IRQ,
671 },
672 {
673 .name = "USB_ADP_PROBE_UNPLUG",
674 .start = AB8500_INT_ADP_PROBE_UNPLUG,
675 .end = AB8500_INT_ADP_PROBE_UNPLUG,
676 .flags = IORESOURCE_IRQ,
677 },
583}; 678};
584 679
585static struct resource ab8500_temp_resources[] = { 680static struct resource __devinitdata ab8500_temp_resources[] = {
586 { 681 {
587 .name = "AB8500_TEMP_WARM", 682 .name = "AB8500_TEMP_WARM",
588 .start = AB8500_INT_TEMP_WARM, 683 .start = AB8500_INT_TEMP_WARM,
@@ -591,7 +686,7 @@ static struct resource ab8500_temp_resources[] = {
591 }, 686 },
592}; 687};
593 688
594static struct mfd_cell ab8500_devs[] = { 689static struct mfd_cell __devinitdata ab8500_devs[] = {
595#ifdef CONFIG_DEBUG_FS 690#ifdef CONFIG_DEBUG_FS
596 { 691 {
597 .name = "ab8500-debug", 692 .name = "ab8500-debug",
@@ -621,11 +716,33 @@ static struct mfd_cell ab8500_devs[] = {
621 .resources = ab8500_rtc_resources, 716 .resources = ab8500_rtc_resources,
622 }, 717 },
623 { 718 {
624 .name = "ab8500-bm", 719 .name = "ab8500-charger",
625 .num_resources = ARRAY_SIZE(ab8500_bm_resources), 720 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
626 .resources = ab8500_bm_resources, 721 .resources = ab8500_charger_resources,
722 },
723 {
724 .name = "ab8500-btemp",
725 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
726 .resources = ab8500_btemp_resources,
727 },
728 {
729 .name = "ab8500-fg",
730 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
731 .resources = ab8500_fg_resources,
732 },
733 {
734 .name = "ab8500-chargalg",
735 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
736 .resources = ab8500_chargalg_resources,
737 },
738 {
739 .name = "ab8500-acc-det",
740 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
741 .resources = ab8500_av_acc_detect_resources,
742 },
743 {
744 .name = "ab8500-codec",
627 }, 745 },
628 { .name = "ab8500-codec", },
629 { 746 {
630 .name = "ab8500-usb", 747 .name = "ab8500-usb",
631 .num_resources = ARRAY_SIZE(ab8500_usb_resources), 748 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
diff --git a/drivers/mfd/ab8500-debugfs.c b/drivers/mfd/ab8500-debugfs.c
index 64748e42ac03..64bdeeb1c11a 100644
--- a/drivers/mfd/ab8500-debugfs.c
+++ b/drivers/mfd/ab8500-debugfs.c
@@ -419,20 +419,13 @@ static ssize_t ab8500_bank_write(struct file *file,
419 size_t count, loff_t *ppos) 419 size_t count, loff_t *ppos)
420{ 420{
421 struct device *dev = ((struct seq_file *)(file->private_data))->private; 421 struct device *dev = ((struct seq_file *)(file->private_data))->private;
422 char buf[32];
423 int buf_size;
424 unsigned long user_bank; 422 unsigned long user_bank;
425 int err; 423 int err;
426 424
427 /* Get userspace string and assure termination */ 425 /* Get userspace string and assure termination */
428 buf_size = min(count, (sizeof(buf) - 1)); 426 err = kstrtoul_from_user(user_buf, count, 0, &user_bank);
429 if (copy_from_user(buf, user_buf, buf_size))
430 return -EFAULT;
431 buf[buf_size] = 0;
432
433 err = strict_strtoul(buf, 0, &user_bank);
434 if (err) 427 if (err)
435 return -EINVAL; 428 return err;
436 429
437 if (user_bank >= AB8500_NUM_BANKS) { 430 if (user_bank >= AB8500_NUM_BANKS) {
438 dev_err(dev, "debugfs error input > number of banks\n"); 431 dev_err(dev, "debugfs error input > number of banks\n");
@@ -441,7 +434,7 @@ static ssize_t ab8500_bank_write(struct file *file,
441 434
442 debug_bank = user_bank; 435 debug_bank = user_bank;
443 436
444 return buf_size; 437 return count;
445} 438}
446 439
447static int ab8500_address_print(struct seq_file *s, void *p) 440static int ab8500_address_print(struct seq_file *s, void *p)
@@ -459,26 +452,20 @@ static ssize_t ab8500_address_write(struct file *file,
459 size_t count, loff_t *ppos) 452 size_t count, loff_t *ppos)
460{ 453{
461 struct device *dev = ((struct seq_file *)(file->private_data))->private; 454 struct device *dev = ((struct seq_file *)(file->private_data))->private;
462 char buf[32];
463 int buf_size;
464 unsigned long user_address; 455 unsigned long user_address;
465 int err; 456 int err;
466 457
467 /* Get userspace string and assure termination */ 458 /* Get userspace string and assure termination */
468 buf_size = min(count, (sizeof(buf) - 1)); 459 err = kstrtoul_from_user(user_buf, count, 0, &user_address);
469 if (copy_from_user(buf, user_buf, buf_size))
470 return -EFAULT;
471 buf[buf_size] = 0;
472
473 err = strict_strtoul(buf, 0, &user_address);
474 if (err) 460 if (err)
475 return -EINVAL; 461 return err;
462
476 if (user_address > 0xff) { 463 if (user_address > 0xff) {
477 dev_err(dev, "debugfs error input > 0xff\n"); 464 dev_err(dev, "debugfs error input > 0xff\n");
478 return -EINVAL; 465 return -EINVAL;
479 } 466 }
480 debug_address = user_address; 467 debug_address = user_address;
481 return buf_size; 468 return count;
482} 469}
483 470
484static int ab8500_val_print(struct seq_file *s, void *p) 471static int ab8500_val_print(struct seq_file *s, void *p)
@@ -509,20 +496,14 @@ static ssize_t ab8500_val_write(struct file *file,
509 size_t count, loff_t *ppos) 496 size_t count, loff_t *ppos)
510{ 497{
511 struct device *dev = ((struct seq_file *)(file->private_data))->private; 498 struct device *dev = ((struct seq_file *)(file->private_data))->private;
512 char buf[32];
513 int buf_size;
514 unsigned long user_val; 499 unsigned long user_val;
515 int err; 500 int err;
516 501
517 /* Get userspace string and assure termination */ 502 /* Get userspace string and assure termination */
518 buf_size = min(count, (sizeof(buf)-1)); 503 err = kstrtoul_from_user(user_buf, count, 0, &user_val);
519 if (copy_from_user(buf, user_buf, buf_size))
520 return -EFAULT;
521 buf[buf_size] = 0;
522
523 err = strict_strtoul(buf, 0, &user_val);
524 if (err) 504 if (err)
525 return -EINVAL; 505 return err;
506
526 if (user_val > 0xff) { 507 if (user_val > 0xff) {
527 dev_err(dev, "debugfs error input > 0xff\n"); 508 dev_err(dev, "debugfs error input > 0xff\n");
528 return -EINVAL; 509 return -EINVAL;
@@ -534,7 +515,7 @@ static ssize_t ab8500_val_write(struct file *file,
534 return -EINVAL; 515 return -EINVAL;
535 } 516 }
536 517
537 return buf_size; 518 return count;
538} 519}
539 520
540static const struct file_operations ab8500_bank_fops = { 521static const struct file_operations ab8500_bank_fops = {
diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c
index a0bd0cf05af3..21131c7b0f1e 100644
--- a/drivers/mfd/jz4740-adc.c
+++ b/drivers/mfd/jz4740-adc.c
@@ -56,7 +56,7 @@ struct jz4740_adc {
56 void __iomem *base; 56 void __iomem *base;
57 57
58 int irq; 58 int irq;
59 int irq_base; 59 struct irq_chip_generic *gc;
60 60
61 struct clk *clk; 61 struct clk *clk;
62 atomic_t clk_ref; 62 atomic_t clk_ref;
@@ -64,63 +64,17 @@ struct jz4740_adc {
64 spinlock_t lock; 64 spinlock_t lock;
65}; 65};
66 66
67static inline void jz4740_adc_irq_set_masked(struct jz4740_adc *adc, int irq,
68 bool masked)
69{
70 unsigned long flags;
71 uint8_t val;
72
73 irq -= adc->irq_base;
74
75 spin_lock_irqsave(&adc->lock, flags);
76
77 val = readb(adc->base + JZ_REG_ADC_CTRL);
78 if (masked)
79 val |= BIT(irq);
80 else
81 val &= ~BIT(irq);
82 writeb(val, adc->base + JZ_REG_ADC_CTRL);
83
84 spin_unlock_irqrestore(&adc->lock, flags);
85}
86
87static void jz4740_adc_irq_mask(struct irq_data *data)
88{
89 struct jz4740_adc *adc = irq_data_get_irq_chip_data(data);
90 jz4740_adc_irq_set_masked(adc, data->irq, true);
91}
92
93static void jz4740_adc_irq_unmask(struct irq_data *data)
94{
95 struct jz4740_adc *adc = irq_data_get_irq_chip_data(data);
96 jz4740_adc_irq_set_masked(adc, data->irq, false);
97}
98
99static void jz4740_adc_irq_ack(struct irq_data *data)
100{
101 struct jz4740_adc *adc = irq_data_get_irq_chip_data(data);
102 unsigned int irq = data->irq - adc->irq_base;
103 writeb(BIT(irq), adc->base + JZ_REG_ADC_STATUS);
104}
105
106static struct irq_chip jz4740_adc_irq_chip = {
107 .name = "jz4740-adc",
108 .irq_mask = jz4740_adc_irq_mask,
109 .irq_unmask = jz4740_adc_irq_unmask,
110 .irq_ack = jz4740_adc_irq_ack,
111};
112
113static void jz4740_adc_irq_demux(unsigned int irq, struct irq_desc *desc) 67static void jz4740_adc_irq_demux(unsigned int irq, struct irq_desc *desc)
114{ 68{
115 struct jz4740_adc *adc = irq_desc_get_handler_data(desc); 69 struct irq_chip_generic *gc = irq_desc_get_handler_data(desc);
116 uint8_t status; 70 uint8_t status;
117 unsigned int i; 71 unsigned int i;
118 72
119 status = readb(adc->base + JZ_REG_ADC_STATUS); 73 status = readb(gc->reg_base + JZ_REG_ADC_STATUS);
120 74
121 for (i = 0; i < 5; ++i) { 75 for (i = 0; i < 5; ++i) {
122 if (status & BIT(i)) 76 if (status & BIT(i))
123 generic_handle_irq(adc->irq_base + i); 77 generic_handle_irq(gc->irq_base + i);
124 } 78 }
125} 79}
126 80
@@ -249,10 +203,12 @@ const struct mfd_cell jz4740_adc_cells[] = {
249 203
250static int __devinit jz4740_adc_probe(struct platform_device *pdev) 204static int __devinit jz4740_adc_probe(struct platform_device *pdev)
251{ 205{
252 int ret; 206 struct irq_chip_generic *gc;
207 struct irq_chip_type *ct;
253 struct jz4740_adc *adc; 208 struct jz4740_adc *adc;
254 struct resource *mem_base; 209 struct resource *mem_base;
255 int irq; 210 int ret;
211 int irq_base;
256 212
257 adc = kmalloc(sizeof(*adc), GFP_KERNEL); 213 adc = kmalloc(sizeof(*adc), GFP_KERNEL);
258 if (!adc) { 214 if (!adc) {
@@ -267,9 +223,9 @@ static int __devinit jz4740_adc_probe(struct platform_device *pdev)
267 goto err_free; 223 goto err_free;
268 } 224 }
269 225
270 adc->irq_base = platform_get_irq(pdev, 1); 226 irq_base = platform_get_irq(pdev, 1);
271 if (adc->irq_base < 0) { 227 if (irq_base < 0) {
272 ret = adc->irq_base; 228 ret = irq_base;
273 dev_err(&pdev->dev, "Failed to get irq base: %d\n", ret); 229 dev_err(&pdev->dev, "Failed to get irq base: %d\n", ret);
274 goto err_free; 230 goto err_free;
275 } 231 }
@@ -309,20 +265,28 @@ static int __devinit jz4740_adc_probe(struct platform_device *pdev)
309 265
310 platform_set_drvdata(pdev, adc); 266 platform_set_drvdata(pdev, adc);
311 267
312 for (irq = adc->irq_base; irq < adc->irq_base + 5; ++irq) { 268 gc = irq_alloc_generic_chip("INTC", 1, irq_base, adc->base,
313 irq_set_chip_data(irq, adc); 269 handle_level_irq);
314 irq_set_chip_and_handler(irq, &jz4740_adc_irq_chip, 270
315 handle_level_irq); 271 ct = gc->chip_types;
316 } 272 ct->regs.mask = JZ_REG_ADC_CTRL;
273 ct->regs.ack = JZ_REG_ADC_STATUS;
274 ct->chip.irq_mask = irq_gc_mask_set_bit;
275 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
276 ct->chip.irq_ack = irq_gc_ack;
277
278 irq_setup_generic_chip(gc, IRQ_MSK(5), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);
279
280 adc->gc = gc;
317 281
318 irq_set_handler_data(adc->irq, adc); 282 irq_set_handler_data(adc->irq, gc);
319 irq_set_chained_handler(adc->irq, jz4740_adc_irq_demux); 283 irq_set_chained_handler(adc->irq, jz4740_adc_irq_demux);
320 284
321 writeb(0x00, adc->base + JZ_REG_ADC_ENABLE); 285 writeb(0x00, adc->base + JZ_REG_ADC_ENABLE);
322 writeb(0xff, adc->base + JZ_REG_ADC_CTRL); 286 writeb(0xff, adc->base + JZ_REG_ADC_CTRL);
323 287
324 ret = mfd_add_devices(&pdev->dev, 0, jz4740_adc_cells, 288 ret = mfd_add_devices(&pdev->dev, 0, jz4740_adc_cells,
325 ARRAY_SIZE(jz4740_adc_cells), mem_base, adc->irq_base); 289 ARRAY_SIZE(jz4740_adc_cells), mem_base, irq_base);
326 if (ret < 0) 290 if (ret < 0)
327 goto err_clk_put; 291 goto err_clk_put;
328 292
@@ -347,6 +311,8 @@ static int __devexit jz4740_adc_remove(struct platform_device *pdev)
347 311
348 mfd_remove_devices(&pdev->dev); 312 mfd_remove_devices(&pdev->dev);
349 313
314 irq_remove_generic_chip(adc->gc, IRQ_MSK(5), IRQ_NOPROBE | IRQ_LEVEL, 0);
315 kfree(adc->gc);
350 irq_set_handler_data(adc->irq, NULL); 316 irq_set_handler_data(adc->irq, NULL);
351 irq_set_chained_handler(adc->irq, NULL); 317 irq_set_chained_handler(adc->irq, NULL);
352 318
diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c
index ea3f52c07ef7..ea1169b04779 100644
--- a/drivers/mfd/lpc_sch.c
+++ b/drivers/mfd/lpc_sch.c
@@ -37,6 +37,9 @@
37#define GPIOBASE 0x44 37#define GPIOBASE 0x44
38#define GPIO_IO_SIZE 64 38#define GPIO_IO_SIZE 64
39 39
40#define WDTBASE 0x84
41#define WDT_IO_SIZE 64
42
40static struct resource smbus_sch_resource = { 43static struct resource smbus_sch_resource = {
41 .flags = IORESOURCE_IO, 44 .flags = IORESOURCE_IO,
42}; 45};
@@ -59,6 +62,18 @@ static struct mfd_cell lpc_sch_cells[] = {
59 }, 62 },
60}; 63};
61 64
65static struct resource wdt_sch_resource = {
66 .flags = IORESOURCE_IO,
67};
68
69static struct mfd_cell tunnelcreek_cells[] = {
70 {
71 .name = "tunnelcreek_wdt",
72 .num_resources = 1,
73 .resources = &wdt_sch_resource,
74 },
75};
76
62static struct pci_device_id lpc_sch_ids[] = { 77static struct pci_device_id lpc_sch_ids[] = {
63 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) }, 78 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
64 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) }, 79 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },
@@ -72,6 +87,7 @@ static int __devinit lpc_sch_probe(struct pci_dev *dev,
72 unsigned int base_addr_cfg; 87 unsigned int base_addr_cfg;
73 unsigned short base_addr; 88 unsigned short base_addr;
74 int i; 89 int i;
90 int ret;
75 91
76 pci_read_config_dword(dev, SMBASE, &base_addr_cfg); 92 pci_read_config_dword(dev, SMBASE, &base_addr_cfg);
77 if (!(base_addr_cfg & (1 << 31))) { 93 if (!(base_addr_cfg & (1 << 31))) {
@@ -104,8 +120,39 @@ static int __devinit lpc_sch_probe(struct pci_dev *dev,
104 for (i=0; i < ARRAY_SIZE(lpc_sch_cells); i++) 120 for (i=0; i < ARRAY_SIZE(lpc_sch_cells); i++)
105 lpc_sch_cells[i].id = id->device; 121 lpc_sch_cells[i].id = id->device;
106 122
107 return mfd_add_devices(&dev->dev, 0, 123 ret = mfd_add_devices(&dev->dev, 0,
108 lpc_sch_cells, ARRAY_SIZE(lpc_sch_cells), NULL, 0); 124 lpc_sch_cells, ARRAY_SIZE(lpc_sch_cells), NULL, 0);
125 if (ret)
126 goto out_dev;
127
128 if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC) {
129 pci_read_config_dword(dev, WDTBASE, &base_addr_cfg);
130 if (!(base_addr_cfg & (1 << 31))) {
131 dev_err(&dev->dev, "Decode of the WDT I/O range disabled\n");
132 ret = -ENODEV;
133 goto out_dev;
134 }
135 base_addr = (unsigned short)base_addr_cfg;
136 if (base_addr == 0) {
137 dev_err(&dev->dev, "I/O space for WDT uninitialized\n");
138 ret = -ENODEV;
139 goto out_dev;
140 }
141
142 wdt_sch_resource.start = base_addr;
143 wdt_sch_resource.end = base_addr + WDT_IO_SIZE - 1;
144
145 for (i = 0; i < ARRAY_SIZE(tunnelcreek_cells); i++)
146 tunnelcreek_cells[i].id = id->device;
147
148 ret = mfd_add_devices(&dev->dev, 0, tunnelcreek_cells,
149 ARRAY_SIZE(tunnelcreek_cells), NULL, 0);
150 }
151
152 return ret;
153out_dev:
154 mfd_remove_devices(&dev->dev);
155 return ret;
109} 156}
110 157
111static void __devexit lpc_sch_remove(struct pci_dev *dev) 158static void __devexit lpc_sch_remove(struct pci_dev *dev)
diff --git a/drivers/mfd/max8997-irq.c b/drivers/mfd/max8997-irq.c
index 638bf7e4d3b3..09274cf7c33b 100644
--- a/drivers/mfd/max8997-irq.c
+++ b/drivers/mfd/max8997-irq.c
@@ -58,8 +58,6 @@ static struct i2c_client *get_i2c(struct max8997_dev *max8997,
58 default: 58 default:
59 return ERR_PTR(-EINVAL); 59 return ERR_PTR(-EINVAL);
60 } 60 }
61
62 return ERR_PTR(-EINVAL);
63} 61}
64 62
65struct max8997_irq_data { 63struct max8997_irq_data {
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 1717144fe7f4..29601e7d606d 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -998,9 +998,9 @@ static void usbhs_disable(struct device *dev)
998 998
999 if (is_omap_usbhs_rev2(omap)) { 999 if (is_omap_usbhs_rev2(omap)) {
1000 if (is_ehci_tll_mode(pdata->port_mode[0])) 1000 if (is_ehci_tll_mode(pdata->port_mode[0]))
1001 clk_enable(omap->usbtll_p1_fck); 1001 clk_disable(omap->usbtll_p1_fck);
1002 if (is_ehci_tll_mode(pdata->port_mode[1])) 1002 if (is_ehci_tll_mode(pdata->port_mode[1]))
1003 clk_enable(omap->usbtll_p2_fck); 1003 clk_disable(omap->usbtll_p2_fck);
1004 clk_disable(omap->utmi_p2_fck); 1004 clk_disable(omap->utmi_p2_fck);
1005 clk_disable(omap->utmi_p1_fck); 1005 clk_disable(omap->utmi_p1_fck);
1006 } 1006 }
diff --git a/drivers/mfd/stmpe.c b/drivers/mfd/stmpe.c
index 7ab7746631d4..2963689cf45c 100644
--- a/drivers/mfd/stmpe.c
+++ b/drivers/mfd/stmpe.c
@@ -228,7 +228,7 @@ int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
228EXPORT_SYMBOL_GPL(stmpe_block_write); 228EXPORT_SYMBOL_GPL(stmpe_block_write);
229 229
230/** 230/**
231 * stmpe_set_altfunc: set the alternate function for STMPE pins 231 * stmpe_set_altfunc()- set the alternate function for STMPE pins
232 * @stmpe: Device to configure 232 * @stmpe: Device to configure
233 * @pins: Bitmask of pins to affect 233 * @pins: Bitmask of pins to affect
234 * @block: block to enable alternate functions for 234 * @block: block to enable alternate functions for
diff --git a/drivers/mfd/stmpe.h b/drivers/mfd/stmpe.h
index 0dbdc4e8cd77..e4ee38956583 100644
--- a/drivers/mfd/stmpe.h
+++ b/drivers/mfd/stmpe.h
@@ -42,6 +42,7 @@ struct stmpe_variant_block {
42 * @id_mask: bits valid in CHIPID register for comparison with id_val 42 * @id_mask: bits valid in CHIPID register for comparison with id_val
43 * @num_gpios: number of GPIOS 43 * @num_gpios: number of GPIOS
44 * @af_bits: number of bits used to specify the alternate function 44 * @af_bits: number of bits used to specify the alternate function
45 * @regs: variant specific registers.
45 * @blocks: list of blocks present on this device 46 * @blocks: list of blocks present on this device
46 * @num_blocks: number of blocks present on this device 47 * @num_blocks: number of blocks present on this device
47 * @num_irqs: number of internal IRQs available on this device 48 * @num_irqs: number of internal IRQs available on this device
diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c
index 2229e66d80db..6f5b8cf2f652 100644
--- a/drivers/mfd/tps65910.c
+++ b/drivers/mfd/tps65910.c
@@ -147,12 +147,11 @@ static int tps65910_i2c_probe(struct i2c_client *i2c,
147 if (init_data == NULL) 147 if (init_data == NULL)
148 return -ENOMEM; 148 return -ENOMEM;
149 149
150 init_data->irq = pmic_plat_data->irq;
151 init_data->irq_base = pmic_plat_data->irq;
152
153 tps65910 = kzalloc(sizeof(struct tps65910), GFP_KERNEL); 150 tps65910 = kzalloc(sizeof(struct tps65910), GFP_KERNEL);
154 if (tps65910 == NULL) 151 if (tps65910 == NULL) {
152 kfree(init_data);
155 return -ENOMEM; 153 return -ENOMEM;
154 }
156 155
157 i2c_set_clientdata(i2c, tps65910); 156 i2c_set_clientdata(i2c, tps65910);
158 tps65910->dev = &i2c->dev; 157 tps65910->dev = &i2c->dev;
@@ -168,17 +167,22 @@ static int tps65910_i2c_probe(struct i2c_client *i2c,
168 if (ret < 0) 167 if (ret < 0)
169 goto err; 168 goto err;
170 169
170 init_data->irq = pmic_plat_data->irq;
171 init_data->irq_base = pmic_plat_data->irq;
172
171 tps65910_gpio_init(tps65910, pmic_plat_data->gpio_base); 173 tps65910_gpio_init(tps65910, pmic_plat_data->gpio_base);
172 174
173 ret = tps65910_irq_init(tps65910, init_data->irq, init_data); 175 ret = tps65910_irq_init(tps65910, init_data->irq, init_data);
174 if (ret < 0) 176 if (ret < 0)
175 goto err; 177 goto err;
176 178
179 kfree(init_data);
177 return ret; 180 return ret;
178 181
179err: 182err:
180 mfd_remove_devices(tps65910->dev); 183 mfd_remove_devices(tps65910->dev);
181 kfree(tps65910); 184 kfree(tps65910);
185 kfree(init_data);
182 return ret; 186 return ret;
183} 187}
184 188
@@ -187,6 +191,7 @@ static int tps65910_i2c_remove(struct i2c_client *i2c)
187 struct tps65910 *tps65910 = i2c_get_clientdata(i2c); 191 struct tps65910 *tps65910 = i2c_get_clientdata(i2c);
188 192
189 mfd_remove_devices(tps65910->dev); 193 mfd_remove_devices(tps65910->dev);
194 tps65910_irq_exit(tps65910);
190 kfree(tps65910); 195 kfree(tps65910);
191 196
192 return 0; 197 return 0;
diff --git a/drivers/mfd/tps65911-comparator.c b/drivers/mfd/tps65911-comparator.c
index 283ac6759757..e7ff783aa31e 100644
--- a/drivers/mfd/tps65911-comparator.c
+++ b/drivers/mfd/tps65911-comparator.c
@@ -157,6 +157,8 @@ static __devexit int tps65911_comparator_remove(struct platform_device *pdev)
157 struct tps65910 *tps65910; 157 struct tps65910 *tps65910;
158 158
159 tps65910 = dev_get_drvdata(pdev->dev.parent); 159 tps65910 = dev_get_drvdata(pdev->dev.parent);
160 device_remove_file(&pdev->dev, &dev_attr_comp2_threshold);
161 device_remove_file(&pdev->dev, &dev_attr_comp1_threshold);
160 162
161 return 0; 163 return 0;
162} 164}
diff --git a/drivers/mfd/tps65912-core.c b/drivers/mfd/tps65912-core.c
new file mode 100644
index 000000000000..955bc00e4b20
--- /dev/null
+++ b/drivers/mfd/tps65912-core.c
@@ -0,0 +1,177 @@
1/*
2 * tps65912-core.c -- TI TPS65912x
3 *
4 * Copyright 2011 Texas Instruments Inc.
5 *
6 * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This driver is based on wm8350 implementation.
14 */
15
16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/init.h>
19#include <linux/slab.h>
20#include <linux/gpio.h>
21#include <linux/mfd/core.h>
22#include <linux/mfd/tps65912.h>
23
24static struct mfd_cell tps65912s[] = {
25 {
26 .name = "tps65912-pmic",
27 },
28};
29
30int tps65912_set_bits(struct tps65912 *tps65912, u8 reg, u8 mask)
31{
32 u8 data;
33 int err;
34
35 mutex_lock(&tps65912->io_mutex);
36
37 err = tps65912->read(tps65912, reg, 1, &data);
38 if (err) {
39 dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg);
40 goto out;
41 }
42
43 data |= mask;
44 err = tps65912->write(tps65912, reg, 1, &data);
45 if (err)
46 dev_err(tps65912->dev, "Write to reg 0x%x failed\n", reg);
47
48out:
49 mutex_unlock(&tps65912->io_mutex);
50 return err;
51}
52EXPORT_SYMBOL_GPL(tps65912_set_bits);
53
54int tps65912_clear_bits(struct tps65912 *tps65912, u8 reg, u8 mask)
55{
56 u8 data;
57 int err;
58
59 mutex_lock(&tps65912->io_mutex);
60 err = tps65912->read(tps65912, reg, 1, &data);
61 if (err) {
62 dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg);
63 goto out;
64 }
65
66 data &= ~mask;
67 err = tps65912->write(tps65912, reg, 1, &data);
68 if (err)
69 dev_err(tps65912->dev, "Write to reg 0x%x failed\n", reg);
70
71out:
72 mutex_unlock(&tps65912->io_mutex);
73 return err;
74}
75EXPORT_SYMBOL_GPL(tps65912_clear_bits);
76
77static inline int tps65912_read(struct tps65912 *tps65912, u8 reg)
78{
79 u8 val;
80 int err;
81
82 err = tps65912->read(tps65912, reg, 1, &val);
83 if (err < 0)
84 return err;
85
86 return val;
87}
88
89static inline int tps65912_write(struct tps65912 *tps65912, u8 reg, u8 val)
90{
91 return tps65912->write(tps65912, reg, 1, &val);
92}
93
94int tps65912_reg_read(struct tps65912 *tps65912, u8 reg)
95{
96 int data;
97
98 mutex_lock(&tps65912->io_mutex);
99
100 data = tps65912_read(tps65912, reg);
101 if (data < 0)
102 dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg);
103
104 mutex_unlock(&tps65912->io_mutex);
105 return data;
106}
107EXPORT_SYMBOL_GPL(tps65912_reg_read);
108
109int tps65912_reg_write(struct tps65912 *tps65912, u8 reg, u8 val)
110{
111 int err;
112
113 mutex_lock(&tps65912->io_mutex);
114
115 err = tps65912_write(tps65912, reg, val);
116 if (err < 0)
117 dev_err(tps65912->dev, "Write for reg 0x%x failed\n", reg);
118
119 mutex_unlock(&tps65912->io_mutex);
120 return err;
121}
122EXPORT_SYMBOL_GPL(tps65912_reg_write);
123
124int tps65912_device_init(struct tps65912 *tps65912)
125{
126 struct tps65912_board *pmic_plat_data = tps65912->dev->platform_data;
127 struct tps65912_platform_data *init_data;
128 int ret, dcdc_avs, value;
129
130 init_data = kzalloc(sizeof(struct tps65912_platform_data), GFP_KERNEL);
131 if (init_data == NULL)
132 return -ENOMEM;
133
134 init_data->irq = pmic_plat_data->irq;
135 init_data->irq_base = pmic_plat_data->irq;
136
137 mutex_init(&tps65912->io_mutex);
138 dev_set_drvdata(tps65912->dev, tps65912);
139
140 dcdc_avs = (pmic_plat_data->is_dcdc1_avs << 0 |
141 pmic_plat_data->is_dcdc2_avs << 1 |
142 pmic_plat_data->is_dcdc3_avs << 2 |
143 pmic_plat_data->is_dcdc4_avs << 3);
144 if (dcdc_avs) {
145 tps65912->read(tps65912, TPS65912_I2C_SPI_CFG, 1, &value);
146 dcdc_avs |= value;
147 tps65912->write(tps65912, TPS65912_I2C_SPI_CFG, 1, &dcdc_avs);
148 }
149
150 ret = mfd_add_devices(tps65912->dev, -1,
151 tps65912s, ARRAY_SIZE(tps65912s),
152 NULL, 0);
153 if (ret < 0)
154 goto err;
155
156 ret = tps65912_irq_init(tps65912, init_data->irq, init_data);
157 if (ret < 0)
158 goto err;
159
160 return ret;
161
162err:
163 kfree(init_data);
164 mfd_remove_devices(tps65912->dev);
165 kfree(tps65912);
166 return ret;
167}
168
169void tps65912_device_exit(struct tps65912 *tps65912)
170{
171 mfd_remove_devices(tps65912->dev);
172 kfree(tps65912);
173}
174
175MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>");
176MODULE_DESCRIPTION("TPS65912x chip family multi-function driver");
177MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/tps65912-i2c.c b/drivers/mfd/tps65912-i2c.c
new file mode 100644
index 000000000000..c041f2c3d2bd
--- /dev/null
+++ b/drivers/mfd/tps65912-i2c.c
@@ -0,0 +1,139 @@
1/*
2 * tps65912-i2c.c -- I2C access for TI TPS65912x PMIC
3 *
4 * Copyright 2011 Texas Instruments Inc.
5 *
6 * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This driver is based on wm8350 implementation.
14 */
15
16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/init.h>
19#include <linux/slab.h>
20#include <linux/gpio.h>
21#include <linux/i2c.h>
22#include <linux/mfd/core.h>
23#include <linux/mfd/tps65912.h>
24
25static int tps65912_i2c_read(struct tps65912 *tps65912, u8 reg,
26 int bytes, void *dest)
27{
28 struct i2c_client *i2c = tps65912->control_data;
29 struct i2c_msg xfer[2];
30 int ret;
31
32 /* Write register */
33 xfer[0].addr = i2c->addr;
34 xfer[0].flags = 0;
35 xfer[0].len = 1;
36 xfer[0].buf = &reg;
37
38 /* Read data */
39 xfer[1].addr = i2c->addr;
40 xfer[1].flags = I2C_M_RD;
41 xfer[1].len = bytes;
42 xfer[1].buf = dest;
43
44 ret = i2c_transfer(i2c->adapter, xfer, 2);
45 if (ret == 2)
46 ret = 0;
47 else if (ret >= 0)
48 ret = -EIO;
49 return ret;
50}
51
52static int tps65912_i2c_write(struct tps65912 *tps65912, u8 reg,
53 int bytes, void *src)
54{
55 struct i2c_client *i2c = tps65912->control_data;
56 /* we add 1 byte for device register */
57 u8 msg[TPS6591X_MAX_REGISTER + 1];
58 int ret;
59
60 if (bytes > TPS6591X_MAX_REGISTER)
61 return -EINVAL;
62
63 msg[0] = reg;
64 memcpy(&msg[1], src, bytes);
65
66 ret = i2c_master_send(i2c, msg, bytes + 1);
67 if (ret < 0)
68 return ret;
69 if (ret != bytes + 1)
70 return -EIO;
71
72 return 0;
73}
74
75static int tps65912_i2c_probe(struct i2c_client *i2c,
76 const struct i2c_device_id *id)
77{
78 struct tps65912 *tps65912;
79
80 tps65912 = kzalloc(sizeof(struct tps65912), GFP_KERNEL);
81 if (tps65912 == NULL)
82 return -ENOMEM;
83
84 i2c_set_clientdata(i2c, tps65912);
85 tps65912->dev = &i2c->dev;
86 tps65912->control_data = i2c;
87 tps65912->read = tps65912_i2c_read;
88 tps65912->write = tps65912_i2c_write;
89
90 return tps65912_device_init(tps65912);
91}
92
93static int tps65912_i2c_remove(struct i2c_client *i2c)
94{
95 struct tps65912 *tps65912 = i2c_get_clientdata(i2c);
96
97 tps65912_device_exit(tps65912);
98
99 return 0;
100}
101
102static const struct i2c_device_id tps65912_i2c_id[] = {
103 {"tps65912", 0 },
104 { }
105};
106MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id);
107
108static struct i2c_driver tps65912_i2c_driver = {
109 .driver = {
110 .name = "tps65912",
111 .owner = THIS_MODULE,
112 },
113 .probe = tps65912_i2c_probe,
114 .remove = tps65912_i2c_remove,
115 .id_table = tps65912_i2c_id,
116};
117
118static int __init tps65912_i2c_init(void)
119{
120 int ret;
121
122 ret = i2c_add_driver(&tps65912_i2c_driver);
123 if (ret != 0)
124 pr_err("Failed to register TPS65912 I2C driver: %d\n", ret);
125
126 return ret;
127}
128/* init early so consumer devices can complete system boot */
129subsys_initcall(tps65912_i2c_init);
130
131static void __exit tps65912_i2c_exit(void)
132{
133 i2c_del_driver(&tps65912_i2c_driver);
134}
135module_exit(tps65912_i2c_exit);
136
137MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>");
138MODULE_DESCRIPTION("TPS6591x chip family multi-function driver");
139MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/tps65912-irq.c b/drivers/mfd/tps65912-irq.c
new file mode 100644
index 000000000000..d360a83a2738
--- /dev/null
+++ b/drivers/mfd/tps65912-irq.c
@@ -0,0 +1,224 @@
1/*
2 * tps65912-irq.c -- TI TPS6591x
3 *
4 * Copyright 2011 Texas Instruments Inc.
5 *
6 * Author: Margarita Olaya <magi@slimlogic.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This driver is based on wm8350 implementation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/bug.h>
20#include <linux/device.h>
21#include <linux/interrupt.h>
22#include <linux/irq.h>
23#include <linux/gpio.h>
24#include <linux/mfd/tps65912.h>
25
26static inline int irq_to_tps65912_irq(struct tps65912 *tps65912,
27 int irq)
28{
29 return irq - tps65912->irq_base;
30}
31
32/*
33 * This is a threaded IRQ handler so can access I2C/SPI. Since the
34 * IRQ handler explicitly clears the IRQ it handles the IRQ line
35 * will be reasserted and the physical IRQ will be handled again if
36 * another interrupt is asserted while we run - in the normal course
37 * of events this is a rare occurrence so we save I2C/SPI reads. We're
38 * also assuming that it's rare to get lots of interrupts firing
39 * simultaneously so try to minimise I/O.
40 */
41static irqreturn_t tps65912_irq(int irq, void *irq_data)
42{
43 struct tps65912 *tps65912 = irq_data;
44 u32 irq_sts;
45 u32 irq_mask;
46 u8 reg;
47 int i;
48
49
50 tps65912->read(tps65912, TPS65912_INT_STS, 1, &reg);
51 irq_sts = reg;
52 tps65912->read(tps65912, TPS65912_INT_STS2, 1, &reg);
53 irq_sts |= reg << 8;
54 tps65912->read(tps65912, TPS65912_INT_STS3, 1, &reg);
55 irq_sts |= reg << 16;
56 tps65912->read(tps65912, TPS65912_INT_STS4, 1, &reg);
57 irq_sts |= reg << 24;
58
59 tps65912->read(tps65912, TPS65912_INT_MSK, 1, &reg);
60 irq_mask = reg;
61 tps65912->read(tps65912, TPS65912_INT_MSK2, 1, &reg);
62 irq_mask |= reg << 8;
63 tps65912->read(tps65912, TPS65912_INT_MSK3, 1, &reg);
64 irq_mask |= reg << 16;
65 tps65912->read(tps65912, TPS65912_INT_MSK4, 1, &reg);
66 irq_mask |= reg << 24;
67
68 irq_sts &= ~irq_mask;
69 if (!irq_sts)
70 return IRQ_NONE;
71
72 for (i = 0; i < tps65912->irq_num; i++) {
73 if (!(irq_sts & (1 << i)))
74 continue;
75
76 handle_nested_irq(tps65912->irq_base + i);
77 }
78
79 /* Write the STS register back to clear IRQs we handled */
80 reg = irq_sts & 0xFF;
81 irq_sts >>= 8;
82 if (reg)
83 tps65912->write(tps65912, TPS65912_INT_STS, 1, &reg);
84 reg = irq_sts & 0xFF;
85 irq_sts >>= 8;
86 if (reg)
87 tps65912->write(tps65912, TPS65912_INT_STS2, 1, &reg);
88 reg = irq_sts & 0xFF;
89 irq_sts >>= 8;
90 if (reg)
91 tps65912->write(tps65912, TPS65912_INT_STS3, 1, &reg);
92 reg = irq_sts & 0xFF;
93 if (reg)
94 tps65912->write(tps65912, TPS65912_INT_STS4, 1, &reg);
95
96 return IRQ_HANDLED;
97}
98
99static void tps65912_irq_lock(struct irq_data *data)
100{
101 struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
102
103 mutex_lock(&tps65912->irq_lock);
104}
105
106static void tps65912_irq_sync_unlock(struct irq_data *data)
107{
108 struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
109 u32 reg_mask;
110 u8 reg;
111
112 tps65912->read(tps65912, TPS65912_INT_MSK, 1, &reg);
113 reg_mask = reg;
114 tps65912->read(tps65912, TPS65912_INT_MSK2, 1, &reg);
115 reg_mask |= reg << 8;
116 tps65912->read(tps65912, TPS65912_INT_MSK3, 1, &reg);
117 reg_mask |= reg << 16;
118 tps65912->read(tps65912, TPS65912_INT_MSK4, 1, &reg);
119 reg_mask |= reg << 24;
120
121 if (tps65912->irq_mask != reg_mask) {
122 reg = tps65912->irq_mask & 0xFF;
123 tps65912->write(tps65912, TPS65912_INT_MSK, 1, &reg);
124 reg = tps65912->irq_mask >> 8 & 0xFF;
125 tps65912->write(tps65912, TPS65912_INT_MSK2, 1, &reg);
126 reg = tps65912->irq_mask >> 16 & 0xFF;
127 tps65912->write(tps65912, TPS65912_INT_MSK3, 1, &reg);
128 reg = tps65912->irq_mask >> 24 & 0xFF;
129 tps65912->write(tps65912, TPS65912_INT_MSK4, 1, &reg);
130 }
131
132 mutex_unlock(&tps65912->irq_lock);
133}
134
135static void tps65912_irq_enable(struct irq_data *data)
136{
137 struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
138
139 tps65912->irq_mask &= ~(1 << irq_to_tps65912_irq(tps65912, data->irq));
140}
141
142static void tps65912_irq_disable(struct irq_data *data)
143{
144 struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
145
146 tps65912->irq_mask |= (1 << irq_to_tps65912_irq(tps65912, data->irq));
147}
148
149static struct irq_chip tps65912_irq_chip = {
150 .name = "tps65912",
151 .irq_bus_lock = tps65912_irq_lock,
152 .irq_bus_sync_unlock = tps65912_irq_sync_unlock,
153 .irq_disable = tps65912_irq_disable,
154 .irq_enable = tps65912_irq_enable,
155};
156
157int tps65912_irq_init(struct tps65912 *tps65912, int irq,
158 struct tps65912_platform_data *pdata)
159{
160 int ret, cur_irq;
161 int flags = IRQF_ONESHOT;
162 u8 reg;
163
164 if (!irq) {
165 dev_warn(tps65912->dev, "No interrupt support, no core IRQ\n");
166 return 0;
167 }
168
169 if (!pdata || !pdata->irq_base) {
170 dev_warn(tps65912->dev, "No interrupt support, no IRQ base\n");
171 return 0;
172 }
173
174 /* Clear unattended interrupts */
175 tps65912->read(tps65912, TPS65912_INT_STS, 1, &reg);
176 tps65912->write(tps65912, TPS65912_INT_STS, 1, &reg);
177 tps65912->read(tps65912, TPS65912_INT_STS2, 1, &reg);
178 tps65912->write(tps65912, TPS65912_INT_STS2, 1, &reg);
179 tps65912->read(tps65912, TPS65912_INT_STS3, 1, &reg);
180 tps65912->write(tps65912, TPS65912_INT_STS3, 1, &reg);
181 tps65912->read(tps65912, TPS65912_INT_STS4, 1, &reg);
182 tps65912->write(tps65912, TPS65912_INT_STS4, 1, &reg);
183
184 /* Mask top level interrupts */
185 tps65912->irq_mask = 0xFFFFFFFF;
186
187 mutex_init(&tps65912->irq_lock);
188 tps65912->chip_irq = irq;
189 tps65912->irq_base = pdata->irq_base;
190
191 tps65912->irq_num = TPS65912_NUM_IRQ;
192
193 /* Register with genirq */
194 for (cur_irq = tps65912->irq_base;
195 cur_irq < tps65912->irq_num + tps65912->irq_base;
196 cur_irq++) {
197 irq_set_chip_data(cur_irq, tps65912);
198 irq_set_chip_and_handler(cur_irq, &tps65912_irq_chip,
199 handle_edge_irq);
200 irq_set_nested_thread(cur_irq, 1);
201 /* ARM needs us to explicitly flag the IRQ as valid
202 * and will set them noprobe when we do so. */
203#ifdef CONFIG_ARM
204 set_irq_flags(cur_irq, IRQF_VALID);
205#else
206 irq_set_noprobe(cur_irq);
207#endif
208 }
209
210 ret = request_threaded_irq(irq, NULL, tps65912_irq, flags,
211 "tps65912", tps65912);
212
213 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
214 if (ret != 0)
215 dev_err(tps65912->dev, "Failed to request IRQ: %d\n", ret);
216
217 return ret;
218}
219
220int tps65912_irq_exit(struct tps65912 *tps65912)
221{
222 free_irq(tps65912->chip_irq, tps65912);
223 return 0;
224}
diff --git a/drivers/mfd/tps65912-spi.c b/drivers/mfd/tps65912-spi.c
new file mode 100644
index 000000000000..6d71e0d25744
--- /dev/null
+++ b/drivers/mfd/tps65912-spi.c
@@ -0,0 +1,142 @@
1/*
2 * tps65912-spi.c -- SPI access for TI TPS65912x PMIC
3 *
4 * Copyright 2011 Texas Instruments Inc.
5 *
6 * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This driver is based on wm8350 implementation.
14 */
15
16#include <linux/module.h>
17#include <linux/moduleparam.h>
18#include <linux/init.h>
19#include <linux/slab.h>
20#include <linux/gpio.h>
21#include <linux/spi/spi.h>
22#include <linux/mfd/core.h>
23#include <linux/mfd/tps65912.h>
24
25static int tps65912_spi_write(struct tps65912 *tps65912, u8 addr,
26 int bytes, void *src)
27{
28 struct spi_device *spi = tps65912->control_data;
29 u8 *data = (u8 *) src;
30 int ret;
31 /* bit 23 is the read/write bit */
32 unsigned long spi_data = 1 << 23 | addr << 15 | *data;
33 struct spi_transfer xfer;
34 struct spi_message msg;
35 u32 tx_buf, rx_buf;
36
37 tx_buf = spi_data;
38 rx_buf = 0;
39
40 xfer.tx_buf = &tx_buf;
41 xfer.rx_buf = NULL;
42 xfer.len = sizeof(unsigned long);
43 xfer.bits_per_word = 24;
44
45 spi_message_init(&msg);
46 spi_message_add_tail(&xfer, &msg);
47
48 ret = spi_sync(spi, &msg);
49 return ret;
50}
51
52static int tps65912_spi_read(struct tps65912 *tps65912, u8 addr,
53 int bytes, void *dest)
54{
55 struct spi_device *spi = tps65912->control_data;
56 /* bit 23 is the read/write bit */
57 unsigned long spi_data = 0 << 23 | addr << 15;
58 struct spi_transfer xfer;
59 struct spi_message msg;
60 int ret;
61 u8 *data = (u8 *) dest;
62 u32 tx_buf, rx_buf;
63
64 tx_buf = spi_data;
65 rx_buf = 0;
66
67 xfer.tx_buf = &tx_buf;
68 xfer.rx_buf = &rx_buf;
69 xfer.len = sizeof(unsigned long);
70 xfer.bits_per_word = 24;
71
72 spi_message_init(&msg);
73 spi_message_add_tail(&xfer, &msg);
74
75 if (spi == NULL)
76 return 0;
77
78 ret = spi_sync(spi, &msg);
79 if (ret == 0)
80 *data = (u8) (rx_buf & 0xFF);
81 return ret;
82}
83
84static int __devinit tps65912_spi_probe(struct spi_device *spi)
85{
86 struct tps65912 *tps65912;
87
88 tps65912 = kzalloc(sizeof(struct tps65912), GFP_KERNEL);
89 if (tps65912 == NULL)
90 return -ENOMEM;
91
92 tps65912->dev = &spi->dev;
93 tps65912->control_data = spi;
94 tps65912->read = tps65912_spi_read;
95 tps65912->write = tps65912_spi_write;
96
97 spi_set_drvdata(spi, tps65912);
98
99 return tps65912_device_init(tps65912);
100}
101
102static int __devexit tps65912_spi_remove(struct spi_device *spi)
103{
104 struct tps65912 *tps65912 = spi_get_drvdata(spi);
105
106 tps65912_device_exit(tps65912);
107
108 return 0;
109}
110
111static struct spi_driver tps65912_spi_driver = {
112 .driver = {
113 .name = "tps65912",
114 .bus = &spi_bus_type,
115 .owner = THIS_MODULE,
116 },
117 .probe = tps65912_spi_probe,
118 .remove = __devexit_p(tps65912_spi_remove),
119};
120
121static int __init tps65912_spi_init(void)
122{
123 int ret;
124
125 ret = spi_register_driver(&tps65912_spi_driver);
126 if (ret != 0)
127 pr_err("Failed to register TPS65912 SPI driver: %d\n", ret);
128
129 return 0;
130}
131/* init early so consumer devices can complete system boot */
132subsys_initcall(tps65912_spi_init);
133
134static void __exit tps65912_spi_exit(void)
135{
136 spi_unregister_driver(&tps65912_spi_driver);
137}
138module_exit(tps65912_spi_exit);
139
140MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>");
141MODULE_DESCRIPTION("SPI support for TPS65912 chip family mfd");
142MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index a2eddc70995c..01ecfeee6524 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -1283,6 +1283,8 @@ static const struct i2c_device_id twl_ids[] = {
1283 { "tps65950", 0 }, /* catalog version of twl5030 */ 1283 { "tps65950", 0 }, /* catalog version of twl5030 */
1284 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */ 1284 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
1285 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */ 1285 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
1286 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
1287 and vibrator. Charger in USB module*/
1286 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */ 1288 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
1287 { "twl6025", TWL6030_CLASS | TWL6025_SUBCLASS }, /* "Phoenix lite" */ 1289 { "twl6025", TWL6030_CLASS | TWL6025_SUBCLASS }, /* "Phoenix lite" */
1288 { /* end of list */ }, 1290 { /* end of list */ },
diff --git a/drivers/mfd/twl4030-madc.c b/drivers/mfd/twl4030-madc.c
index 3941ddcf15fe..b5d598c3aa71 100644
--- a/drivers/mfd/twl4030-madc.c
+++ b/drivers/mfd/twl4030-madc.c
@@ -530,13 +530,13 @@ int twl4030_madc_conversion(struct twl4030_madc_request *req)
530 if (ret) { 530 if (ret) {
531 dev_err(twl4030_madc->dev, 531 dev_err(twl4030_madc->dev,
532 "unable to write sel register 0x%X\n", method->sel + 1); 532 "unable to write sel register 0x%X\n", method->sel + 1);
533 return ret; 533 goto out;
534 } 534 }
535 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, ch_lsb, method->sel); 535 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, ch_lsb, method->sel);
536 if (ret) { 536 if (ret) {
537 dev_err(twl4030_madc->dev, 537 dev_err(twl4030_madc->dev,
538 "unable to write sel register 0x%X\n", method->sel + 1); 538 "unable to write sel register 0x%X\n", method->sel + 1);
539 return ret; 539 goto out;
540 } 540 }
541 /* Select averaging for all channels if do_avg is set */ 541 /* Select averaging for all channels if do_avg is set */
542 if (req->do_avg) { 542 if (req->do_avg) {
@@ -546,7 +546,7 @@ int twl4030_madc_conversion(struct twl4030_madc_request *req)
546 dev_err(twl4030_madc->dev, 546 dev_err(twl4030_madc->dev,
547 "unable to write avg register 0x%X\n", 547 "unable to write avg register 0x%X\n",
548 method->avg + 1); 548 method->avg + 1);
549 return ret; 549 goto out;
550 } 550 }
551 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, 551 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC,
552 ch_lsb, method->avg); 552 ch_lsb, method->avg);
@@ -554,7 +554,7 @@ int twl4030_madc_conversion(struct twl4030_madc_request *req)
554 dev_err(twl4030_madc->dev, 554 dev_err(twl4030_madc->dev,
555 "unable to write sel reg 0x%X\n", 555 "unable to write sel reg 0x%X\n",
556 method->sel + 1); 556 method->sel + 1);
557 return ret; 557 goto out;
558 } 558 }
559 } 559 }
560 if (req->type == TWL4030_MADC_IRQ_ONESHOT && req->func_cb != NULL) { 560 if (req->type == TWL4030_MADC_IRQ_ONESHOT && req->func_cb != NULL) {
diff --git a/drivers/mfd/twl6030-pwm.c b/drivers/mfd/twl6030-pwm.c
index 5d25bdc78424..e8fee147678d 100644
--- a/drivers/mfd/twl6030-pwm.c
+++ b/drivers/mfd/twl6030-pwm.c
@@ -161,3 +161,5 @@ void pwm_free(struct pwm_device *pwm)
161 kfree(pwm); 161 kfree(pwm);
162} 162}
163EXPORT_SYMBOL(pwm_free); 163EXPORT_SYMBOL(pwm_free);
164
165MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/wm831x-auxadc.c b/drivers/mfd/wm831x-auxadc.c
new file mode 100644
index 000000000000..87210954a066
--- /dev/null
+++ b/drivers/mfd/wm831x-auxadc.c
@@ -0,0 +1,299 @@
1/*
2 * wm831x-auxadc.c -- AUXADC for Wolfson WM831x PMICs
3 *
4 * Copyright 2009-2011 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/delay.h>
18#include <linux/mfd/core.h>
19#include <linux/slab.h>
20#include <linux/list.h>
21
22#include <linux/mfd/wm831x/core.h>
23#include <linux/mfd/wm831x/pdata.h>
24#include <linux/mfd/wm831x/irq.h>
25#include <linux/mfd/wm831x/auxadc.h>
26#include <linux/mfd/wm831x/otp.h>
27#include <linux/mfd/wm831x/regulator.h>
28
29struct wm831x_auxadc_req {
30 struct list_head list;
31 enum wm831x_auxadc input;
32 int val;
33 struct completion done;
34};
35
36static int wm831x_auxadc_read_irq(struct wm831x *wm831x,
37 enum wm831x_auxadc input)
38{
39 struct wm831x_auxadc_req *req;
40 int ret;
41 bool ena = false;
42
43 req = kzalloc(sizeof(*req), GFP_KERNEL);
44 if (!req)
45 return -ENOMEM;
46
47 init_completion(&req->done);
48 req->input = input;
49 req->val = -ETIMEDOUT;
50
51 mutex_lock(&wm831x->auxadc_lock);
52
53 /* Enqueue the request */
54 list_add(&req->list, &wm831x->auxadc_pending);
55
56 ena = !wm831x->auxadc_active;
57
58 if (ena) {
59 ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
60 WM831X_AUX_ENA, WM831X_AUX_ENA);
61 if (ret != 0) {
62 dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n",
63 ret);
64 goto out;
65 }
66 }
67
68 /* Enable the conversion if not already running */
69 if (!(wm831x->auxadc_active & (1 << input))) {
70 ret = wm831x_set_bits(wm831x, WM831X_AUXADC_SOURCE,
71 1 << input, 1 << input);
72 if (ret != 0) {
73 dev_err(wm831x->dev,
74 "Failed to set AUXADC source: %d\n", ret);
75 goto out;
76 }
77
78 wm831x->auxadc_active |= 1 << input;
79 }
80
81 /* We convert at the fastest rate possible */
82 if (ena) {
83 ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
84 WM831X_AUX_CVT_ENA |
85 WM831X_AUX_RATE_MASK,
86 WM831X_AUX_CVT_ENA |
87 WM831X_AUX_RATE_MASK);
88 if (ret != 0) {
89 dev_err(wm831x->dev, "Failed to start AUXADC: %d\n",
90 ret);
91 goto out;
92 }
93 }
94
95 mutex_unlock(&wm831x->auxadc_lock);
96
97 /* Wait for an interrupt */
98 wait_for_completion_timeout(&req->done, msecs_to_jiffies(500));
99
100 mutex_lock(&wm831x->auxadc_lock);
101
102 list_del(&req->list);
103 ret = req->val;
104
105out:
106 mutex_unlock(&wm831x->auxadc_lock);
107
108 kfree(req);
109
110 return ret;
111}
112
113static irqreturn_t wm831x_auxadc_irq(int irq, void *irq_data)
114{
115 struct wm831x *wm831x = irq_data;
116 struct wm831x_auxadc_req *req;
117 int ret, input, val;
118
119 ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
120 if (ret < 0) {
121 dev_err(wm831x->dev,
122 "Failed to read AUXADC data: %d\n", ret);
123 return IRQ_NONE;
124 }
125
126 input = ((ret & WM831X_AUX_DATA_SRC_MASK)
127 >> WM831X_AUX_DATA_SRC_SHIFT) - 1;
128
129 if (input == 14)
130 input = WM831X_AUX_CAL;
131
132 val = ret & WM831X_AUX_DATA_MASK;
133
134 mutex_lock(&wm831x->auxadc_lock);
135
136 /* Disable this conversion, we're about to complete all users */
137 wm831x_set_bits(wm831x, WM831X_AUXADC_SOURCE,
138 1 << input, 0);
139 wm831x->auxadc_active &= ~(1 << input);
140
141 /* Turn off the entire convertor if idle */
142 if (!wm831x->auxadc_active)
143 wm831x_reg_write(wm831x, WM831X_AUXADC_CONTROL, 0);
144
145 /* Wake up any threads waiting for this request */
146 list_for_each_entry(req, &wm831x->auxadc_pending, list) {
147 if (req->input == input) {
148 req->val = val;
149 complete(&req->done);
150 }
151 }
152
153 mutex_unlock(&wm831x->auxadc_lock);
154
155 return IRQ_HANDLED;
156}
157
158static int wm831x_auxadc_read_polled(struct wm831x *wm831x,
159 enum wm831x_auxadc input)
160{
161 int ret, src, timeout;
162
163 mutex_lock(&wm831x->auxadc_lock);
164
165 ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
166 WM831X_AUX_ENA, WM831X_AUX_ENA);
167 if (ret < 0) {
168 dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n", ret);
169 goto out;
170 }
171
172 /* We force a single source at present */
173 src = input;
174 ret = wm831x_reg_write(wm831x, WM831X_AUXADC_SOURCE,
175 1 << src);
176 if (ret < 0) {
177 dev_err(wm831x->dev, "Failed to set AUXADC source: %d\n", ret);
178 goto out;
179 }
180
181 ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
182 WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA);
183 if (ret < 0) {
184 dev_err(wm831x->dev, "Failed to start AUXADC: %d\n", ret);
185 goto disable;
186 }
187
188 /* If we're not using interrupts then poll the
189 * interrupt status register */
190 timeout = 5;
191 while (timeout) {
192 msleep(1);
193
194 ret = wm831x_reg_read(wm831x,
195 WM831X_INTERRUPT_STATUS_1);
196 if (ret < 0) {
197 dev_err(wm831x->dev,
198 "ISR 1 read failed: %d\n", ret);
199 goto disable;
200 }
201
202 /* Did it complete? */
203 if (ret & WM831X_AUXADC_DATA_EINT) {
204 wm831x_reg_write(wm831x,
205 WM831X_INTERRUPT_STATUS_1,
206 WM831X_AUXADC_DATA_EINT);
207 break;
208 } else {
209 dev_err(wm831x->dev,
210 "AUXADC conversion timeout\n");
211 ret = -EBUSY;
212 goto disable;
213 }
214 }
215
216 ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
217 if (ret < 0) {
218 dev_err(wm831x->dev,
219 "Failed to read AUXADC data: %d\n", ret);
220 goto disable;
221 }
222
223 src = ((ret & WM831X_AUX_DATA_SRC_MASK)
224 >> WM831X_AUX_DATA_SRC_SHIFT) - 1;
225
226 if (src == 14)
227 src = WM831X_AUX_CAL;
228
229 if (src != input) {
230 dev_err(wm831x->dev, "Data from source %d not %d\n",
231 src, input);
232 ret = -EINVAL;
233 } else {
234 ret &= WM831X_AUX_DATA_MASK;
235 }
236
237disable:
238 wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, WM831X_AUX_ENA, 0);
239out:
240 mutex_unlock(&wm831x->auxadc_lock);
241 return ret;
242}
243
244/**
245 * wm831x_auxadc_read: Read a value from the WM831x AUXADC
246 *
247 * @wm831x: Device to read from.
248 * @input: AUXADC input to read.
249 */
250int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
251{
252 return wm831x->auxadc_read(wm831x, input);
253}
254EXPORT_SYMBOL_GPL(wm831x_auxadc_read);
255
256/**
257 * wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC
258 *
259 * @wm831x: Device to read from.
260 * @input: AUXADC input to read.
261 */
262int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input)
263{
264 int ret;
265
266 ret = wm831x_auxadc_read(wm831x, input);
267 if (ret < 0)
268 return ret;
269
270 ret *= 1465;
271
272 return ret;
273}
274EXPORT_SYMBOL_GPL(wm831x_auxadc_read_uv);
275
276void wm831x_auxadc_init(struct wm831x *wm831x)
277{
278 int ret;
279
280 mutex_init(&wm831x->auxadc_lock);
281 INIT_LIST_HEAD(&wm831x->auxadc_pending);
282
283 if (wm831x->irq && wm831x->irq_base) {
284 wm831x->auxadc_read = wm831x_auxadc_read_irq;
285
286 ret = request_threaded_irq(wm831x->irq_base +
287 WM831X_IRQ_AUXADC_DATA,
288 NULL, wm831x_auxadc_irq, 0,
289 "auxadc", wm831x);
290 if (ret < 0) {
291 dev_err(wm831x->dev, "AUXADC IRQ request failed: %d\n",
292 ret);
293 wm831x->auxadc_read = NULL;
294 }
295 }
296
297 if (!wm831x->auxadc_read)
298 wm831x->auxadc_read = wm831x_auxadc_read_polled;
299}
diff --git a/drivers/mfd/wm831x-core.c b/drivers/mfd/wm831x-core.c
index 265f75fc6a25..282e76ab678f 100644
--- a/drivers/mfd/wm831x-core.c
+++ b/drivers/mfd/wm831x-core.c
@@ -295,7 +295,7 @@ int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
295 goto out; 295 goto out;
296 296
297 r &= ~mask; 297 r &= ~mask;
298 r |= val; 298 r |= val & mask;
299 299
300 ret = wm831x_write(wm831x, reg, 2, &r); 300 ret = wm831x_write(wm831x, reg, 2, &r);
301 301
@@ -306,146 +306,6 @@ out:
306} 306}
307EXPORT_SYMBOL_GPL(wm831x_set_bits); 307EXPORT_SYMBOL_GPL(wm831x_set_bits);
308 308
309/**
310 * wm831x_auxadc_read: Read a value from the WM831x AUXADC
311 *
312 * @wm831x: Device to read from.
313 * @input: AUXADC input to read.
314 */
315int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
316{
317 int ret, src, irq_masked, timeout;
318
319 /* Are we using the interrupt? */
320 irq_masked = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_1_MASK);
321 irq_masked &= WM831X_AUXADC_DATA_EINT;
322
323 mutex_lock(&wm831x->auxadc_lock);
324
325 ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
326 WM831X_AUX_ENA, WM831X_AUX_ENA);
327 if (ret < 0) {
328 dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n", ret);
329 goto out;
330 }
331
332 /* We force a single source at present */
333 src = input;
334 ret = wm831x_reg_write(wm831x, WM831X_AUXADC_SOURCE,
335 1 << src);
336 if (ret < 0) {
337 dev_err(wm831x->dev, "Failed to set AUXADC source: %d\n", ret);
338 goto out;
339 }
340
341 /* Clear any notification from a very late arriving interrupt */
342 try_wait_for_completion(&wm831x->auxadc_done);
343
344 ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
345 WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA);
346 if (ret < 0) {
347 dev_err(wm831x->dev, "Failed to start AUXADC: %d\n", ret);
348 goto disable;
349 }
350
351 if (irq_masked) {
352 /* If we're not using interrupts then poll the
353 * interrupt status register */
354 timeout = 5;
355 while (timeout) {
356 msleep(1);
357
358 ret = wm831x_reg_read(wm831x,
359 WM831X_INTERRUPT_STATUS_1);
360 if (ret < 0) {
361 dev_err(wm831x->dev,
362 "ISR 1 read failed: %d\n", ret);
363 goto disable;
364 }
365
366 /* Did it complete? */
367 if (ret & WM831X_AUXADC_DATA_EINT) {
368 wm831x_reg_write(wm831x,
369 WM831X_INTERRUPT_STATUS_1,
370 WM831X_AUXADC_DATA_EINT);
371 break;
372 } else {
373 dev_err(wm831x->dev,
374 "AUXADC conversion timeout\n");
375 ret = -EBUSY;
376 goto disable;
377 }
378 }
379 } else {
380 /* If we are using interrupts then wait for the
381 * interrupt to complete. Use an extremely long
382 * timeout to handle situations with heavy load where
383 * the notification of the interrupt may be delayed by
384 * threaded IRQ handling. */
385 if (!wait_for_completion_timeout(&wm831x->auxadc_done,
386 msecs_to_jiffies(500))) {
387 dev_err(wm831x->dev, "Timed out waiting for AUXADC\n");
388 ret = -EBUSY;
389 goto disable;
390 }
391 }
392
393 ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
394 if (ret < 0) {
395 dev_err(wm831x->dev, "Failed to read AUXADC data: %d\n", ret);
396 } else {
397 src = ((ret & WM831X_AUX_DATA_SRC_MASK)
398 >> WM831X_AUX_DATA_SRC_SHIFT) - 1;
399
400 if (src == 14)
401 src = WM831X_AUX_CAL;
402
403 if (src != input) {
404 dev_err(wm831x->dev, "Data from source %d not %d\n",
405 src, input);
406 ret = -EINVAL;
407 } else {
408 ret &= WM831X_AUX_DATA_MASK;
409 }
410 }
411
412disable:
413 wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, WM831X_AUX_ENA, 0);
414out:
415 mutex_unlock(&wm831x->auxadc_lock);
416 return ret;
417}
418EXPORT_SYMBOL_GPL(wm831x_auxadc_read);
419
420static irqreturn_t wm831x_auxadc_irq(int irq, void *irq_data)
421{
422 struct wm831x *wm831x = irq_data;
423
424 complete(&wm831x->auxadc_done);
425
426 return IRQ_HANDLED;
427}
428
429/**
430 * wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC
431 *
432 * @wm831x: Device to read from.
433 * @input: AUXADC input to read.
434 */
435int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input)
436{
437 int ret;
438
439 ret = wm831x_auxadc_read(wm831x, input);
440 if (ret < 0)
441 return ret;
442
443 ret *= 1465;
444
445 return ret;
446}
447EXPORT_SYMBOL_GPL(wm831x_auxadc_read_uv);
448
449static struct resource wm831x_dcdc1_resources[] = { 309static struct resource wm831x_dcdc1_resources[] = {
450 { 310 {
451 .start = WM831X_DC1_CONTROL_1, 311 .start = WM831X_DC1_CONTROL_1,
@@ -872,6 +732,9 @@ static struct mfd_cell wm8310_devs[] = {
872 .resources = wm831x_dcdc4_resources, 732 .resources = wm831x_dcdc4_resources,
873 }, 733 },
874 { 734 {
735 .name = "wm831x-clk",
736 },
737 {
875 .name = "wm831x-epe", 738 .name = "wm831x-epe",
876 .id = 1, 739 .id = 1,
877 }, 740 },
@@ -976,11 +839,6 @@ static struct mfd_cell wm8310_devs[] = {
976 .resources = wm831x_power_resources, 839 .resources = wm831x_power_resources,
977 }, 840 },
978 { 841 {
979 .name = "wm831x-rtc",
980 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
981 .resources = wm831x_rtc_resources,
982 },
983 {
984 .name = "wm831x-status", 842 .name = "wm831x-status",
985 .id = 1, 843 .id = 1,
986 .num_resources = ARRAY_SIZE(wm831x_status1_resources), 844 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
@@ -1028,6 +886,9 @@ static struct mfd_cell wm8311_devs[] = {
1028 .resources = wm831x_dcdc4_resources, 886 .resources = wm831x_dcdc4_resources,
1029 }, 887 },
1030 { 888 {
889 .name = "wm831x-clk",
890 },
891 {
1031 .name = "wm831x-epe", 892 .name = "wm831x-epe",
1032 .id = 1, 893 .id = 1,
1033 }, 894 },
@@ -1108,11 +969,6 @@ static struct mfd_cell wm8311_devs[] = {
1108 .resources = wm831x_power_resources, 969 .resources = wm831x_power_resources,
1109 }, 970 },
1110 { 971 {
1111 .name = "wm831x-rtc",
1112 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1113 .resources = wm831x_rtc_resources,
1114 },
1115 {
1116 .name = "wm831x-status", 972 .name = "wm831x-status",
1117 .id = 1, 973 .id = 1,
1118 .num_resources = ARRAY_SIZE(wm831x_status1_resources), 974 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
@@ -1125,11 +981,6 @@ static struct mfd_cell wm8311_devs[] = {
1125 .resources = wm831x_status2_resources, 981 .resources = wm831x_status2_resources,
1126 }, 982 },
1127 { 983 {
1128 .name = "wm831x-touch",
1129 .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1130 .resources = wm831x_touch_resources,
1131 },
1132 {
1133 .name = "wm831x-watchdog", 984 .name = "wm831x-watchdog",
1134 .num_resources = ARRAY_SIZE(wm831x_wdt_resources), 985 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1135 .resources = wm831x_wdt_resources, 986 .resources = wm831x_wdt_resources,
@@ -1165,6 +1016,9 @@ static struct mfd_cell wm8312_devs[] = {
1165 .resources = wm831x_dcdc4_resources, 1016 .resources = wm831x_dcdc4_resources,
1166 }, 1017 },
1167 { 1018 {
1019 .name = "wm831x-clk",
1020 },
1021 {
1168 .name = "wm831x-epe", 1022 .name = "wm831x-epe",
1169 .id = 1, 1023 .id = 1,
1170 }, 1024 },
@@ -1269,11 +1123,6 @@ static struct mfd_cell wm8312_devs[] = {
1269 .resources = wm831x_power_resources, 1123 .resources = wm831x_power_resources,
1270 }, 1124 },
1271 { 1125 {
1272 .name = "wm831x-rtc",
1273 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1274 .resources = wm831x_rtc_resources,
1275 },
1276 {
1277 .name = "wm831x-status", 1126 .name = "wm831x-status",
1278 .id = 1, 1127 .id = 1,
1279 .num_resources = ARRAY_SIZE(wm831x_status1_resources), 1128 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
@@ -1286,11 +1135,6 @@ static struct mfd_cell wm8312_devs[] = {
1286 .resources = wm831x_status2_resources, 1135 .resources = wm831x_status2_resources,
1287 }, 1136 },
1288 { 1137 {
1289 .name = "wm831x-touch",
1290 .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1291 .resources = wm831x_touch_resources,
1292 },
1293 {
1294 .name = "wm831x-watchdog", 1138 .name = "wm831x-watchdog",
1295 .num_resources = ARRAY_SIZE(wm831x_wdt_resources), 1139 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1296 .resources = wm831x_wdt_resources, 1140 .resources = wm831x_wdt_resources,
@@ -1326,6 +1170,9 @@ static struct mfd_cell wm8320_devs[] = {
1326 .resources = wm8320_dcdc4_buck_resources, 1170 .resources = wm8320_dcdc4_buck_resources,
1327 }, 1171 },
1328 { 1172 {
1173 .name = "wm831x-clk",
1174 },
1175 {
1329 .name = "wm831x-gpio", 1176 .name = "wm831x-gpio",
1330 .num_resources = ARRAY_SIZE(wm831x_gpio_resources), 1177 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1331 .resources = wm831x_gpio_resources, 1178 .resources = wm831x_gpio_resources,
@@ -1405,11 +1252,6 @@ static struct mfd_cell wm8320_devs[] = {
1405 .resources = wm831x_on_resources, 1252 .resources = wm831x_on_resources,
1406 }, 1253 },
1407 { 1254 {
1408 .name = "wm831x-rtc",
1409 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1410 .resources = wm831x_rtc_resources,
1411 },
1412 {
1413 .name = "wm831x-status", 1255 .name = "wm831x-status",
1414 .id = 1, 1256 .id = 1,
1415 .num_resources = ARRAY_SIZE(wm831x_status1_resources), 1257 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
@@ -1428,6 +1270,22 @@ static struct mfd_cell wm8320_devs[] = {
1428 }, 1270 },
1429}; 1271};
1430 1272
1273static struct mfd_cell touch_devs[] = {
1274 {
1275 .name = "wm831x-touch",
1276 .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1277 .resources = wm831x_touch_resources,
1278 },
1279};
1280
1281static struct mfd_cell rtc_devs[] = {
1282 {
1283 .name = "wm831x-rtc",
1284 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1285 .resources = wm831x_rtc_resources,
1286 },
1287};
1288
1431static struct mfd_cell backlight_devs[] = { 1289static struct mfd_cell backlight_devs[] = {
1432 { 1290 {
1433 .name = "wm831x-backlight", 1291 .name = "wm831x-backlight",
@@ -1440,14 +1298,12 @@ static struct mfd_cell backlight_devs[] = {
1440int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq) 1298int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
1441{ 1299{
1442 struct wm831x_pdata *pdata = wm831x->dev->platform_data; 1300 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
1443 int rev; 1301 int rev, wm831x_num;
1444 enum wm831x_parent parent; 1302 enum wm831x_parent parent;
1445 int ret, i; 1303 int ret, i;
1446 1304
1447 mutex_init(&wm831x->io_lock); 1305 mutex_init(&wm831x->io_lock);
1448 mutex_init(&wm831x->key_lock); 1306 mutex_init(&wm831x->key_lock);
1449 mutex_init(&wm831x->auxadc_lock);
1450 init_completion(&wm831x->auxadc_done);
1451 dev_set_drvdata(wm831x->dev, wm831x); 1307 dev_set_drvdata(wm831x->dev, wm831x);
1452 1308
1453 ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID); 1309 ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID);
@@ -1592,45 +1448,51 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
1592 } 1448 }
1593 } 1449 }
1594 1450
1451 /* Multiply by 10 as we have many subdevices of the same type */
1452 if (pdata && pdata->wm831x_num)
1453 wm831x_num = pdata->wm831x_num * 10;
1454 else
1455 wm831x_num = -1;
1456
1595 ret = wm831x_irq_init(wm831x, irq); 1457 ret = wm831x_irq_init(wm831x, irq);
1596 if (ret != 0) 1458 if (ret != 0)
1597 goto err; 1459 goto err;
1598 1460
1599 if (wm831x->irq_base) { 1461 wm831x_auxadc_init(wm831x);
1600 ret = request_threaded_irq(wm831x->irq_base +
1601 WM831X_IRQ_AUXADC_DATA,
1602 NULL, wm831x_auxadc_irq, 0,
1603 "auxadc", wm831x);
1604 if (ret < 0)
1605 dev_err(wm831x->dev, "AUXADC IRQ request failed: %d\n",
1606 ret);
1607 }
1608 1462
1609 /* The core device is up, instantiate the subdevices. */ 1463 /* The core device is up, instantiate the subdevices. */
1610 switch (parent) { 1464 switch (parent) {
1611 case WM8310: 1465 case WM8310:
1612 ret = mfd_add_devices(wm831x->dev, -1, 1466 ret = mfd_add_devices(wm831x->dev, wm831x_num,
1613 wm8310_devs, ARRAY_SIZE(wm8310_devs), 1467 wm8310_devs, ARRAY_SIZE(wm8310_devs),
1614 NULL, wm831x->irq_base); 1468 NULL, wm831x->irq_base);
1615 break; 1469 break;
1616 1470
1617 case WM8311: 1471 case WM8311:
1618 ret = mfd_add_devices(wm831x->dev, -1, 1472 ret = mfd_add_devices(wm831x->dev, wm831x_num,
1619 wm8311_devs, ARRAY_SIZE(wm8311_devs), 1473 wm8311_devs, ARRAY_SIZE(wm8311_devs),
1620 NULL, wm831x->irq_base); 1474 NULL, wm831x->irq_base);
1475 if (!pdata || !pdata->disable_touch)
1476 mfd_add_devices(wm831x->dev, wm831x_num,
1477 touch_devs, ARRAY_SIZE(touch_devs),
1478 NULL, wm831x->irq_base);
1621 break; 1479 break;
1622 1480
1623 case WM8312: 1481 case WM8312:
1624 ret = mfd_add_devices(wm831x->dev, -1, 1482 ret = mfd_add_devices(wm831x->dev, wm831x_num,
1625 wm8312_devs, ARRAY_SIZE(wm8312_devs), 1483 wm8312_devs, ARRAY_SIZE(wm8312_devs),
1626 NULL, wm831x->irq_base); 1484 NULL, wm831x->irq_base);
1485 if (!pdata || !pdata->disable_touch)
1486 mfd_add_devices(wm831x->dev, wm831x_num,
1487 touch_devs, ARRAY_SIZE(touch_devs),
1488 NULL, wm831x->irq_base);
1627 break; 1489 break;
1628 1490
1629 case WM8320: 1491 case WM8320:
1630 case WM8321: 1492 case WM8321:
1631 case WM8325: 1493 case WM8325:
1632 case WM8326: 1494 case WM8326:
1633 ret = mfd_add_devices(wm831x->dev, -1, 1495 ret = mfd_add_devices(wm831x->dev, wm831x_num,
1634 wm8320_devs, ARRAY_SIZE(wm8320_devs), 1496 wm8320_devs, ARRAY_SIZE(wm8320_devs),
1635 NULL, wm831x->irq_base); 1497 NULL, wm831x->irq_base);
1636 break; 1498 break;
@@ -1645,9 +1507,30 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
1645 goto err_irq; 1507 goto err_irq;
1646 } 1508 }
1647 1509
1510 /* The RTC can only be used if the 32.768kHz crystal is
1511 * enabled; this can't be controlled by software at runtime.
1512 */
1513 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
1514 if (ret < 0) {
1515 dev_err(wm831x->dev, "Failed to read clock status: %d\n", ret);
1516 goto err_irq;
1517 }
1518
1519 if (ret & WM831X_XTAL_ENA) {
1520 ret = mfd_add_devices(wm831x->dev, wm831x_num,
1521 rtc_devs, ARRAY_SIZE(rtc_devs),
1522 NULL, wm831x->irq_base);
1523 if (ret != 0) {
1524 dev_err(wm831x->dev, "Failed to add RTC: %d\n", ret);
1525 goto err_irq;
1526 }
1527 } else {
1528 dev_info(wm831x->dev, "32.768kHz clock disabled, no RTC\n");
1529 }
1530
1648 if (pdata && pdata->backlight) { 1531 if (pdata && pdata->backlight) {
1649 /* Treat errors as non-critical */ 1532 /* Treat errors as non-critical */
1650 ret = mfd_add_devices(wm831x->dev, -1, backlight_devs, 1533 ret = mfd_add_devices(wm831x->dev, wm831x_num, backlight_devs,
1651 ARRAY_SIZE(backlight_devs), NULL, 1534 ARRAY_SIZE(backlight_devs), NULL,
1652 wm831x->irq_base); 1535 wm831x->irq_base);
1653 if (ret < 0) 1536 if (ret < 0)
diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c
index 42b928ec891e..ada1835a5455 100644
--- a/drivers/mfd/wm831x-irq.c
+++ b/drivers/mfd/wm831x-irq.c
@@ -348,6 +348,15 @@ static void wm831x_irq_sync_unlock(struct irq_data *data)
348 struct wm831x *wm831x = irq_data_get_irq_chip_data(data); 348 struct wm831x *wm831x = irq_data_get_irq_chip_data(data);
349 int i; 349 int i;
350 350
351 for (i = 0; i < ARRAY_SIZE(wm831x->gpio_update); i++) {
352 if (wm831x->gpio_update[i]) {
353 wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + i,
354 WM831X_GPN_INT_MODE | WM831X_GPN_POL,
355 wm831x->gpio_update[i]);
356 wm831x->gpio_update[i] = 0;
357 }
358 }
359
351 for (i = 0; i < ARRAY_SIZE(wm831x->irq_masks_cur); i++) { 360 for (i = 0; i < ARRAY_SIZE(wm831x->irq_masks_cur); i++) {
352 /* If there's been a change in the mask write it back 361 /* If there's been a change in the mask write it back
353 * to the hardware. */ 362 * to the hardware. */
@@ -387,7 +396,7 @@ static void wm831x_irq_disable(struct irq_data *data)
387static int wm831x_irq_set_type(struct irq_data *data, unsigned int type) 396static int wm831x_irq_set_type(struct irq_data *data, unsigned int type)
388{ 397{
389 struct wm831x *wm831x = irq_data_get_irq_chip_data(data); 398 struct wm831x *wm831x = irq_data_get_irq_chip_data(data);
390 int val, irq; 399 int irq;
391 400
392 irq = data->irq - wm831x->irq_base; 401 irq = data->irq - wm831x->irq_base;
393 402
@@ -399,22 +408,30 @@ static int wm831x_irq_set_type(struct irq_data *data, unsigned int type)
399 return -EINVAL; 408 return -EINVAL;
400 } 409 }
401 410
411 /* Rebase the IRQ into the GPIO range so we've got a sensible array
412 * index.
413 */
414 irq -= WM831X_IRQ_GPIO_1;
415
416 /* We set the high bit to flag that we need an update; don't
417 * do the update here as we can be called with the bus lock
418 * held.
419 */
402 switch (type) { 420 switch (type) {
403 case IRQ_TYPE_EDGE_BOTH: 421 case IRQ_TYPE_EDGE_BOTH:
404 val = WM831X_GPN_INT_MODE; 422 wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_INT_MODE;
405 break; 423 break;
406 case IRQ_TYPE_EDGE_RISING: 424 case IRQ_TYPE_EDGE_RISING:
407 val = WM831X_GPN_POL; 425 wm831x->gpio_update[irq] = 0x10000 | WM831X_GPN_POL;
408 break; 426 break;
409 case IRQ_TYPE_EDGE_FALLING: 427 case IRQ_TYPE_EDGE_FALLING:
410 val = 0; 428 wm831x->gpio_update[irq] = 0x10000;
411 break; 429 break;
412 default: 430 default:
413 return -EINVAL; 431 return -EINVAL;
414 } 432 }
415 433
416 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + irq, 434 return 0;
417 WM831X_GPN_INT_MODE | WM831X_GPN_POL, val);
418} 435}
419 436
420static struct irq_chip wm831x_irq_chip = { 437static struct irq_chip wm831x_irq_chip = {
@@ -432,7 +449,7 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data)
432{ 449{
433 struct wm831x *wm831x = data; 450 struct wm831x *wm831x = data;
434 unsigned int i; 451 unsigned int i;
435 int primary; 452 int primary, status_addr;
436 int status_regs[WM831X_NUM_IRQ_REGS] = { 0 }; 453 int status_regs[WM831X_NUM_IRQ_REGS] = { 0 };
437 int read[WM831X_NUM_IRQ_REGS] = { 0 }; 454 int read[WM831X_NUM_IRQ_REGS] = { 0 };
438 int *status; 455 int *status;
@@ -467,8 +484,9 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data)
467 /* Hopefully there should only be one register to read 484 /* Hopefully there should only be one register to read
468 * each time otherwise we ought to do a block read. */ 485 * each time otherwise we ought to do a block read. */
469 if (!read[offset]) { 486 if (!read[offset]) {
470 *status = wm831x_reg_read(wm831x, 487 status_addr = irq_data_to_status_reg(&wm831x_irqs[i]);
471 irq_data_to_status_reg(&wm831x_irqs[i])); 488
489 *status = wm831x_reg_read(wm831x, status_addr);
472 if (*status < 0) { 490 if (*status < 0) {
473 dev_err(wm831x->dev, 491 dev_err(wm831x->dev,
474 "Failed to read IRQ status: %d\n", 492 "Failed to read IRQ status: %d\n",
@@ -477,26 +495,21 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data)
477 } 495 }
478 496
479 read[offset] = 1; 497 read[offset] = 1;
498
499 /* Ignore any bits that we don't think are masked */
500 *status &= ~wm831x->irq_masks_cur[offset];
501
502 /* Acknowledge now so we don't miss
503 * notifications while we handle.
504 */
505 wm831x_reg_write(wm831x, status_addr, *status);
480 } 506 }
481 507
482 /* Report it if it isn't masked, or forget the status. */ 508 if (*status & wm831x_irqs[i].mask)
483 if ((*status & ~wm831x->irq_masks_cur[offset])
484 & wm831x_irqs[i].mask)
485 handle_nested_irq(wm831x->irq_base + i); 509 handle_nested_irq(wm831x->irq_base + i);
486 else
487 *status &= ~wm831x_irqs[i].mask;
488 } 510 }
489 511
490out: 512out:
491 /* Touchscreen interrupts are handled specially in the driver */
492 status_regs[0] &= ~(WM831X_TCHDATA_EINT | WM831X_TCHPD_EINT);
493
494 for (i = 0; i < ARRAY_SIZE(status_regs); i++) {
495 if (status_regs[i])
496 wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_1 + i,
497 status_regs[i]);
498 }
499
500 return IRQ_HANDLED; 513 return IRQ_HANDLED;
501} 514}
502 515
@@ -515,13 +528,22 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq)
515 0xffff); 528 0xffff);
516 } 529 }
517 530
518 if (!pdata || !pdata->irq_base) { 531 /* Try to dynamically allocate IRQs if no base is specified */
519 dev_err(wm831x->dev, 532 if (!pdata || !pdata->irq_base)
520 "No interrupt base specified, no interrupts\n"); 533 wm831x->irq_base = -1;
534 else
535 wm831x->irq_base = pdata->irq_base;
536
537 wm831x->irq_base = irq_alloc_descs(wm831x->irq_base, 0,
538 WM831X_NUM_IRQS, 0);
539 if (wm831x->irq_base < 0) {
540 dev_warn(wm831x->dev, "Failed to allocate IRQs: %d\n",
541 wm831x->irq_base);
542 wm831x->irq_base = 0;
521 return 0; 543 return 0;
522 } 544 }
523 545
524 if (pdata->irq_cmos) 546 if (pdata && pdata->irq_cmos)
525 i = 0; 547 i = 0;
526 else 548 else
527 i = WM831X_IRQ_OD; 549 i = WM831X_IRQ_OD;
@@ -541,7 +563,6 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq)
541 } 563 }
542 564
543 wm831x->irq = irq; 565 wm831x->irq = irq;
544 wm831x->irq_base = pdata->irq_base;
545 566
546 /* Register them with genirq */ 567 /* Register them with genirq */
547 for (cur_irq = wm831x->irq_base; 568 for (cur_irq = wm831x->irq_base;
diff --git a/drivers/mfd/wm8350-irq.c b/drivers/mfd/wm8350-irq.c
index ed4b22a167b3..8a1fafd0bf7d 100644
--- a/drivers/mfd/wm8350-irq.c
+++ b/drivers/mfd/wm8350-irq.c
@@ -473,17 +473,13 @@ int wm8350_irq_init(struct wm8350 *wm8350, int irq,
473{ 473{
474 int ret, cur_irq, i; 474 int ret, cur_irq, i;
475 int flags = IRQF_ONESHOT; 475 int flags = IRQF_ONESHOT;
476 int irq_base = -1;
476 477
477 if (!irq) { 478 if (!irq) {
478 dev_warn(wm8350->dev, "No interrupt support, no core IRQ\n"); 479 dev_warn(wm8350->dev, "No interrupt support, no core IRQ\n");
479 return 0; 480 return 0;
480 } 481 }
481 482
482 if (!pdata || !pdata->irq_base) {
483 dev_warn(wm8350->dev, "No interrupt support, no IRQ base\n");
484 return 0;
485 }
486
487 /* Mask top level interrupts */ 483 /* Mask top level interrupts */
488 wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0xFFFF); 484 wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0xFFFF);
489 485
@@ -502,7 +498,17 @@ int wm8350_irq_init(struct wm8350 *wm8350, int irq,
502 wm8350->chip_irq = irq; 498 wm8350->chip_irq = irq;
503 wm8350->irq_base = pdata->irq_base; 499 wm8350->irq_base = pdata->irq_base;
504 500
505 if (pdata->irq_high) { 501 if (pdata && pdata->irq_base > 0)
502 irq_base = pdata->irq_base;
503
504 wm8350->irq_base = irq_alloc_descs(irq_base, 0, ARRAY_SIZE(wm8350_irqs), 0);
505 if (wm8350->irq_base < 0) {
506 dev_warn(wm8350->dev, "Allocating irqs failed with %d\n",
507 wm8350->irq_base);
508 return 0;
509 }
510
511 if (pdata && pdata->irq_high) {
506 flags |= IRQF_TRIGGER_HIGH; 512 flags |= IRQF_TRIGGER_HIGH;
507 513
508 wm8350_set_bits(wm8350, WM8350_SYSTEM_CONTROL_1, 514 wm8350_set_bits(wm8350, WM8350_SYSTEM_CONTROL_1,
diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c
index e198d40292e7..96479c9b1728 100644
--- a/drivers/mfd/wm8994-core.c
+++ b/drivers/mfd/wm8994-core.c
@@ -316,7 +316,7 @@ static int wm8994_suspend(struct device *dev)
316static int wm8994_resume(struct device *dev) 316static int wm8994_resume(struct device *dev)
317{ 317{
318 struct wm8994 *wm8994 = dev_get_drvdata(dev); 318 struct wm8994 *wm8994 = dev_get_drvdata(dev);
319 int ret; 319 int ret, i;
320 320
321 /* We may have lied to the PM core about suspending */ 321 /* We may have lied to the PM core about suspending */
322 if (!wm8994->suspended) 322 if (!wm8994->suspended)
@@ -329,10 +329,16 @@ static int wm8994_resume(struct device *dev)
329 return ret; 329 return ret;
330 } 330 }
331 331
332 ret = wm8994_write(wm8994, WM8994_INTERRUPT_STATUS_1_MASK, 332 /* Write register at a time as we use the cache on the CPU so store
333 WM8994_NUM_IRQ_REGS * 2, &wm8994->irq_masks_cur); 333 * it in native endian.
334 if (ret < 0) 334 */
335 dev_err(dev, "Failed to restore interrupt masks: %d\n", ret); 335 for (i = 0; i < ARRAY_SIZE(wm8994->irq_masks_cur); i++) {
336 ret = wm8994_reg_write(wm8994, WM8994_INTERRUPT_STATUS_1_MASK
337 + i, wm8994->irq_masks_cur[i]);
338 if (ret < 0)
339 dev_err(dev, "Failed to restore interrupt masks: %d\n",
340 ret);
341 }
336 342
337 ret = wm8994_write(wm8994, WM8994_LDO_1, WM8994_NUM_LDO_REGS * 2, 343 ret = wm8994_write(wm8994, WM8994_LDO_1, WM8994_NUM_LDO_REGS * 2,
338 &wm8994->ldo_regs); 344 &wm8994->ldo_regs);
@@ -403,7 +409,7 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
403 break; 409 break;
404 default: 410 default:
405 BUG(); 411 BUG();
406 return -EINVAL; 412 goto err;
407 } 413 }
408 414
409 wm8994->supplies = kzalloc(sizeof(struct regulator_bulk_data) * 415 wm8994->supplies = kzalloc(sizeof(struct regulator_bulk_data) *
@@ -425,7 +431,7 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
425 break; 431 break;
426 default: 432 default:
427 BUG(); 433 BUG();
428 return -EINVAL; 434 goto err;
429 } 435 }
430 436
431 ret = regulator_bulk_get(wm8994->dev, wm8994->num_supplies, 437 ret = regulator_bulk_get(wm8994->dev, wm8994->num_supplies,
@@ -476,13 +482,18 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq)
476 goto err_enable; 482 goto err_enable;
477 } 483 }
478 484
479 switch (ret) { 485 switch (wm8994->type) {
480 case 0: 486 case WM8994:
481 case 1: 487 switch (ret) {
482 if (wm8994->type == WM8994) 488 case 0:
489 case 1:
483 dev_warn(wm8994->dev, 490 dev_warn(wm8994->dev,
484 "revision %c not fully supported\n", 491 "revision %c not fully supported\n",
485 'A' + ret); 492 'A' + ret);
493 break;
494 default:
495 break;
496 }
486 break; 497 break;
487 default: 498 default:
488 break; 499 break;
diff --git a/drivers/mfd/wm8994-irq.c b/drivers/mfd/wm8994-irq.c
index 71c6e8f9aedb..d682f7bd112c 100644
--- a/drivers/mfd/wm8994-irq.c
+++ b/drivers/mfd/wm8994-irq.c
@@ -231,12 +231,6 @@ static irqreturn_t wm8994_irq_thread(int irq, void *data)
231 status[i] &= ~wm8994->irq_masks_cur[i]; 231 status[i] &= ~wm8994->irq_masks_cur[i];
232 } 232 }
233 233
234 /* Report */
235 for (i = 0; i < ARRAY_SIZE(wm8994_irqs); i++) {
236 if (status[wm8994_irqs[i].reg - 1] & wm8994_irqs[i].mask)
237 handle_nested_irq(wm8994->irq_base + i);
238 }
239
240 /* Ack any unmasked IRQs */ 234 /* Ack any unmasked IRQs */
241 for (i = 0; i < ARRAY_SIZE(status); i++) { 235 for (i = 0; i < ARRAY_SIZE(status); i++) {
242 if (status[i]) 236 if (status[i])
@@ -244,6 +238,12 @@ static irqreturn_t wm8994_irq_thread(int irq, void *data)
244 status[i]); 238 status[i]);
245 } 239 }
246 240
241 /* Report */
242 for (i = 0; i < ARRAY_SIZE(wm8994_irqs); i++) {
243 if (status[wm8994_irqs[i].reg - 1] & wm8994_irqs[i].mask)
244 handle_nested_irq(wm8994->irq_base + i);
245 }
246
247 return IRQ_HANDLED; 247 return IRQ_HANDLED;
248} 248}
249 249
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 118eb213eb3a..c7fd2c0e3f2b 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -249,6 +249,12 @@ config REGULATOR_TPS6507X
249 three step-down converters and two general-purpose LDO voltage regulators. 249 three step-down converters and two general-purpose LDO voltage regulators.
250 It supports TI's software based Class-2 SmartReflex implementation. 250 It supports TI's software based Class-2 SmartReflex implementation.
251 251
252config REGULATOR_TPS65912
253 tristate "TI TPS65912 Power regulator"
254 depends on (MFD_TPS65912_I2C || MFD_TPS65912_SPI)
255 help
256 This driver supports TPS65912 voltage regulator chip.
257
252config REGULATOR_88PM8607 258config REGULATOR_88PM8607
253 bool "Marvell 88PM8607 Power regulators" 259 bool "Marvell 88PM8607 Power regulators"
254 depends on MFD_88PM860X=y 260 depends on MFD_88PM860X=y
@@ -304,5 +310,12 @@ config REGULATOR_TPS65910
304 help 310 help
305 This driver supports TPS65910 voltage regulator chips. 311 This driver supports TPS65910 voltage regulator chips.
306 312
313config REGULATOR_AAT2870
314 tristate "AnalogicTech AAT2870 Regulators"
315 depends on MFD_AAT2870_CORE
316 help
317 If you have a AnalogicTech AAT2870 say Y to enable the
318 regulator driver.
319
307endif 320endif
308 321
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 3932d2ec38f3..040d5aa63535 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -38,10 +38,12 @@ obj-$(CONFIG_REGULATOR_TPS6105X) += tps6105x-regulator.o
38obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o 38obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o
39obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o 39obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o
40obj-$(CONFIG_REGULATOR_TPS6524X) += tps6524x-regulator.o 40obj-$(CONFIG_REGULATOR_TPS6524X) += tps6524x-regulator.o
41obj-$(CONFIG_REGULATOR_TPS65912) += tps65912-regulator.o
41obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o 42obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o
42obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o 43obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o
43obj-$(CONFIG_REGULATOR_AB8500) += ab8500.o 44obj-$(CONFIG_REGULATOR_AB8500) += ab8500.o
44obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o 45obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
45obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o 46obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o
47obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o
46 48
47ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG 49ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/aat2870-regulator.c b/drivers/regulator/aat2870-regulator.c
new file mode 100644
index 000000000000..cd4104542f0d
--- /dev/null
+++ b/drivers/regulator/aat2870-regulator.c
@@ -0,0 +1,232 @@
1/*
2 * linux/drivers/regulator/aat2870-regulator.c
3 *
4 * Copyright (c) 2011, NVIDIA Corporation.
5 * Author: Jin Park <jinyoungp@nvidia.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/err.h>
25#include <linux/slab.h>
26#include <linux/delay.h>
27#include <linux/platform_device.h>
28#include <linux/regulator/driver.h>
29#include <linux/regulator/machine.h>
30#include <linux/mfd/aat2870.h>
31
32struct aat2870_regulator {
33 struct platform_device *pdev;
34 struct regulator_desc desc;
35
36 const int *voltages; /* uV */
37
38 int min_uV;
39 int max_uV;
40
41 u8 enable_addr;
42 u8 enable_shift;
43 u8 enable_mask;
44
45 u8 voltage_addr;
46 u8 voltage_shift;
47 u8 voltage_mask;
48};
49
50static int aat2870_ldo_list_voltage(struct regulator_dev *rdev,
51 unsigned selector)
52{
53 struct aat2870_regulator *ri = rdev_get_drvdata(rdev);
54
55 return ri->voltages[selector];
56}
57
58static int aat2870_ldo_set_voltage_sel(struct regulator_dev *rdev,
59 unsigned selector)
60{
61 struct aat2870_regulator *ri = rdev_get_drvdata(rdev);
62 struct aat2870_data *aat2870 = dev_get_drvdata(ri->pdev->dev.parent);
63
64 return aat2870->update(aat2870, ri->voltage_addr, ri->voltage_mask,
65 (selector << ri->voltage_shift) & ri->voltage_mask);
66}
67
68static int aat2870_ldo_get_voltage_sel(struct regulator_dev *rdev)
69{
70 struct aat2870_regulator *ri = rdev_get_drvdata(rdev);
71 struct aat2870_data *aat2870 = dev_get_drvdata(ri->pdev->dev.parent);
72 u8 val;
73 int ret;
74
75 ret = aat2870->read(aat2870, ri->voltage_addr, &val);
76 if (ret)
77 return ret;
78
79 return (val & ri->voltage_mask) >> ri->voltage_shift;
80}
81
82static int aat2870_ldo_enable(struct regulator_dev *rdev)
83{
84 struct aat2870_regulator *ri = rdev_get_drvdata(rdev);
85 struct aat2870_data *aat2870 = dev_get_drvdata(ri->pdev->dev.parent);
86
87 return aat2870->update(aat2870, ri->enable_addr, ri->enable_mask,
88 ri->enable_mask);
89}
90
91static int aat2870_ldo_disable(struct regulator_dev *rdev)
92{
93 struct aat2870_regulator *ri = rdev_get_drvdata(rdev);
94 struct aat2870_data *aat2870 = dev_get_drvdata(ri->pdev->dev.parent);
95
96 return aat2870->update(aat2870, ri->enable_addr, ri->enable_mask, 0);
97}
98
99static int aat2870_ldo_is_enabled(struct regulator_dev *rdev)
100{
101 struct aat2870_regulator *ri = rdev_get_drvdata(rdev);
102 struct aat2870_data *aat2870 = dev_get_drvdata(ri->pdev->dev.parent);
103 u8 val;
104 int ret;
105
106 ret = aat2870->read(aat2870, ri->enable_addr, &val);
107 if (ret)
108 return ret;
109
110 return val & ri->enable_mask ? 1 : 0;
111}
112
113static struct regulator_ops aat2870_ldo_ops = {
114 .list_voltage = aat2870_ldo_list_voltage,
115 .set_voltage_sel = aat2870_ldo_set_voltage_sel,
116 .get_voltage_sel = aat2870_ldo_get_voltage_sel,
117 .enable = aat2870_ldo_enable,
118 .disable = aat2870_ldo_disable,
119 .is_enabled = aat2870_ldo_is_enabled,
120};
121
122static const int aat2870_ldo_voltages[] = {
123 1200000, 1300000, 1500000, 1600000,
124 1800000, 2000000, 2200000, 2500000,
125 2600000, 2700000, 2800000, 2900000,
126 3000000, 3100000, 3200000, 3300000,
127};
128
129#define AAT2870_LDO(ids) \
130 { \
131 .desc = { \
132 .name = #ids, \
133 .id = AAT2870_ID_##ids, \
134 .n_voltages = ARRAY_SIZE(aat2870_ldo_voltages), \
135 .ops = &aat2870_ldo_ops, \
136 .type = REGULATOR_VOLTAGE, \
137 .owner = THIS_MODULE, \
138 }, \
139 .voltages = aat2870_ldo_voltages, \
140 .min_uV = 1200000, \
141 .max_uV = 3300000, \
142 }
143
144static struct aat2870_regulator aat2870_regulators[] = {
145 AAT2870_LDO(LDOA),
146 AAT2870_LDO(LDOB),
147 AAT2870_LDO(LDOC),
148 AAT2870_LDO(LDOD),
149};
150
151static struct aat2870_regulator *aat2870_get_regulator(int id)
152{
153 struct aat2870_regulator *ri = NULL;
154 int i;
155
156 for (i = 0; i < ARRAY_SIZE(aat2870_regulators); i++) {
157 ri = &aat2870_regulators[i];
158 if (ri->desc.id == id)
159 break;
160 }
161
162 if (!ri)
163 return NULL;
164
165 ri->enable_addr = AAT2870_LDO_EN;
166 ri->enable_shift = id - AAT2870_ID_LDOA;
167 ri->enable_mask = 0x1 << ri->enable_shift;
168
169 ri->voltage_addr = (id - AAT2870_ID_LDOA) / 2 ?
170 AAT2870_LDO_CD : AAT2870_LDO_AB;
171 ri->voltage_shift = (id - AAT2870_ID_LDOA) % 2 ? 0 : 4;
172 ri->voltage_mask = 0xF << ri->voltage_shift;
173
174 return ri;
175}
176
177static int aat2870_regulator_probe(struct platform_device *pdev)
178{
179 struct aat2870_regulator *ri;
180 struct regulator_dev *rdev;
181
182 ri = aat2870_get_regulator(pdev->id);
183 if (!ri) {
184 dev_err(&pdev->dev, "Invalid device ID, %d\n", pdev->id);
185 return -EINVAL;
186 }
187 ri->pdev = pdev;
188
189 rdev = regulator_register(&ri->desc, &pdev->dev,
190 pdev->dev.platform_data, ri);
191 if (IS_ERR(rdev)) {
192 dev_err(&pdev->dev, "Failed to register regulator %s\n",
193 ri->desc.name);
194 return PTR_ERR(rdev);
195 }
196 platform_set_drvdata(pdev, rdev);
197
198 return 0;
199}
200
201static int __devexit aat2870_regulator_remove(struct platform_device *pdev)
202{
203 struct regulator_dev *rdev = platform_get_drvdata(pdev);
204
205 regulator_unregister(rdev);
206 return 0;
207}
208
209static struct platform_driver aat2870_regulator_driver = {
210 .driver = {
211 .name = "aat2870-regulator",
212 .owner = THIS_MODULE,
213 },
214 .probe = aat2870_regulator_probe,
215 .remove = __devexit_p(aat2870_regulator_remove),
216};
217
218static int __init aat2870_regulator_init(void)
219{
220 return platform_driver_register(&aat2870_regulator_driver);
221}
222subsys_initcall(aat2870_regulator_init);
223
224static void __exit aat2870_regulator_exit(void)
225{
226 platform_driver_unregister(&aat2870_regulator_driver);
227}
228module_exit(aat2870_regulator_exit);
229
230MODULE_DESCRIPTION("AnalogicTech AAT2870 Regulator");
231MODULE_LICENSE("GPL");
232MODULE_AUTHOR("Jin Park <jinyoungp@nvidia.com>");
diff --git a/drivers/regulator/tps65912-regulator.c b/drivers/regulator/tps65912-regulator.c
new file mode 100644
index 000000000000..3a9313e00fac
--- /dev/null
+++ b/drivers/regulator/tps65912-regulator.c
@@ -0,0 +1,800 @@
1/*
2 * tps65912.c -- TI tps65912
3 *
4 * Copyright 2011 Texas Instruments Inc.
5 *
6 * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This driver is based on wm8350 implementation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/gpio.h>
26#include <linux/mfd/tps65912.h>
27
28/* DCDC's */
29#define TPS65912_REG_DCDC1 0
30#define TPS65912_REG_DCDC2 1
31#define TPS65912_REG_DCDC3 2
32#define TPS65912_REG_DCDC4 3
33
34/* LDOs */
35#define TPS65912_REG_LDO1 4
36#define TPS65912_REG_LDO2 5
37#define TPS65912_REG_LDO3 6
38#define TPS65912_REG_LDO4 7
39#define TPS65912_REG_LDO5 8
40#define TPS65912_REG_LDO6 9
41#define TPS65912_REG_LDO7 10
42#define TPS65912_REG_LDO8 11
43#define TPS65912_REG_LDO9 12
44#define TPS65912_REG_LDO10 13
45
46#define TPS65912_MAX_REG_ID TPS65912_REG_LDO_10
47
48/* Number of step-down converters available */
49#define TPS65912_NUM_DCDC 4
50
51/* Number of LDO voltage regulators available */
52#define TPS65912_NUM_LDO 10
53
54/* Number of total regulators available */
55#define TPS65912_NUM_REGULATOR (TPS65912_NUM_DCDC + TPS65912_NUM_LDO)
56
57#define TPS65912_REG_ENABLED 0x80
58#define OP_SELREG_MASK 0x40
59#define OP_SELREG_SHIFT 6
60
61struct tps_info {
62 const char *name;
63};
64
65static struct tps_info tps65912_regs[] = {
66 {
67 .name = "DCDC1",
68 },
69 {
70 .name = "DCDC2",
71 },
72 {
73 .name = "DCDC3",
74 },
75 {
76 .name = "DCDC4",
77 },
78 {
79 .name = "LDO1",
80 },
81 {
82 .name = "LDO2",
83 },
84 {
85 .name = "LDO3",
86 },
87 {
88 .name = "LDO4",
89 },
90 {
91 .name = "LDO5",
92 },
93 {
94 .name = "LDO6",
95 },
96 {
97 .name = "LDO7",
98 },
99 {
100 .name = "LDO8",
101 },
102 {
103 .name = "LDO9",
104 },
105 {
106 .name = "LDO10",
107 },
108};
109
110struct tps65912_reg {
111 struct regulator_desc desc[TPS65912_NUM_REGULATOR];
112 struct tps65912 *mfd;
113 struct regulator_dev *rdev[TPS65912_NUM_REGULATOR];
114 struct tps_info *info[TPS65912_NUM_REGULATOR];
115 /* for read/write access */
116 struct mutex io_lock;
117 int mode;
118 int (*get_ctrl_reg)(int);
119 int dcdc1_range;
120 int dcdc2_range;
121 int dcdc3_range;
122 int dcdc4_range;
123 int pwm_mode_reg;
124 int eco_reg;
125};
126
127static int tps65912_get_range(struct tps65912_reg *pmic, int id)
128{
129 struct tps65912 *mfd = pmic->mfd;
130
131 if (id > TPS65912_REG_DCDC4)
132 return 0;
133
134 switch (id) {
135 case TPS65912_REG_DCDC1:
136 pmic->dcdc1_range = tps65912_reg_read(mfd,
137 TPS65912_DCDC1_LIMIT);
138 if (pmic->dcdc1_range < 0)
139 return pmic->dcdc1_range;
140 pmic->dcdc1_range = (pmic->dcdc1_range &
141 DCDC_LIMIT_RANGE_MASK) >> DCDC_LIMIT_RANGE_SHIFT;
142 return pmic->dcdc1_range;
143 case TPS65912_REG_DCDC2:
144 pmic->dcdc2_range = tps65912_reg_read(mfd,
145 TPS65912_DCDC2_LIMIT);
146 if (pmic->dcdc2_range < 0)
147 return pmic->dcdc2_range;
148 pmic->dcdc2_range = (pmic->dcdc2_range &
149 DCDC_LIMIT_RANGE_MASK) >> DCDC_LIMIT_RANGE_SHIFT;
150 return pmic->dcdc2_range;
151 case TPS65912_REG_DCDC3:
152 pmic->dcdc3_range = tps65912_reg_read(mfd,
153 TPS65912_DCDC3_LIMIT);
154 if (pmic->dcdc3_range < 0)
155 return pmic->dcdc3_range;
156 pmic->dcdc3_range = (pmic->dcdc3_range &
157 DCDC_LIMIT_RANGE_MASK) >> DCDC_LIMIT_RANGE_SHIFT;
158 return pmic->dcdc3_range;
159 case TPS65912_REG_DCDC4:
160 pmic->dcdc4_range = tps65912_reg_read(mfd,
161 TPS65912_DCDC4_LIMIT);
162 if (pmic->dcdc4_range < 0)
163 return pmic->dcdc4_range;
164 pmic->dcdc4_range = (pmic->dcdc4_range &
165 DCDC_LIMIT_RANGE_MASK) >> DCDC_LIMIT_RANGE_SHIFT;
166 return pmic->dcdc4_range;
167 default:
168 return 0;
169 }
170}
171
172static unsigned long tps65912_vsel_to_uv_range0(u8 vsel)
173{
174 unsigned long uv;
175
176 uv = ((vsel * 12500) + 500000);
177 return uv;
178}
179
180static unsigned long tps65912_vsel_to_uv_range1(u8 vsel)
181{
182 unsigned long uv;
183
184 uv = ((vsel * 12500) + 700000);
185 return uv;
186}
187
188static unsigned long tps65912_vsel_to_uv_range2(u8 vsel)
189{
190 unsigned long uv;
191
192 uv = ((vsel * 25000) + 500000);
193 return uv;
194}
195
196static unsigned long tps65912_vsel_to_uv_range3(u8 vsel)
197{
198 unsigned long uv;
199
200 if (vsel == 0x3f)
201 uv = 3800000;
202 else
203 uv = ((vsel * 50000) + 500000);
204
205 return uv;
206}
207
208static unsigned long tps65912_vsel_to_uv_ldo(u8 vsel)
209{
210 unsigned long uv = 0;
211
212 if (vsel <= 32)
213 uv = ((vsel * 25000) + 800000);
214 else if (vsel > 32 && vsel <= 60)
215 uv = (((vsel - 32) * 50000) + 1600000);
216 else if (vsel > 60)
217 uv = (((vsel - 60) * 100000) + 3000000);
218
219 return uv;
220}
221
222static int tps65912_get_ctrl_register(int id)
223{
224 switch (id) {
225 case TPS65912_REG_DCDC1:
226 return TPS65912_DCDC1_AVS;
227 case TPS65912_REG_DCDC2:
228 return TPS65912_DCDC2_AVS;
229 case TPS65912_REG_DCDC3:
230 return TPS65912_DCDC3_AVS;
231 case TPS65912_REG_DCDC4:
232 return TPS65912_DCDC4_AVS;
233 case TPS65912_REG_LDO1:
234 return TPS65912_LDO1_AVS;
235 case TPS65912_REG_LDO2:
236 return TPS65912_LDO2_AVS;
237 case TPS65912_REG_LDO3:
238 return TPS65912_LDO3_AVS;
239 case TPS65912_REG_LDO4:
240 return TPS65912_LDO4_AVS;
241 case TPS65912_REG_LDO5:
242 return TPS65912_LDO5;
243 case TPS65912_REG_LDO6:
244 return TPS65912_LDO6;
245 case TPS65912_REG_LDO7:
246 return TPS65912_LDO7;
247 case TPS65912_REG_LDO8:
248 return TPS65912_LDO8;
249 case TPS65912_REG_LDO9:
250 return TPS65912_LDO9;
251 case TPS65912_REG_LDO10:
252 return TPS65912_LDO10;
253 default:
254 return -EINVAL;
255 }
256}
257
258static int tps65912_get_dcdc_sel_register(struct tps65912_reg *pmic, int id)
259{
260 struct tps65912 *mfd = pmic->mfd;
261 int opvsel = 0, sr = 0;
262 u8 reg = 0;
263
264 if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_DCDC4)
265 return -EINVAL;
266
267 switch (id) {
268 case TPS65912_REG_DCDC1:
269 opvsel = tps65912_reg_read(mfd, TPS65912_DCDC1_OP);
270 sr = ((opvsel & OP_SELREG_MASK) >> OP_SELREG_SHIFT);
271 if (sr)
272 reg = TPS65912_DCDC1_AVS;
273 else
274 reg = TPS65912_DCDC1_OP;
275 break;
276 case TPS65912_REG_DCDC2:
277 opvsel = tps65912_reg_read(mfd, TPS65912_DCDC2_OP);
278 sr = (opvsel & OP_SELREG_MASK) >> OP_SELREG_SHIFT;
279 if (sr)
280 reg = TPS65912_DCDC2_AVS;
281 else
282 reg = TPS65912_DCDC2_OP;
283 break;
284 case TPS65912_REG_DCDC3:
285 opvsel = tps65912_reg_read(mfd, TPS65912_DCDC3_OP);
286 sr = (opvsel & OP_SELREG_MASK) >> OP_SELREG_SHIFT;
287 if (sr)
288 reg = TPS65912_DCDC3_AVS;
289 else
290 reg = TPS65912_DCDC3_OP;
291 break;
292 case TPS65912_REG_DCDC4:
293 opvsel = tps65912_reg_read(mfd, TPS65912_DCDC4_OP);
294 sr = (opvsel & OP_SELREG_MASK) >> OP_SELREG_SHIFT;
295 if (sr)
296 reg = TPS65912_DCDC4_AVS;
297 else
298 reg = TPS65912_DCDC4_OP;
299 break;
300 }
301 return reg;
302}
303
304static int tps65912_get_ldo_sel_register(struct tps65912_reg *pmic, int id)
305{
306 struct tps65912 *mfd = pmic->mfd;
307 int opvsel = 0, sr = 0;
308 u8 reg = 0;
309
310 if (id < TPS65912_REG_LDO1 || id > TPS65912_REG_LDO10)
311 return -EINVAL;
312
313 switch (id) {
314 case TPS65912_REG_LDO1:
315 opvsel = tps65912_reg_read(mfd, TPS65912_LDO1_OP);
316 sr = (opvsel & OP_SELREG_MASK) >> OP_SELREG_SHIFT;
317 if (sr)
318 reg = TPS65912_LDO1_AVS;
319 else
320 reg = TPS65912_LDO1_OP;
321 break;
322 case TPS65912_REG_LDO2:
323 opvsel = tps65912_reg_read(mfd, TPS65912_LDO2_OP);
324 sr = (opvsel & OP_SELREG_MASK) >> OP_SELREG_SHIFT;
325 if (sr)
326 reg = TPS65912_LDO2_AVS;
327 else
328 reg = TPS65912_LDO2_OP;
329 break;
330 case TPS65912_REG_LDO3:
331 opvsel = tps65912_reg_read(mfd, TPS65912_LDO3_OP);
332 sr = (opvsel & OP_SELREG_MASK) >> OP_SELREG_SHIFT;
333 if (sr)
334 reg = TPS65912_LDO3_AVS;
335 else
336 reg = TPS65912_LDO3_OP;
337 break;
338 case TPS65912_REG_LDO4:
339 opvsel = tps65912_reg_read(mfd, TPS65912_LDO4_OP);
340 sr = (opvsel & OP_SELREG_MASK) >> OP_SELREG_SHIFT;
341 if (sr)
342 reg = TPS65912_LDO4_AVS;
343 else
344 reg = TPS65912_LDO4_OP;
345 break;
346 case TPS65912_REG_LDO5:
347 reg = TPS65912_LDO5;
348 break;
349 case TPS65912_REG_LDO6:
350 reg = TPS65912_LDO6;
351 break;
352 case TPS65912_REG_LDO7:
353 reg = TPS65912_LDO7;
354 break;
355 case TPS65912_REG_LDO8:
356 reg = TPS65912_LDO8;
357 break;
358 case TPS65912_REG_LDO9:
359 reg = TPS65912_LDO9;
360 break;
361 case TPS65912_REG_LDO10:
362 reg = TPS65912_LDO10;
363 break;
364 }
365
366 return reg;
367}
368
369static int tps65912_get_mode_regiters(struct tps65912_reg *pmic, int id)
370{
371 switch (id) {
372 case TPS65912_REG_DCDC1:
373 pmic->pwm_mode_reg = TPS65912_DCDC1_CTRL;
374 pmic->eco_reg = TPS65912_DCDC1_AVS;
375 break;
376 case TPS65912_REG_DCDC2:
377 pmic->pwm_mode_reg = TPS65912_DCDC2_CTRL;
378 pmic->eco_reg = TPS65912_DCDC2_AVS;
379 break;
380 case TPS65912_REG_DCDC3:
381 pmic->pwm_mode_reg = TPS65912_DCDC3_CTRL;
382 pmic->eco_reg = TPS65912_DCDC3_AVS;
383 break;
384 case TPS65912_REG_DCDC4:
385 pmic->pwm_mode_reg = TPS65912_DCDC4_CTRL;
386 pmic->eco_reg = TPS65912_DCDC4_AVS;
387 break;
388 default:
389 return -EINVAL;
390 }
391
392 return 0;
393}
394
395static int tps65912_reg_is_enabled(struct regulator_dev *dev)
396{
397 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
398 struct tps65912 *mfd = pmic->mfd;
399 int reg, value, id = rdev_get_id(dev);
400
401 if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10)
402 return -EINVAL;
403
404 reg = pmic->get_ctrl_reg(id);
405 if (reg < 0)
406 return reg;
407
408 value = tps65912_reg_read(mfd, reg);
409 if (value < 0)
410 return value;
411
412 return value & TPS65912_REG_ENABLED;
413}
414
415static int tps65912_reg_enable(struct regulator_dev *dev)
416{
417 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
418 struct tps65912 *mfd = pmic->mfd;
419 int id = rdev_get_id(dev);
420 int reg;
421
422 if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10)
423 return -EINVAL;
424
425 reg = pmic->get_ctrl_reg(id);
426 if (reg < 0)
427 return reg;
428
429 return tps65912_set_bits(mfd, reg, TPS65912_REG_ENABLED);
430}
431
432static int tps65912_reg_disable(struct regulator_dev *dev)
433{
434 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
435 struct tps65912 *mfd = pmic->mfd;
436 int id = rdev_get_id(dev), reg;
437
438 reg = pmic->get_ctrl_reg(id);
439 if (reg < 0)
440 return reg;
441
442 return tps65912_clear_bits(mfd, reg, TPS65912_REG_ENABLED);
443}
444
445static int tps65912_set_mode(struct regulator_dev *dev, unsigned int mode)
446{
447 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
448 struct tps65912 *mfd = pmic->mfd;
449 int pwm_mode, eco, id = rdev_get_id(dev);
450
451 tps65912_get_mode_regiters(pmic, id);
452
453 pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg);
454 eco = tps65912_reg_read(mfd, pmic->eco_reg);
455
456 pwm_mode &= DCDCCTRL_DCDC_MODE_MASK;
457 eco &= DCDC_AVS_ECO_MASK;
458
459 switch (mode) {
460 case REGULATOR_MODE_FAST:
461 /* Verify if mode alredy set */
462 if (pwm_mode && !eco)
463 break;
464 tps65912_set_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK);
465 tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK);
466 break;
467 case REGULATOR_MODE_NORMAL:
468 case REGULATOR_MODE_IDLE:
469 if (!pwm_mode && !eco)
470 break;
471 tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK);
472 tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK);
473 break;
474 case REGULATOR_MODE_STANDBY:
475 if (!pwm_mode && eco)
476 break;
477 tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK);
478 tps65912_set_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK);
479 break;
480 default:
481 return -EINVAL;
482 }
483
484 return 0;
485}
486
487static unsigned int tps65912_get_mode(struct regulator_dev *dev)
488{
489 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
490 struct tps65912 *mfd = pmic->mfd;
491 int pwm_mode, eco, mode = 0, id = rdev_get_id(dev);
492
493 tps65912_get_mode_regiters(pmic, id);
494
495 pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg);
496 eco = tps65912_reg_read(mfd, pmic->eco_reg);
497
498 pwm_mode &= DCDCCTRL_DCDC_MODE_MASK;
499 eco &= DCDC_AVS_ECO_MASK;
500
501 if (pwm_mode && !eco)
502 mode = REGULATOR_MODE_FAST;
503 else if (!pwm_mode && !eco)
504 mode = REGULATOR_MODE_NORMAL;
505 else if (!pwm_mode && eco)
506 mode = REGULATOR_MODE_STANDBY;
507
508 return mode;
509}
510
511static int tps65912_get_voltage_dcdc(struct regulator_dev *dev)
512{
513 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
514 struct tps65912 *mfd = pmic->mfd;
515 int id = rdev_get_id(dev), voltage = 0, range;
516 int opvsel = 0, avsel = 0, sr, vsel;
517
518 switch (id) {
519 case TPS65912_REG_DCDC1:
520 opvsel = tps65912_reg_read(mfd, TPS65912_DCDC1_OP);
521 avsel = tps65912_reg_read(mfd, TPS65912_DCDC1_AVS);
522 range = pmic->dcdc1_range;
523 break;
524 case TPS65912_REG_DCDC2:
525 opvsel = tps65912_reg_read(mfd, TPS65912_DCDC2_OP);
526 avsel = tps65912_reg_read(mfd, TPS65912_DCDC2_AVS);
527 range = pmic->dcdc2_range;
528 break;
529 case TPS65912_REG_DCDC3:
530 opvsel = tps65912_reg_read(mfd, TPS65912_DCDC3_OP);
531 avsel = tps65912_reg_read(mfd, TPS65912_DCDC3_AVS);
532 range = pmic->dcdc3_range;
533 break;
534 case TPS65912_REG_DCDC4:
535 opvsel = tps65912_reg_read(mfd, TPS65912_DCDC4_OP);
536 avsel = tps65912_reg_read(mfd, TPS65912_DCDC4_AVS);
537 range = pmic->dcdc4_range;
538 break;
539 default:
540 return -EINVAL;
541 }
542
543 sr = (opvsel & OP_SELREG_MASK) >> OP_SELREG_SHIFT;
544 if (sr)
545 vsel = avsel;
546 else
547 vsel = opvsel;
548 vsel &= 0x3F;
549
550 switch (range) {
551 case 0:
552 /* 0.5 - 1.2875V in 12.5mV steps */
553 voltage = tps65912_vsel_to_uv_range0(vsel);
554 break;
555 case 1:
556 /* 0.7 - 1.4875V in 12.5mV steps */
557 voltage = tps65912_vsel_to_uv_range1(vsel);
558 break;
559 case 2:
560 /* 0.5 - 2.075V in 25mV steps */
561 voltage = tps65912_vsel_to_uv_range2(vsel);
562 break;
563 case 3:
564 /* 0.5 - 3.8V in 50mV steps */
565 voltage = tps65912_vsel_to_uv_range3(vsel);
566 break;
567 }
568 return voltage;
569}
570
571static int tps65912_set_voltage_dcdc(struct regulator_dev *dev,
572 unsigned selector)
573{
574 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
575 struct tps65912 *mfd = pmic->mfd;
576 int id = rdev_get_id(dev);
577 int value;
578 u8 reg;
579
580 reg = tps65912_get_dcdc_sel_register(pmic, id);
581 value = tps65912_reg_read(mfd, reg);
582 value &= 0xC0;
583 return tps65912_reg_write(mfd, reg, selector | value);
584}
585
586static int tps65912_get_voltage_ldo(struct regulator_dev *dev)
587{
588 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
589 struct tps65912 *mfd = pmic->mfd;
590 int id = rdev_get_id(dev);
591 int vsel = 0;
592 u8 reg;
593
594 reg = tps65912_get_ldo_sel_register(pmic, id);
595 vsel = tps65912_reg_read(mfd, reg);
596 vsel &= 0x3F;
597
598 return tps65912_vsel_to_uv_ldo(vsel);
599}
600
601static int tps65912_set_voltage_ldo(struct regulator_dev *dev,
602 unsigned selector)
603{
604 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
605 struct tps65912 *mfd = pmic->mfd;
606 int id = rdev_get_id(dev), reg, value;
607
608 reg = tps65912_get_ldo_sel_register(pmic, id);
609 value = tps65912_reg_read(mfd, reg);
610 value &= 0xC0;
611 return tps65912_reg_write(mfd, reg, selector | value);
612}
613
614static int tps65912_list_voltage_dcdc(struct regulator_dev *dev,
615 unsigned selector)
616{
617 struct tps65912_reg *pmic = rdev_get_drvdata(dev);
618 int range, voltage = 0, id = rdev_get_id(dev);
619
620 switch (id) {
621 case TPS65912_REG_DCDC1:
622 range = pmic->dcdc1_range;
623 break;
624 case TPS65912_REG_DCDC2:
625 range = pmic->dcdc2_range;
626 break;
627 case TPS65912_REG_DCDC3:
628 range = pmic->dcdc3_range;
629 break;
630 case TPS65912_REG_DCDC4:
631 range = pmic->dcdc4_range;
632 break;
633 default:
634 return -EINVAL;
635 }
636
637 switch (range) {
638 case 0:
639 /* 0.5 - 1.2875V in 12.5mV steps */
640 voltage = tps65912_vsel_to_uv_range0(selector);
641 break;
642 case 1:
643 /* 0.7 - 1.4875V in 12.5mV steps */
644 voltage = tps65912_vsel_to_uv_range1(selector);
645 break;
646 case 2:
647 /* 0.5 - 2.075V in 25mV steps */
648 voltage = tps65912_vsel_to_uv_range2(selector);
649 break;
650 case 3:
651 /* 0.5 - 3.8V in 50mV steps */
652 voltage = tps65912_vsel_to_uv_range3(selector);
653 break;
654 }
655 return voltage;
656}
657
658static int tps65912_list_voltage_ldo(struct regulator_dev *dev,
659 unsigned selector)
660{
661 int ldo = rdev_get_id(dev);
662
663 if (ldo < TPS65912_REG_LDO1 || ldo > TPS65912_REG_LDO10)
664 return -EINVAL;
665
666 return tps65912_vsel_to_uv_ldo(selector);
667}
668
669/* Operations permitted on DCDCx */
670static struct regulator_ops tps65912_ops_dcdc = {
671 .is_enabled = tps65912_reg_is_enabled,
672 .enable = tps65912_reg_enable,
673 .disable = tps65912_reg_disable,
674 .set_mode = tps65912_set_mode,
675 .get_mode = tps65912_get_mode,
676 .get_voltage = tps65912_get_voltage_dcdc,
677 .set_voltage_sel = tps65912_set_voltage_dcdc,
678 .list_voltage = tps65912_list_voltage_dcdc,
679};
680
681/* Operations permitted on LDOx */
682static struct regulator_ops tps65912_ops_ldo = {
683 .is_enabled = tps65912_reg_is_enabled,
684 .enable = tps65912_reg_enable,
685 .disable = tps65912_reg_disable,
686 .get_voltage = tps65912_get_voltage_ldo,
687 .set_voltage_sel = tps65912_set_voltage_ldo,
688 .list_voltage = tps65912_list_voltage_ldo,
689};
690
691static __devinit int tps65912_probe(struct platform_device *pdev)
692{
693 struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent);
694 struct tps_info *info;
695 struct regulator_init_data *reg_data;
696 struct regulator_dev *rdev;
697 struct tps65912_reg *pmic;
698 struct tps65912_board *pmic_plat_data;
699 int i, err;
700
701 pmic_plat_data = dev_get_platdata(tps65912->dev);
702 if (!pmic_plat_data)
703 return -EINVAL;
704
705 reg_data = pmic_plat_data->tps65912_pmic_init_data;
706
707 pmic = kzalloc(sizeof(*pmic), GFP_KERNEL);
708 if (!pmic)
709 return -ENOMEM;
710
711 mutex_init(&pmic->io_lock);
712 pmic->mfd = tps65912;
713 platform_set_drvdata(pdev, pmic);
714
715 pmic->get_ctrl_reg = &tps65912_get_ctrl_register;
716 info = tps65912_regs;
717
718 for (i = 0; i < TPS65912_NUM_REGULATOR; i++, info++, reg_data++) {
719 int range = 0;
720 /* Register the regulators */
721 pmic->info[i] = info;
722
723 pmic->desc[i].name = info->name;
724 pmic->desc[i].id = i;
725 pmic->desc[i].n_voltages = 64;
726 pmic->desc[i].ops = (i > TPS65912_REG_DCDC4 ?
727 &tps65912_ops_ldo : &tps65912_ops_dcdc);
728 pmic->desc[i].type = REGULATOR_VOLTAGE;
729 pmic->desc[i].owner = THIS_MODULE;
730 range = tps65912_get_range(pmic, i);
731 rdev = regulator_register(&pmic->desc[i],
732 tps65912->dev, reg_data, pmic);
733 if (IS_ERR(rdev)) {
734 dev_err(tps65912->dev,
735 "failed to register %s regulator\n",
736 pdev->name);
737 err = PTR_ERR(rdev);
738 goto err;
739 }
740
741 /* Save regulator for cleanup */
742 pmic->rdev[i] = rdev;
743 }
744 return 0;
745
746err:
747 while (--i >= 0)
748 regulator_unregister(pmic->rdev[i]);
749
750 kfree(pmic);
751 return err;
752}
753
754static int __devexit tps65912_remove(struct platform_device *pdev)
755{
756 struct tps65912_reg *tps65912_reg = platform_get_drvdata(pdev);
757 int i;
758
759 for (i = 0; i < TPS65912_NUM_REGULATOR; i++)
760 regulator_unregister(tps65912_reg->rdev[i]);
761
762 kfree(tps65912_reg);
763 return 0;
764}
765
766static struct platform_driver tps65912_driver = {
767 .driver = {
768 .name = "tps65912-pmic",
769 .owner = THIS_MODULE,
770 },
771 .probe = tps65912_probe,
772 .remove = __devexit_p(tps65912_remove),
773};
774
775/**
776 * tps65912_init
777 *
778 * Module init function
779 */
780static int __init tps65912_init(void)
781{
782 return platform_driver_register(&tps65912_driver);
783}
784subsys_initcall(tps65912_init);
785
786/**
787 * tps65912_cleanup
788 *
789 * Module exit function
790 */
791static void __exit tps65912_cleanup(void)
792{
793 platform_driver_unregister(&tps65912_driver);
794}
795module_exit(tps65912_cleanup);
796
797MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>");
798MODULE_DESCRIPTION("TPS65912 voltage regulator driver");
799MODULE_LICENSE("GPL v2");
800MODULE_ALIAS("platform:tps65912-pmic");
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index 1e54b8b7f698..69407e72aac1 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -335,6 +335,13 @@ config BACKLIGHT_PCF50633
335 If you have a backlight driven by a NXP PCF50633 MFD, say Y here to 335 If you have a backlight driven by a NXP PCF50633 MFD, say Y here to
336 enable its driver. 336 enable its driver.
337 337
338config BACKLIGHT_AAT2870
339 bool "AnalogicTech AAT2870 Backlight"
340 depends on BACKLIGHT_CLASS_DEVICE && MFD_AAT2870_CORE
341 help
342 If you have a AnalogicTech AAT2870 say Y to enable the
343 backlight driver.
344
338endif # BACKLIGHT_CLASS_DEVICE 345endif # BACKLIGHT_CLASS_DEVICE
339 346
340endif # BACKLIGHT_LCD_SUPPORT 347endif # BACKLIGHT_LCD_SUPPORT
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
index bf1dd92b7527..fdd1fc4b2770 100644
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -38,4 +38,5 @@ obj-$(CONFIG_BACKLIGHT_ADP8860) += adp8860_bl.o
38obj-$(CONFIG_BACKLIGHT_ADP8870) += adp8870_bl.o 38obj-$(CONFIG_BACKLIGHT_ADP8870) += adp8870_bl.o
39obj-$(CONFIG_BACKLIGHT_88PM860X) += 88pm860x_bl.o 39obj-$(CONFIG_BACKLIGHT_88PM860X) += 88pm860x_bl.o
40obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o 40obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o
41obj-$(CONFIG_BACKLIGHT_AAT2870) += aat2870_bl.o
41 42
diff --git a/drivers/video/backlight/aat2870_bl.c b/drivers/video/backlight/aat2870_bl.c
new file mode 100644
index 000000000000..4952a617563d
--- /dev/null
+++ b/drivers/video/backlight/aat2870_bl.c
@@ -0,0 +1,246 @@
1/*
2 * linux/drivers/video/backlight/aat2870_bl.c
3 *
4 * Copyright (c) 2011, NVIDIA Corporation.
5 * Author: Jin Park <jinyoungp@nvidia.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 */
21
22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/platform_device.h>
26#include <linux/mutex.h>
27#include <linux/delay.h>
28#include <linux/fb.h>
29#include <linux/backlight.h>
30#include <linux/mfd/aat2870.h>
31
32struct aat2870_bl_driver_data {
33 struct platform_device *pdev;
34 struct backlight_device *bd;
35
36 int channels;
37 int max_current;
38 int brightness; /* current brightness */
39};
40
41static inline int aat2870_brightness(struct aat2870_bl_driver_data *aat2870_bl,
42 int brightness)
43{
44 struct backlight_device *bd = aat2870_bl->bd;
45 int val;
46
47 val = brightness * aat2870_bl->max_current;
48 val /= bd->props.max_brightness;
49
50 return val;
51}
52
53static inline int aat2870_bl_enable(struct aat2870_bl_driver_data *aat2870_bl)
54{
55 struct aat2870_data *aat2870
56 = dev_get_drvdata(aat2870_bl->pdev->dev.parent);
57
58 return aat2870->write(aat2870, AAT2870_BL_CH_EN,
59 (u8)aat2870_bl->channels);
60}
61
62static inline int aat2870_bl_disable(struct aat2870_bl_driver_data *aat2870_bl)
63{
64 struct aat2870_data *aat2870
65 = dev_get_drvdata(aat2870_bl->pdev->dev.parent);
66
67 return aat2870->write(aat2870, AAT2870_BL_CH_EN, 0x0);
68}
69
70static int aat2870_bl_get_brightness(struct backlight_device *bd)
71{
72 return bd->props.brightness;
73}
74
75static int aat2870_bl_update_status(struct backlight_device *bd)
76{
77 struct aat2870_bl_driver_data *aat2870_bl = dev_get_drvdata(&bd->dev);
78 struct aat2870_data *aat2870 =
79 dev_get_drvdata(aat2870_bl->pdev->dev.parent);
80 int brightness = bd->props.brightness;
81 int ret;
82
83 if ((brightness < 0) || (bd->props.max_brightness < brightness)) {
84 dev_err(&bd->dev, "invalid brightness, %d\n", brightness);
85 return -EINVAL;
86 }
87
88 dev_dbg(&bd->dev, "brightness=%d, power=%d, state=%d\n",
89 bd->props.brightness, bd->props.power, bd->props.state);
90
91 if ((bd->props.power != FB_BLANK_UNBLANK) ||
92 (bd->props.state & BL_CORE_FBBLANK) ||
93 (bd->props.state & BL_CORE_SUSPENDED))
94 brightness = 0;
95
96 ret = aat2870->write(aat2870, AAT2870_BLM,
97 (u8)aat2870_brightness(aat2870_bl, brightness));
98 if (ret < 0)
99 return ret;
100
101 if (brightness == 0) {
102 ret = aat2870_bl_disable(aat2870_bl);
103 if (ret < 0)
104 return ret;
105 } else if (aat2870_bl->brightness == 0) {
106 ret = aat2870_bl_enable(aat2870_bl);
107 if (ret < 0)
108 return ret;
109 }
110
111 aat2870_bl->brightness = brightness;
112
113 return 0;
114}
115
116static int aat2870_bl_check_fb(struct backlight_device *bd, struct fb_info *fi)
117{
118 return 1;
119}
120
121static const struct backlight_ops aat2870_bl_ops = {
122 .options = BL_CORE_SUSPENDRESUME,
123 .get_brightness = aat2870_bl_get_brightness,
124 .update_status = aat2870_bl_update_status,
125 .check_fb = aat2870_bl_check_fb,
126};
127
128static int aat2870_bl_probe(struct platform_device *pdev)
129{
130 struct aat2870_bl_platform_data *pdata = pdev->dev.platform_data;
131 struct aat2870_bl_driver_data *aat2870_bl;
132 struct backlight_device *bd;
133 struct backlight_properties props;
134 int ret = 0;
135
136 if (!pdata) {
137 dev_err(&pdev->dev, "No platform data\n");
138 ret = -ENXIO;
139 goto out;
140 }
141
142 if (pdev->id != AAT2870_ID_BL) {
143 dev_err(&pdev->dev, "Invalid device ID, %d\n", pdev->id);
144 ret = -EINVAL;
145 goto out;
146 }
147
148 aat2870_bl = kzalloc(sizeof(struct aat2870_bl_driver_data), GFP_KERNEL);
149 if (!aat2870_bl) {
150 dev_err(&pdev->dev,
151 "Failed to allocate memory for aat2870 backlight\n");
152 ret = -ENOMEM;
153 goto out;
154 }
155
156 memset(&props, 0, sizeof(struct backlight_properties));
157
158 props.type = BACKLIGHT_RAW;
159 bd = backlight_device_register("aat2870-backlight", &pdev->dev,
160 aat2870_bl, &aat2870_bl_ops, &props);
161 if (!bd) {
162 dev_err(&pdev->dev,
163 "Failed allocate memory for backlight device\n");
164 ret = -ENOMEM;
165 goto out_kfree;
166 }
167
168 aat2870_bl->pdev = pdev;
169 platform_set_drvdata(pdev, aat2870_bl);
170
171 aat2870_bl->bd = bd;
172
173 if (pdata->channels > 0)
174 aat2870_bl->channels = pdata->channels;
175 else
176 aat2870_bl->channels = AAT2870_BL_CH_ALL;
177
178 if (pdata->max_brightness > 0)
179 aat2870_bl->max_current = pdata->max_current;
180 else
181 aat2870_bl->max_current = AAT2870_CURRENT_27_9;
182
183 if (pdata->max_brightness > 0)
184 bd->props.max_brightness = pdata->max_brightness;
185 else
186 bd->props.max_brightness = 255;
187
188 aat2870_bl->brightness = 0;
189 bd->props.power = FB_BLANK_UNBLANK;
190 bd->props.brightness = bd->props.max_brightness;
191
192 ret = aat2870_bl_update_status(bd);
193 if (ret < 0) {
194 dev_err(&pdev->dev, "Failed to initialize\n");
195 goto out_bl_dev_unregister;
196 }
197
198 return 0;
199
200out_bl_dev_unregister:
201 backlight_device_unregister(bd);
202out_kfree:
203 kfree(aat2870_bl);
204out:
205 return ret;
206}
207
208static int aat2870_bl_remove(struct platform_device *pdev)
209{
210 struct aat2870_bl_driver_data *aat2870_bl = platform_get_drvdata(pdev);
211 struct backlight_device *bd = aat2870_bl->bd;
212
213 bd->props.power = FB_BLANK_POWERDOWN;
214 bd->props.brightness = 0;
215 backlight_update_status(bd);
216
217 backlight_device_unregister(bd);
218 kfree(aat2870_bl);
219
220 return 0;
221}
222
223static struct platform_driver aat2870_bl_driver = {
224 .driver = {
225 .name = "aat2870-backlight",
226 .owner = THIS_MODULE,
227 },
228 .probe = aat2870_bl_probe,
229 .remove = aat2870_bl_remove,
230};
231
232static int __init aat2870_bl_init(void)
233{
234 return platform_driver_register(&aat2870_bl_driver);
235}
236subsys_initcall(aat2870_bl_init);
237
238static void __exit aat2870_bl_exit(void)
239{
240 platform_driver_unregister(&aat2870_bl_driver);
241}
242module_exit(aat2870_bl_exit);
243
244MODULE_DESCRIPTION("AnalogicTech AAT2870 Backlight");
245MODULE_LICENSE("GPL");
246MODULE_AUTHOR("Jin Park <jinyoungp@nvidia.com>");
diff --git a/include/linux/mfd/aat2870.h b/include/linux/mfd/aat2870.h
new file mode 100644
index 000000000000..89212df05622
--- /dev/null
+++ b/include/linux/mfd/aat2870.h
@@ -0,0 +1,181 @@
1/*
2 * linux/include/linux/mfd/aat2870.h
3 *
4 * Copyright (c) 2011, NVIDIA Corporation.
5 * Author: Jin Park <jinyoungp@nvidia.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 */
21
22#ifndef __LINUX_MFD_AAT2870_H
23#define __LINUX_MFD_AAT2870_H
24
25#include <linux/debugfs.h>
26#include <linux/i2c.h>
27
28/* Register offsets */
29#define AAT2870_BL_CH_EN 0x00
30#define AAT2870_BLM 0x01
31#define AAT2870_BLS 0x02
32#define AAT2870_BL1 0x03
33#define AAT2870_BL2 0x04
34#define AAT2870_BL3 0x05
35#define AAT2870_BL4 0x06
36#define AAT2870_BL5 0x07
37#define AAT2870_BL6 0x08
38#define AAT2870_BL7 0x09
39#define AAT2870_BL8 0x0A
40#define AAT2870_FLR 0x0B
41#define AAT2870_FM 0x0C
42#define AAT2870_FS 0x0D
43#define AAT2870_ALS_CFG0 0x0E
44#define AAT2870_ALS_CFG1 0x0F
45#define AAT2870_ALS_CFG2 0x10
46#define AAT2870_AMB 0x11
47#define AAT2870_ALS0 0x12
48#define AAT2870_ALS1 0x13
49#define AAT2870_ALS2 0x14
50#define AAT2870_ALS3 0x15
51#define AAT2870_ALS4 0x16
52#define AAT2870_ALS5 0x17
53#define AAT2870_ALS6 0x18
54#define AAT2870_ALS7 0x19
55#define AAT2870_ALS8 0x1A
56#define AAT2870_ALS9 0x1B
57#define AAT2870_ALSA 0x1C
58#define AAT2870_ALSB 0x1D
59#define AAT2870_ALSC 0x1E
60#define AAT2870_ALSD 0x1F
61#define AAT2870_ALSE 0x20
62#define AAT2870_ALSF 0x21
63#define AAT2870_SUB_SET 0x22
64#define AAT2870_SUB_CTRL 0x23
65#define AAT2870_LDO_AB 0x24
66#define AAT2870_LDO_CD 0x25
67#define AAT2870_LDO_EN 0x26
68#define AAT2870_REG_NUM 0x27
69
70/* Device IDs */
71enum aat2870_id {
72 AAT2870_ID_BL,
73 AAT2870_ID_LDOA,
74 AAT2870_ID_LDOB,
75 AAT2870_ID_LDOC,
76 AAT2870_ID_LDOD
77};
78
79/* Backlight channels */
80#define AAT2870_BL_CH1 0x01
81#define AAT2870_BL_CH2 0x02
82#define AAT2870_BL_CH3 0x04
83#define AAT2870_BL_CH4 0x08
84#define AAT2870_BL_CH5 0x10
85#define AAT2870_BL_CH6 0x20
86#define AAT2870_BL_CH7 0x40
87#define AAT2870_BL_CH8 0x80
88#define AAT2870_BL_CH_ALL 0xFF
89
90/* Backlight current magnitude (mA) */
91enum aat2870_current {
92 AAT2870_CURRENT_0_45,
93 AAT2870_CURRENT_0_90,
94 AAT2870_CURRENT_1_80,
95 AAT2870_CURRENT_2_70,
96 AAT2870_CURRENT_3_60,
97 AAT2870_CURRENT_4_50,
98 AAT2870_CURRENT_5_40,
99 AAT2870_CURRENT_6_30,
100 AAT2870_CURRENT_7_20,
101 AAT2870_CURRENT_8_10,
102 AAT2870_CURRENT_9_00,
103 AAT2870_CURRENT_9_90,
104 AAT2870_CURRENT_10_8,
105 AAT2870_CURRENT_11_7,
106 AAT2870_CURRENT_12_6,
107 AAT2870_CURRENT_13_5,
108 AAT2870_CURRENT_14_4,
109 AAT2870_CURRENT_15_3,
110 AAT2870_CURRENT_16_2,
111 AAT2870_CURRENT_17_1,
112 AAT2870_CURRENT_18_0,
113 AAT2870_CURRENT_18_9,
114 AAT2870_CURRENT_19_8,
115 AAT2870_CURRENT_20_7,
116 AAT2870_CURRENT_21_6,
117 AAT2870_CURRENT_22_5,
118 AAT2870_CURRENT_23_4,
119 AAT2870_CURRENT_24_3,
120 AAT2870_CURRENT_25_2,
121 AAT2870_CURRENT_26_1,
122 AAT2870_CURRENT_27_0,
123 AAT2870_CURRENT_27_9
124};
125
126struct aat2870_register {
127 bool readable;
128 bool writeable;
129 u8 value;
130};
131
132struct aat2870_data {
133 struct device *dev;
134 struct i2c_client *client;
135
136 struct mutex io_lock;
137 struct aat2870_register *reg_cache; /* register cache */
138 int en_pin; /* enable GPIO pin (if < 0, ignore this value) */
139 bool is_enable;
140
141 /* init and uninit for platform specified */
142 int (*init)(struct aat2870_data *aat2870);
143 void (*uninit)(struct aat2870_data *aat2870);
144
145 /* i2c io funcntions */
146 int (*read)(struct aat2870_data *aat2870, u8 addr, u8 *val);
147 int (*write)(struct aat2870_data *aat2870, u8 addr, u8 val);
148 int (*update)(struct aat2870_data *aat2870, u8 addr, u8 mask, u8 val);
149
150 /* for debugfs */
151 struct dentry *dentry_root;
152 struct dentry *dentry_reg;
153};
154
155struct aat2870_subdev_info {
156 int id;
157 const char *name;
158 void *platform_data;
159};
160
161struct aat2870_platform_data {
162 int en_pin; /* enable GPIO pin (if < 0, ignore this value) */
163
164 struct aat2870_subdev_info *subdevs;
165 int num_subdevs;
166
167 /* init and uninit for platform specified */
168 int (*init)(struct aat2870_data *aat2870);
169 void (*uninit)(struct aat2870_data *aat2870);
170};
171
172struct aat2870_bl_platform_data {
173 /* backlight channels, default is AAT2870_BL_CH_ALL */
174 int channels;
175 /* backlight current magnitude, default is AAT2870_CURRENT_27_9 */
176 int max_current;
177 /* maximum brightness, default is 255 */
178 int max_brightness;
179};
180
181#endif /* __LINUX_MFD_AAT2870_H */
diff --git a/include/linux/mfd/ab8500.h b/include/linux/mfd/ab8500.h
index b31843075198..838c6b487cc5 100644
--- a/include/linux/mfd/ab8500.h
+++ b/include/linux/mfd/ab8500.h
@@ -28,6 +28,7 @@
28#define AB8500_INTERRUPT 0xE 28#define AB8500_INTERRUPT 0xE
29#define AB8500_RTC 0xF 29#define AB8500_RTC 0xF
30#define AB8500_MISC 0x10 30#define AB8500_MISC 0x10
31#define AB8500_DEVELOPMENT 0x11
31#define AB8500_DEBUG 0x12 32#define AB8500_DEBUG 0x12
32#define AB8500_PROD_TEST 0x13 33#define AB8500_PROD_TEST 0x13
33#define AB8500_OTP_EMUL 0x15 34#define AB8500_OTP_EMUL 0x15
@@ -74,13 +75,6 @@
74#define AB8500_INT_ACC_DETECT_21DB_F 37 75#define AB8500_INT_ACC_DETECT_21DB_F 37
75#define AB8500_INT_ACC_DETECT_21DB_R 38 76#define AB8500_INT_ACC_DETECT_21DB_R 38
76#define AB8500_INT_GP_SW_ADC_CONV_END 39 77#define AB8500_INT_GP_SW_ADC_CONV_END 39
77#define AB8500_INT_ACC_DETECT_1DB_F 33
78#define AB8500_INT_ACC_DETECT_1DB_R 34
79#define AB8500_INT_ACC_DETECT_22DB_F 35
80#define AB8500_INT_ACC_DETECT_22DB_R 36
81#define AB8500_INT_ACC_DETECT_21DB_F 37
82#define AB8500_INT_ACC_DETECT_21DB_R 38
83#define AB8500_INT_GP_SW_ADC_CONV_END 39
84#define AB8500_INT_GPIO6R 40 78#define AB8500_INT_GPIO6R 40
85#define AB8500_INT_GPIO7R 41 79#define AB8500_INT_GPIO7R 41
86#define AB8500_INT_GPIO8R 42 80#define AB8500_INT_GPIO8R 42
diff --git a/include/linux/mfd/stmpe.h b/include/linux/mfd/stmpe.h
index e762c270d8d4..be1af7c42e57 100644
--- a/include/linux/mfd/stmpe.h
+++ b/include/linux/mfd/stmpe.h
@@ -57,6 +57,7 @@ struct stmpe_variant_info;
57 * @irq_lock: IRQ bus lock 57 * @irq_lock: IRQ bus lock
58 * @dev: device, mostly for dev_dbg() 58 * @dev: device, mostly for dev_dbg()
59 * @i2c: i2c client 59 * @i2c: i2c client
60 * @partnum: part number
60 * @variant: the detected STMPE model number 61 * @variant: the detected STMPE model number
61 * @regs: list of addresses of registers which are at different addresses on 62 * @regs: list of addresses of registers which are at different addresses on
62 * different variants. Indexed by one of STMPE_IDX_*. 63 * different variants. Indexed by one of STMPE_IDX_*.
@@ -121,6 +122,8 @@ struct stmpe_keypad_platform_data {
121 * @norequest_mask: bitmask specifying which GPIOs should _not_ be 122 * @norequest_mask: bitmask specifying which GPIOs should _not_ be
122 * requestable due to different usage (e.g. touch, keypad) 123 * requestable due to different usage (e.g. touch, keypad)
123 * STMPE_GPIO_NOREQ_* macros can be used here. 124 * STMPE_GPIO_NOREQ_* macros can be used here.
125 * @setup: board specific setup callback.
126 * @remove: board specific remove callback
124 */ 127 */
125struct stmpe_gpio_platform_data { 128struct stmpe_gpio_platform_data {
126 int gpio_base; 129 int gpio_base;
diff --git a/include/linux/mfd/tps65910.h b/include/linux/mfd/tps65910.h
index 73572c65d04f..82b4c8801a4f 100644
--- a/include/linux/mfd/tps65910.h
+++ b/include/linux/mfd/tps65910.h
@@ -791,6 +791,7 @@ int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask);
791void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base); 791void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base);
792int tps65910_irq_init(struct tps65910 *tps65910, int irq, 792int tps65910_irq_init(struct tps65910 *tps65910, int irq,
793 struct tps65910_platform_data *pdata); 793 struct tps65910_platform_data *pdata);
794int tps65910_irq_exit(struct tps65910 *tps65910);
794 795
795static inline int tps65910_chip_id(struct tps65910 *tps65910) 796static inline int tps65910_chip_id(struct tps65910 *tps65910)
796{ 797{
diff --git a/include/linux/mfd/tps65912.h b/include/linux/mfd/tps65912.h
new file mode 100644
index 000000000000..aaceab402ec5
--- /dev/null
+++ b/include/linux/mfd/tps65912.h
@@ -0,0 +1,327 @@
1/*
2 * tps65912.h -- TI TPS6591x
3 *
4 * Copyright 2011 Texas Instruments Inc.
5 *
6 * Author: Margarita Olaya <magi@slimlogic.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __LINUX_MFD_TPS65912_H
16#define __LINUX_MFD_TPS65912_H
17
18/* TPS regulator type list */
19#define REGULATOR_LDO 0
20#define REGULATOR_DCDC 1
21
22/*
23 * List of registers for TPS65912
24 */
25
26#define TPS65912_DCDC1_CTRL 0x00
27#define TPS65912_DCDC2_CTRL 0x01
28#define TPS65912_DCDC3_CTRL 0x02
29#define TPS65912_DCDC4_CTRL 0x03
30#define TPS65912_DCDC1_OP 0x04
31#define TPS65912_DCDC1_AVS 0x05
32#define TPS65912_DCDC1_LIMIT 0x06
33#define TPS65912_DCDC2_OP 0x07
34#define TPS65912_DCDC2_AVS 0x08
35#define TPS65912_DCDC2_LIMIT 0x09
36#define TPS65912_DCDC3_OP 0x0A
37#define TPS65912_DCDC3_AVS 0x0B
38#define TPS65912_DCDC3_LIMIT 0x0C
39#define TPS65912_DCDC4_OP 0x0D
40#define TPS65912_DCDC4_AVS 0x0E
41#define TPS65912_DCDC4_LIMIT 0x0F
42#define TPS65912_LDO1_OP 0x10
43#define TPS65912_LDO1_AVS 0x11
44#define TPS65912_LDO1_LIMIT 0x12
45#define TPS65912_LDO2_OP 0x13
46#define TPS65912_LDO2_AVS 0x14
47#define TPS65912_LDO2_LIMIT 0x15
48#define TPS65912_LDO3_OP 0x16
49#define TPS65912_LDO3_AVS 0x17
50#define TPS65912_LDO3_LIMIT 0x18
51#define TPS65912_LDO4_OP 0x19
52#define TPS65912_LDO4_AVS 0x1A
53#define TPS65912_LDO4_LIMIT 0x1B
54#define TPS65912_LDO5 0x1C
55#define TPS65912_LDO6 0x1D
56#define TPS65912_LDO7 0x1E
57#define TPS65912_LDO8 0x1F
58#define TPS65912_LDO9 0x20
59#define TPS65912_LDO10 0x21
60#define TPS65912_THRM 0x22
61#define TPS65912_CLK32OUT 0x23
62#define TPS65912_DEVCTRL 0x24
63#define TPS65912_DEVCTRL2 0x25
64#define TPS65912_I2C_SPI_CFG 0x26
65#define TPS65912_KEEP_ON 0x27
66#define TPS65912_KEEP_ON2 0x28
67#define TPS65912_SET_OFF1 0x29
68#define TPS65912_SET_OFF2 0x2A
69#define TPS65912_DEF_VOLT 0x2B
70#define TPS65912_DEF_VOLT_MAPPING 0x2C
71#define TPS65912_DISCHARGE 0x2D
72#define TPS65912_DISCHARGE2 0x2E
73#define TPS65912_EN1_SET1 0x2F
74#define TPS65912_EN1_SET2 0x30
75#define TPS65912_EN2_SET1 0x31
76#define TPS65912_EN2_SET2 0x32
77#define TPS65912_EN3_SET1 0x33
78#define TPS65912_EN3_SET2 0x34
79#define TPS65912_EN4_SET1 0x35
80#define TPS65912_EN4_SET2 0x36
81#define TPS65912_PGOOD 0x37
82#define TPS65912_PGOOD2 0x38
83#define TPS65912_INT_STS 0x39
84#define TPS65912_INT_MSK 0x3A
85#define TPS65912_INT_STS2 0x3B
86#define TPS65912_INT_MSK2 0x3C
87#define TPS65912_INT_STS3 0x3D
88#define TPS65912_INT_MSK3 0x3E
89#define TPS65912_INT_STS4 0x3F
90#define TPS65912_INT_MSK4 0x40
91#define TPS65912_GPIO1 0x41
92#define TPS65912_GPIO2 0x42
93#define TPS65912_GPIO3 0x43
94#define TPS65912_GPIO4 0x44
95#define TPS65912_GPIO5 0x45
96#define TPS65912_VMON 0x46
97#define TPS65912_LEDA_CTRL1 0x47
98#define TPS65912_LEDA_CTRL2 0x48
99#define TPS65912_LEDA_CTRL3 0x49
100#define TPS65912_LEDA_CTRL4 0x4A
101#define TPS65912_LEDA_CTRL5 0x4B
102#define TPS65912_LEDA_CTRL6 0x4C
103#define TPS65912_LEDA_CTRL7 0x4D
104#define TPS65912_LEDA_CTRL8 0x4E
105#define TPS65912_LEDB_CTRL1 0x4F
106#define TPS65912_LEDB_CTRL2 0x50
107#define TPS65912_LEDB_CTRL3 0x51
108#define TPS65912_LEDB_CTRL4 0x52
109#define TPS65912_LEDB_CTRL5 0x53
110#define TPS65912_LEDB_CTRL6 0x54
111#define TPS65912_LEDB_CTRL7 0x55
112#define TPS65912_LEDB_CTRL8 0x56
113#define TPS65912_LEDC_CTRL1 0x57
114#define TPS65912_LEDC_CTRL2 0x58
115#define TPS65912_LEDC_CTRL3 0x59
116#define TPS65912_LEDC_CTRL4 0x5A
117#define TPS65912_LEDC_CTRL5 0x5B
118#define TPS65912_LEDC_CTRL6 0x5C
119#define TPS65912_LEDC_CTRL7 0x5D
120#define TPS65912_LEDC_CTRL8 0x5E
121#define TPS65912_LED_RAMP_UP_TIME 0x5F
122#define TPS65912_LED_RAMP_DOWN_TIME 0x60
123#define TPS65912_LED_SEQ_EN 0x61
124#define TPS65912_LOADSWITCH 0x62
125#define TPS65912_SPARE 0x63
126#define TPS65912_VERNUM 0x64
127#define TPS6591X_MAX_REGISTER 0x64
128
129/* IRQ Definitions */
130#define TPS65912_IRQ_PWRHOLD_F 0
131#define TPS65912_IRQ_VMON 1
132#define TPS65912_IRQ_PWRON 2
133#define TPS65912_IRQ_PWRON_LP 3
134#define TPS65912_IRQ_PWRHOLD_R 4
135#define TPS65912_IRQ_HOTDIE 5
136#define TPS65912_IRQ_GPIO1_R 6
137#define TPS65912_IRQ_GPIO1_F 7
138#define TPS65912_IRQ_GPIO2_R 8
139#define TPS65912_IRQ_GPIO2_F 9
140#define TPS65912_IRQ_GPIO3_R 10
141#define TPS65912_IRQ_GPIO3_F 11
142#define TPS65912_IRQ_GPIO4_R 12
143#define TPS65912_IRQ_GPIO4_F 13
144#define TPS65912_IRQ_GPIO5_R 14
145#define TPS65912_IRQ_GPIO5_F 15
146#define TPS65912_IRQ_PGOOD_DCDC1 16
147#define TPS65912_IRQ_PGOOD_DCDC2 17
148#define TPS65912_IRQ_PGOOD_DCDC3 18
149#define TPS65912_IRQ_PGOOD_DCDC4 19
150#define TPS65912_IRQ_PGOOD_LDO1 20
151#define TPS65912_IRQ_PGOOD_LDO2 21
152#define TPS65912_IRQ_PGOOD_LDO3 22
153#define TPS65912_IRQ_PGOOD_LDO4 23
154#define TPS65912_IRQ_PGOOD_LDO5 24
155#define TPS65912_IRQ_PGOOD_LDO6 25
156#define TPS65912_IRQ_PGOOD_LDO7 26
157#define TPS65912_IRQ_PGOOD_LD08 27
158#define TPS65912_IRQ_PGOOD_LDO9 28
159#define TPS65912_IRQ_PGOOD_LDO10 29
160
161#define TPS65912_NUM_IRQ 30
162
163/* GPIO 1 and 2 Register Definitions */
164#define GPIO_SLEEP_MASK 0x80
165#define GPIO_SLEEP_SHIFT 7
166#define GPIO_DEB_MASK 0x10
167#define GPIO_DEB_SHIFT 4
168#define GPIO_CFG_MASK 0x04
169#define GPIO_CFG_SHIFT 2
170#define GPIO_STS_MASK 0x02
171#define GPIO_STS_SHIFT 1
172#define GPIO_SET_MASK 0x01
173#define GPIO_SET_SHIFT 0
174
175/* GPIO 3 Register Definitions */
176#define GPIO3_SLEEP_MASK 0x80
177#define GPIO3_SLEEP_SHIFT 7
178#define GPIO3_SEL_MASK 0x40
179#define GPIO3_SEL_SHIFT 6
180#define GPIO3_ODEN_MASK 0x20
181#define GPIO3_ODEN_SHIFT 5
182#define GPIO3_DEB_MASK 0x10
183#define GPIO3_DEB_SHIFT 4
184#define GPIO3_PDEN_MASK 0x08
185#define GPIO3_PDEN_SHIFT 3
186#define GPIO3_CFG_MASK 0x04
187#define GPIO3_CFG_SHIFT 2
188#define GPIO3_STS_MASK 0x02
189#define GPIO3_STS_SHIFT 1
190#define GPIO3_SET_MASK 0x01
191#define GPIO3_SET_SHIFT 0
192
193/* GPIO 4 Register Definitions */
194#define GPIO4_SLEEP_MASK 0x80
195#define GPIO4_SLEEP_SHIFT 7
196#define GPIO4_SEL_MASK 0x40
197#define GPIO4_SEL_SHIFT 6
198#define GPIO4_ODEN_MASK 0x20
199#define GPIO4_ODEN_SHIFT 5
200#define GPIO4_DEB_MASK 0x10
201#define GPIO4_DEB_SHIFT 4
202#define GPIO4_PDEN_MASK 0x08
203#define GPIO4_PDEN_SHIFT 3
204#define GPIO4_CFG_MASK 0x04
205#define GPIO4_CFG_SHIFT 2
206#define GPIO4_STS_MASK 0x02
207#define GPIO4_STS_SHIFT 1
208#define GPIO4_SET_MASK 0x01
209#define GPIO4_SET_SHIFT 0
210
211/* Register THERM (0x80) register.RegisterDescription */
212#define THERM_THERM_HD_MASK 0x20
213#define THERM_THERM_HD_SHIFT 5
214#define THERM_THERM_TS_MASK 0x10
215#define THERM_THERM_TS_SHIFT 4
216#define THERM_THERM_HDSEL_MASK 0x0C
217#define THERM_THERM_HDSEL_SHIFT 2
218#define THERM_RSVD1_MASK 0x02
219#define THERM_RSVD1_SHIFT 1
220#define THERM_THERM_STATE_MASK 0x01
221#define THERM_THERM_STATE_SHIFT 0
222
223/* Register DCDCCTRL1 register.RegisterDescription */
224#define DCDCCTRL_VCON_ENABLE_MASK 0x80
225#define DCDCCTRL_VCON_ENABLE_SHIFT 7
226#define DCDCCTRL_VCON_RANGE1_MASK 0x40
227#define DCDCCTRL_VCON_RANGE1_SHIFT 6
228#define DCDCCTRL_VCON_RANGE0_MASK 0x20
229#define DCDCCTRL_VCON_RANGE0_SHIFT 5
230#define DCDCCTRL_TSTEP2_MASK 0x10
231#define DCDCCTRL_TSTEP2_SHIFT 4
232#define DCDCCTRL_TSTEP1_MASK 0x08
233#define DCDCCTRL_TSTEP1_SHIFT 3
234#define DCDCCTRL_TSTEP0_MASK 0x04
235#define DCDCCTRL_TSTEP0_SHIFT 2
236#define DCDCCTRL_DCDC1_MODE_MASK 0x02
237#define DCDCCTRL_DCDC1_MODE_SHIFT 1
238
239/* Register DCDCCTRL2 and DCDCCTRL3 register.RegisterDescription */
240#define DCDCCTRL_TSTEP2_MASK 0x10
241#define DCDCCTRL_TSTEP2_SHIFT 4
242#define DCDCCTRL_TSTEP1_MASK 0x08
243#define DCDCCTRL_TSTEP1_SHIFT 3
244#define DCDCCTRL_TSTEP0_MASK 0x04
245#define DCDCCTRL_TSTEP0_SHIFT 2
246#define DCDCCTRL_DCDC_MODE_MASK 0x02
247#define DCDCCTRL_DCDC_MODE_SHIFT 1
248#define DCDCCTRL_RSVD0_MASK 0x01
249#define DCDCCTRL_RSVD0_SHIFT 0
250
251/* Register DCDCCTRL4 register.RegisterDescription */
252#define DCDCCTRL_RAMP_TIME_MASK 0x01
253#define DCDCCTRL_RAMP_TIME_SHIFT 0
254
255/* Register DCDCx_AVS */
256#define DCDC_AVS_ENABLE_MASK 0x80
257#define DCDC_AVS_ENABLE_SHIFT 7
258#define DCDC_AVS_ECO_MASK 0x40
259#define DCDC_AVS_ECO_SHIFT 6
260
261/* Register DCDCx_LIMIT */
262#define DCDC_LIMIT_RANGE_MASK 0xC0
263#define DCDC_LIMIT_RANGE_SHIFT 6
264#define DCDC_LIMIT_MAX_SEL_MASK 0x3F
265#define DCDC_LIMIT_MAX_SEL_SHIFT 0
266
267/**
268 * struct tps65912_board
269 * Board platform dat may be used to initialize regulators.
270 */
271struct tps65912_board {
272 int is_dcdc1_avs;
273 int is_dcdc2_avs;
274 int is_dcdc3_avs;
275 int is_dcdc4_avs;
276 int irq;
277 int irq_base;
278 int gpio_base;
279 struct regulator_init_data *tps65912_pmic_init_data;
280};
281
282/**
283 * struct tps65912 - tps65912 sub-driver chip access routines
284 */
285
286struct tps65912 {
287 struct device *dev;
288 /* for read/write acces */
289 struct mutex io_mutex;
290
291 /* For device IO interfaces: I2C or SPI */
292 void *control_data;
293
294 int (*read)(struct tps65912 *tps65912, u8 reg, int size, void *dest);
295 int (*write)(struct tps65912 *tps65912, u8 reg, int size, void *src);
296
297 /* Client devices */
298 struct tps65912_pmic *pmic;
299
300 /* GPIO Handling */
301 struct gpio_chip gpio;
302
303 /* IRQ Handling */
304 struct mutex irq_lock;
305 int chip_irq;
306 int irq_base;
307 int irq_num;
308 u32 irq_mask;
309};
310
311struct tps65912_platform_data {
312 int irq;
313 int irq_base;
314};
315
316unsigned int tps_chip(void);
317
318int tps65912_set_bits(struct tps65912 *tps65912, u8 reg, u8 mask);
319int tps65912_clear_bits(struct tps65912 *tps65912, u8 reg, u8 mask);
320int tps65912_reg_read(struct tps65912 *tps65912, u8 reg);
321int tps65912_reg_write(struct tps65912 *tps65912, u8 reg, u8 val);
322int tps65912_device_init(struct tps65912 *tps65912);
323void tps65912_device_exit(struct tps65912 *tps65912);
324int tps65912_irq_init(struct tps65912 *tps65912, int irq,
325 struct tps65912_platform_data *pdata);
326
327#endif /* __LINUX_MFD_TPS65912_H */
diff --git a/include/linux/mfd/wm831x/core.h b/include/linux/mfd/wm831x/core.h
index 0d515ee1c247..8dda8ded5cda 100644
--- a/include/linux/mfd/wm831x/core.h
+++ b/include/linux/mfd/wm831x/core.h
@@ -17,6 +17,7 @@
17 17
18#include <linux/completion.h> 18#include <linux/completion.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/list.h>
20 21
21/* 22/*
22 * Register values. 23 * Register values.
@@ -234,9 +235,111 @@
234#define WM831X_ON_PIN_TO_SHIFT 0 /* ON_PIN_TO - [1:0] */ 235#define WM831X_ON_PIN_TO_SHIFT 0 /* ON_PIN_TO - [1:0] */
235#define WM831X_ON_PIN_TO_WIDTH 2 /* ON_PIN_TO - [1:0] */ 236#define WM831X_ON_PIN_TO_WIDTH 2 /* ON_PIN_TO - [1:0] */
236 237
238/*
239 * R16528 (0x4090) - Clock Control 1
240 */
241#define WM831X_CLKOUT_ENA 0x8000 /* CLKOUT_ENA */
242#define WM831X_CLKOUT_ENA_MASK 0x8000 /* CLKOUT_ENA */
243#define WM831X_CLKOUT_ENA_SHIFT 15 /* CLKOUT_ENA */
244#define WM831X_CLKOUT_ENA_WIDTH 1 /* CLKOUT_ENA */
245#define WM831X_CLKOUT_OD 0x2000 /* CLKOUT_OD */
246#define WM831X_CLKOUT_OD_MASK 0x2000 /* CLKOUT_OD */
247#define WM831X_CLKOUT_OD_SHIFT 13 /* CLKOUT_OD */
248#define WM831X_CLKOUT_OD_WIDTH 1 /* CLKOUT_OD */
249#define WM831X_CLKOUT_SLOT_MASK 0x0700 /* CLKOUT_SLOT - [10:8] */
250#define WM831X_CLKOUT_SLOT_SHIFT 8 /* CLKOUT_SLOT - [10:8] */
251#define WM831X_CLKOUT_SLOT_WIDTH 3 /* CLKOUT_SLOT - [10:8] */
252#define WM831X_CLKOUT_SLPSLOT_MASK 0x0070 /* CLKOUT_SLPSLOT - [6:4] */
253#define WM831X_CLKOUT_SLPSLOT_SHIFT 4 /* CLKOUT_SLPSLOT - [6:4] */
254#define WM831X_CLKOUT_SLPSLOT_WIDTH 3 /* CLKOUT_SLPSLOT - [6:4] */
255#define WM831X_CLKOUT_SRC 0x0001 /* CLKOUT_SRC */
256#define WM831X_CLKOUT_SRC_MASK 0x0001 /* CLKOUT_SRC */
257#define WM831X_CLKOUT_SRC_SHIFT 0 /* CLKOUT_SRC */
258#define WM831X_CLKOUT_SRC_WIDTH 1 /* CLKOUT_SRC */
259
260/*
261 * R16529 (0x4091) - Clock Control 2
262 */
263#define WM831X_XTAL_INH 0x8000 /* XTAL_INH */
264#define WM831X_XTAL_INH_MASK 0x8000 /* XTAL_INH */
265#define WM831X_XTAL_INH_SHIFT 15 /* XTAL_INH */
266#define WM831X_XTAL_INH_WIDTH 1 /* XTAL_INH */
267#define WM831X_XTAL_ENA 0x2000 /* XTAL_ENA */
268#define WM831X_XTAL_ENA_MASK 0x2000 /* XTAL_ENA */
269#define WM831X_XTAL_ENA_SHIFT 13 /* XTAL_ENA */
270#define WM831X_XTAL_ENA_WIDTH 1 /* XTAL_ENA */
271#define WM831X_XTAL_BKUPENA 0x1000 /* XTAL_BKUPENA */
272#define WM831X_XTAL_BKUPENA_MASK 0x1000 /* XTAL_BKUPENA */
273#define WM831X_XTAL_BKUPENA_SHIFT 12 /* XTAL_BKUPENA */
274#define WM831X_XTAL_BKUPENA_WIDTH 1 /* XTAL_BKUPENA */
275#define WM831X_FLL_AUTO 0x0080 /* FLL_AUTO */
276#define WM831X_FLL_AUTO_MASK 0x0080 /* FLL_AUTO */
277#define WM831X_FLL_AUTO_SHIFT 7 /* FLL_AUTO */
278#define WM831X_FLL_AUTO_WIDTH 1 /* FLL_AUTO */
279#define WM831X_FLL_AUTO_FREQ_MASK 0x0007 /* FLL_AUTO_FREQ - [2:0] */
280#define WM831X_FLL_AUTO_FREQ_SHIFT 0 /* FLL_AUTO_FREQ - [2:0] */
281#define WM831X_FLL_AUTO_FREQ_WIDTH 3 /* FLL_AUTO_FREQ - [2:0] */
282
283/*
284 * R16530 (0x4092) - FLL Control 1
285 */
286#define WM831X_FLL_FRAC 0x0004 /* FLL_FRAC */
287#define WM831X_FLL_FRAC_MASK 0x0004 /* FLL_FRAC */
288#define WM831X_FLL_FRAC_SHIFT 2 /* FLL_FRAC */
289#define WM831X_FLL_FRAC_WIDTH 1 /* FLL_FRAC */
290#define WM831X_FLL_OSC_ENA 0x0002 /* FLL_OSC_ENA */
291#define WM831X_FLL_OSC_ENA_MASK 0x0002 /* FLL_OSC_ENA */
292#define WM831X_FLL_OSC_ENA_SHIFT 1 /* FLL_OSC_ENA */
293#define WM831X_FLL_OSC_ENA_WIDTH 1 /* FLL_OSC_ENA */
294#define WM831X_FLL_ENA 0x0001 /* FLL_ENA */
295#define WM831X_FLL_ENA_MASK 0x0001 /* FLL_ENA */
296#define WM831X_FLL_ENA_SHIFT 0 /* FLL_ENA */
297#define WM831X_FLL_ENA_WIDTH 1 /* FLL_ENA */
298
299/*
300 * R16531 (0x4093) - FLL Control 2
301 */
302#define WM831X_FLL_OUTDIV_MASK 0x3F00 /* FLL_OUTDIV - [13:8] */
303#define WM831X_FLL_OUTDIV_SHIFT 8 /* FLL_OUTDIV - [13:8] */
304#define WM831X_FLL_OUTDIV_WIDTH 6 /* FLL_OUTDIV - [13:8] */
305#define WM831X_FLL_CTRL_RATE_MASK 0x0070 /* FLL_CTRL_RATE - [6:4] */
306#define WM831X_FLL_CTRL_RATE_SHIFT 4 /* FLL_CTRL_RATE - [6:4] */
307#define WM831X_FLL_CTRL_RATE_WIDTH 3 /* FLL_CTRL_RATE - [6:4] */
308#define WM831X_FLL_FRATIO_MASK 0x0007 /* FLL_FRATIO - [2:0] */
309#define WM831X_FLL_FRATIO_SHIFT 0 /* FLL_FRATIO - [2:0] */
310#define WM831X_FLL_FRATIO_WIDTH 3 /* FLL_FRATIO - [2:0] */
311
312/*
313 * R16532 (0x4094) - FLL Control 3
314 */
315#define WM831X_FLL_K_MASK 0xFFFF /* FLL_K - [15:0] */
316#define WM831X_FLL_K_SHIFT 0 /* FLL_K - [15:0] */
317#define WM831X_FLL_K_WIDTH 16 /* FLL_K - [15:0] */
318
319/*
320 * R16533 (0x4095) - FLL Control 4
321 */
322#define WM831X_FLL_N_MASK 0x7FE0 /* FLL_N - [14:5] */
323#define WM831X_FLL_N_SHIFT 5 /* FLL_N - [14:5] */
324#define WM831X_FLL_N_WIDTH 10 /* FLL_N - [14:5] */
325#define WM831X_FLL_GAIN_MASK 0x000F /* FLL_GAIN - [3:0] */
326#define WM831X_FLL_GAIN_SHIFT 0 /* FLL_GAIN - [3:0] */
327#define WM831X_FLL_GAIN_WIDTH 4 /* FLL_GAIN - [3:0] */
328
329/*
330 * R16534 (0x4096) - FLL Control 5
331 */
332#define WM831X_FLL_CLK_REF_DIV_MASK 0x0018 /* FLL_CLK_REF_DIV - [4:3] */
333#define WM831X_FLL_CLK_REF_DIV_SHIFT 3 /* FLL_CLK_REF_DIV - [4:3] */
334#define WM831X_FLL_CLK_REF_DIV_WIDTH 2 /* FLL_CLK_REF_DIV - [4:3] */
335#define WM831X_FLL_CLK_SRC_MASK 0x0003 /* FLL_CLK_SRC - [1:0] */
336#define WM831X_FLL_CLK_SRC_SHIFT 0 /* FLL_CLK_SRC - [1:0] */
337#define WM831X_FLL_CLK_SRC_WIDTH 2 /* FLL_CLK_SRC - [1:0] */
338
237struct regulator_dev; 339struct regulator_dev;
238 340
239#define WM831X_NUM_IRQ_REGS 5 341#define WM831X_NUM_IRQ_REGS 5
342#define WM831X_NUM_GPIO_REGS 16
240 343
241enum wm831x_parent { 344enum wm831x_parent {
242 WM8310 = 0x8310, 345 WM8310 = 0x8310,
@@ -248,6 +351,12 @@ enum wm831x_parent {
248 WM8326 = 0x8326, 351 WM8326 = 0x8326,
249}; 352};
250 353
354struct wm831x;
355enum wm831x_auxadc;
356
357typedef int (*wm831x_auxadc_read_fn)(struct wm831x *wm831x,
358 enum wm831x_auxadc input);
359
251struct wm831x { 360struct wm831x {
252 struct mutex io_lock; 361 struct mutex io_lock;
253 362
@@ -261,7 +370,7 @@ struct wm831x {
261 370
262 int irq; /* Our chip IRQ */ 371 int irq; /* Our chip IRQ */
263 struct mutex irq_lock; 372 struct mutex irq_lock;
264 unsigned int irq_base; 373 int irq_base;
265 int irq_masks_cur[WM831X_NUM_IRQ_REGS]; /* Currently active value */ 374 int irq_masks_cur[WM831X_NUM_IRQ_REGS]; /* Currently active value */
266 int irq_masks_cache[WM831X_NUM_IRQ_REGS]; /* Cached hardware value */ 375 int irq_masks_cache[WM831X_NUM_IRQ_REGS]; /* Cached hardware value */
267 376
@@ -272,8 +381,13 @@ struct wm831x {
272 381
273 int num_gpio; 382 int num_gpio;
274 383
384 /* Used by the interrupt controller code to post writes */
385 int gpio_update[WM831X_NUM_GPIO_REGS];
386
275 struct mutex auxadc_lock; 387 struct mutex auxadc_lock;
276 struct completion auxadc_done; 388 struct list_head auxadc_pending;
389 u16 auxadc_active;
390 wm831x_auxadc_read_fn auxadc_read;
277 391
278 /* The WM831x has a security key blocking access to certain 392 /* The WM831x has a security key blocking access to certain
279 * registers. The mutex is taken by the accessors for locking 393 * registers. The mutex is taken by the accessors for locking
@@ -300,5 +414,6 @@ void wm831x_device_exit(struct wm831x *wm831x);
300int wm831x_device_suspend(struct wm831x *wm831x); 414int wm831x_device_suspend(struct wm831x *wm831x);
301int wm831x_irq_init(struct wm831x *wm831x, int irq); 415int wm831x_irq_init(struct wm831x *wm831x, int irq);
302void wm831x_irq_exit(struct wm831x *wm831x); 416void wm831x_irq_exit(struct wm831x *wm831x);
417void wm831x_auxadc_init(struct wm831x *wm831x);
303 418
304#endif 419#endif
diff --git a/include/linux/mfd/wm831x/pdata.h b/include/linux/mfd/wm831x/pdata.h
index ff42d700293f..0ba24599fe51 100644
--- a/include/linux/mfd/wm831x/pdata.h
+++ b/include/linux/mfd/wm831x/pdata.h
@@ -120,6 +120,9 @@ struct wm831x_pdata {
120 /** Put the /IRQ line into CMOS mode */ 120 /** Put the /IRQ line into CMOS mode */
121 bool irq_cmos; 121 bool irq_cmos;
122 122
123 /** Disable the touchscreen */
124 bool disable_touch;
125
123 int irq_base; 126 int irq_base;
124 int gpio_base; 127 int gpio_base;
125 int gpio_defaults[WM831X_GPIO_NUM]; 128 int gpio_defaults[WM831X_GPIO_NUM];