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-rw-r--r--MAINTAINERS8
-rw-r--r--drivers/gpu/drm/armada/armada_drv.c10
-rw-r--r--drivers/gpu/drm/bochs/Kconfig1
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c23
-rw-r--r--drivers/gpu/drm/i915/i915_gem_stolen.c19
-rw-r--r--drivers/gpu/drm/i915/intel_display.c8
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c6
-rw-r--r--drivers/gpu/drm/i915/intel_panel.c4
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c6
-rw-r--r--drivers/gpu/drm/radeon/atombios_encoders.c2
-rw-r--r--drivers/gpu/drm/radeon/cik.c5
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c3
-rw-r--r--drivers/gpu/drm/radeon/evergreen_smc.h2
-rw-r--r--drivers/gpu/drm/radeon/ni.c3
-rw-r--r--drivers/gpu/drm/radeon/r100.c2
-rw-r--r--drivers/gpu/drm/radeon/r300.c2
-rw-r--r--drivers/gpu/drm/radeon/r420.c2
-rw-r--r--drivers/gpu/drm/radeon/r520.c2
-rw-r--r--drivers/gpu/drm/radeon/r600.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c5
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c5
-rw-r--r--drivers/gpu/drm/radeon/rs400.c2
-rw-r--r--drivers/gpu/drm/radeon/rs600.c2
-rw-r--r--drivers/gpu/drm/radeon/rs690.c2
-rw-r--r--drivers/gpu/drm/radeon/rv515.c2
-rw-r--r--drivers/gpu/drm/radeon/rv770.c3
-rw-r--r--drivers/gpu/drm/radeon/si.c3
27 files changed, 70 insertions, 65 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index e1297ff255e1..b7befe758429 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -474,7 +474,7 @@ F: net/rxrpc/af_rxrpc.c
474 474
475AGPGART DRIVER 475AGPGART DRIVER
476M: David Airlie <airlied@linux.ie> 476M: David Airlie <airlied@linux.ie>
477T: git git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6.git 477T: git git://people.freedesktop.org/~airlied/linux (part of drm maint)
478S: Maintained 478S: Maintained
479F: drivers/char/agp/ 479F: drivers/char/agp/
480F: include/linux/agp* 480F: include/linux/agp*
@@ -6175,6 +6175,12 @@ S: Supported
6175F: drivers/block/nvme* 6175F: drivers/block/nvme*
6176F: include/linux/nvme.h 6176F: include/linux/nvme.h
6177 6177
6178NXP TDA998X DRM DRIVER
6179M: Russell King <rmk+kernel@arm.linux.org.uk>
6180S: Supported
6181F: drivers/gpu/drm/i2c/tda998x_drv.c
6182F: include/drm/i2c/tda998x.h
6183
6178OMAP SUPPORT 6184OMAP SUPPORT
6179M: Tony Lindgren <tony@atomide.com> 6185M: Tony Lindgren <tony@atomide.com>
6180L: linux-omap@vger.kernel.org 6186L: linux-omap@vger.kernel.org
diff --git a/drivers/gpu/drm/armada/armada_drv.c b/drivers/gpu/drm/armada/armada_drv.c
index acf3a36c9ebc..32982da82694 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -68,15 +68,7 @@ void __armada_drm_queue_unref_work(struct drm_device *dev,
68{ 68{
69 struct armada_private *priv = dev->dev_private; 69 struct armada_private *priv = dev->dev_private;
70 70
71 /* 71 WARN_ON(!kfifo_put(&priv->fb_unref, fb));
72 * Yes, we really must jump through these hoops just to store a
73 * _pointer_ to something into the kfifo. This is utterly insane
74 * and idiotic, because it kfifo requires the _data_ pointed to by
75 * the pointer const, not the pointer itself. Not only that, but
76 * you have to pass a pointer _to_ the pointer you want stored.
77 */
78 const struct drm_framebuffer *silly_api_alert = fb;
79 WARN_ON(!kfifo_put(&priv->fb_unref, &silly_api_alert));
80 schedule_work(&priv->fb_unref_work); 72 schedule_work(&priv->fb_unref_work);
81} 73}
82 74
diff --git a/drivers/gpu/drm/bochs/Kconfig b/drivers/gpu/drm/bochs/Kconfig
index c8fcf12019f0..5f8b0c2b9a44 100644
--- a/drivers/gpu/drm/bochs/Kconfig
+++ b/drivers/gpu/drm/bochs/Kconfig
@@ -2,6 +2,7 @@ config DRM_BOCHS
2 tristate "DRM Support for bochs dispi vga interface (qemu stdvga)" 2 tristate "DRM Support for bochs dispi vga interface (qemu stdvga)"
3 depends on DRM && PCI 3 depends on DRM && PCI
4 select DRM_KMS_HELPER 4 select DRM_KMS_HELPER
5 select DRM_KMS_FB_HELPER
5 select FB_SYS_FILLRECT 6 select FB_SYS_FILLRECT
6 select FB_SYS_COPYAREA 7 select FB_SYS_COPYAREA
7 select FB_SYS_IMAGEBLIT 8 select FB_SYS_IMAGEBLIT
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 04f1f02c4019..ec7bb0fc71bc 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -403,7 +403,7 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
403void intel_detect_pch(struct drm_device *dev) 403void intel_detect_pch(struct drm_device *dev)
404{ 404{
405 struct drm_i915_private *dev_priv = dev->dev_private; 405 struct drm_i915_private *dev_priv = dev->dev_private;
406 struct pci_dev *pch; 406 struct pci_dev *pch = NULL;
407 407
408 /* In all current cases, num_pipes is equivalent to the PCH_NOP setting 408 /* In all current cases, num_pipes is equivalent to the PCH_NOP setting
409 * (which really amounts to a PCH but no South Display). 409 * (which really amounts to a PCH but no South Display).
@@ -424,12 +424,9 @@ void intel_detect_pch(struct drm_device *dev)
424 * all the ISA bridge devices and check for the first match, instead 424 * all the ISA bridge devices and check for the first match, instead
425 * of only checking the first one. 425 * of only checking the first one.
426 */ 426 */
427 pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL); 427 while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
428 while (pch) {
429 struct pci_dev *curr = pch;
430 if (pch->vendor == PCI_VENDOR_ID_INTEL) { 428 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
431 unsigned short id; 429 unsigned short id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
432 id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
433 dev_priv->pch_id = id; 430 dev_priv->pch_id = id;
434 431
435 if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) { 432 if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
@@ -461,18 +458,16 @@ void intel_detect_pch(struct drm_device *dev)
461 DRM_DEBUG_KMS("Found LynxPoint LP PCH\n"); 458 DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
462 WARN_ON(!IS_HASWELL(dev)); 459 WARN_ON(!IS_HASWELL(dev));
463 WARN_ON(!IS_ULT(dev)); 460 WARN_ON(!IS_ULT(dev));
464 } else { 461 } else
465 goto check_next; 462 continue;
466 } 463
467 pci_dev_put(pch);
468 break; 464 break;
469 } 465 }
470check_next:
471 pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, curr);
472 pci_dev_put(curr);
473 } 466 }
474 if (!pch) 467 if (!pch)
475 DRM_DEBUG_KMS("No PCH found?\n"); 468 DRM_DEBUG_KMS("No PCH found.\n");
469
470 pci_dev_put(pch);
476} 471}
477 472
478bool i915_semaphore_is_enabled(struct drm_device *dev) 473bool i915_semaphore_is_enabled(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
index 1a24e84f2315..d58b4e287e32 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -82,9 +82,22 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
82 r = devm_request_mem_region(dev->dev, base, dev_priv->gtt.stolen_size, 82 r = devm_request_mem_region(dev->dev, base, dev_priv->gtt.stolen_size,
83 "Graphics Stolen Memory"); 83 "Graphics Stolen Memory");
84 if (r == NULL) { 84 if (r == NULL) {
85 DRM_ERROR("conflict detected with stolen region: [0x%08x - 0x%08x]\n", 85 /*
86 base, base + (uint32_t)dev_priv->gtt.stolen_size); 86 * One more attempt but this time requesting region from
87 base = 0; 87 * base + 1, as we have seen that this resolves the region
88 * conflict with the PCI Bus.
89 * This is a BIOS w/a: Some BIOS wrap stolen in the root
90 * PCI bus, but have an off-by-one error. Hence retry the
91 * reservation starting from 1 instead of 0.
92 */
93 r = devm_request_mem_region(dev->dev, base + 1,
94 dev_priv->gtt.stolen_size - 1,
95 "Graphics Stolen Memory");
96 if (r == NULL) {
97 DRM_ERROR("conflict detected with stolen region: [0x%08x - 0x%08x]\n",
98 base, base + (uint32_t)dev_priv->gtt.stolen_size);
99 base = 0;
100 }
88 } 101 }
89 102
90 return base; 103 return base;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4c1672809493..9b8a7c7ea7fc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1092,12 +1092,12 @@ static void assert_cursor(struct drm_i915_private *dev_priv,
1092 struct drm_device *dev = dev_priv->dev; 1092 struct drm_device *dev = dev_priv->dev;
1093 bool cur_state; 1093 bool cur_state;
1094 1094
1095 if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) 1095 if (IS_845G(dev) || IS_I865G(dev))
1096 cur_state = I915_READ(CURCNTR_IVB(pipe)) & CURSOR_MODE;
1097 else if (IS_845G(dev) || IS_I865G(dev))
1098 cur_state = I915_READ(_CURACNTR) & CURSOR_ENABLE; 1096 cur_state = I915_READ(_CURACNTR) & CURSOR_ENABLE;
1099 else 1097 else if (INTEL_INFO(dev)->gen <= 6 || IS_VALLEYVIEW(dev))
1100 cur_state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE; 1098 cur_state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE;
1099 else
1100 cur_state = I915_READ(CURCNTR_IVB(pipe)) & CURSOR_MODE;
1101 1101
1102 WARN(cur_state != state, 1102 WARN(cur_state != state,
1103 "cursor on pipe %c assertion failure (expected %s, current %s)\n", 1103 "cursor on pipe %c assertion failure (expected %s, current %s)\n",
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 6db0d9d17f47..ee3181ebcc92 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -845,7 +845,7 @@ static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
845{ 845{
846 struct drm_device *dev = intel_hdmi_to_dev(hdmi); 846 struct drm_device *dev = intel_hdmi_to_dev(hdmi);
847 847
848 if (IS_G4X(dev)) 848 if (!hdmi->has_hdmi_sink || IS_G4X(dev))
849 return 165000; 849 return 165000;
850 else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) 850 else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8)
851 return 300000; 851 return 300000;
@@ -899,8 +899,8 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
899 * outputs. We also need to check that the higher clock still fits 899 * outputs. We also need to check that the higher clock still fits
900 * within limits. 900 * within limits.
901 */ 901 */
902 if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= portclock_limit 902 if (pipe_config->pipe_bpp > 8*3 && intel_hdmi->has_hdmi_sink &&
903 && HAS_PCH_SPLIT(dev)) { 903 clock_12bpc <= portclock_limit && HAS_PCH_SPLIT(dev)) {
904 DRM_DEBUG_KMS("picking bpc to 12 for HDMI output\n"); 904 DRM_DEBUG_KMS("picking bpc to 12 for HDMI output\n");
905 desired_bpp = 12*3; 905 desired_bpp = 12*3;
906 906
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 350de359123a..079ea38f14d9 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -698,7 +698,7 @@ static void i9xx_enable_backlight(struct intel_connector *connector)
698 freq /= 0xff; 698 freq /= 0xff;
699 699
700 ctl = freq << 17; 700 ctl = freq << 17;
701 if (IS_GEN2(dev) && panel->backlight.combination_mode) 701 if (panel->backlight.combination_mode)
702 ctl |= BLM_LEGACY_MODE; 702 ctl |= BLM_LEGACY_MODE;
703 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm) 703 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
704 ctl |= BLM_POLARITY_PNV; 704 ctl |= BLM_POLARITY_PNV;
@@ -979,7 +979,7 @@ static int i9xx_setup_backlight(struct intel_connector *connector)
979 979
980 ctl = I915_READ(BLC_PWM_CTL); 980 ctl = I915_READ(BLC_PWM_CTL);
981 981
982 if (IS_GEN2(dev)) 982 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
983 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 983 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
984 984
985 if (IS_PINEVIEW(dev)) 985 if (IS_PINEVIEW(dev))
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d77cc81900f9..e1fc35a72656 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3493,6 +3493,8 @@ static void valleyview_setup_pctx(struct drm_device *dev)
3493 u32 pcbr; 3493 u32 pcbr;
3494 int pctx_size = 24*1024; 3494 int pctx_size = 24*1024;
3495 3495
3496 WARN_ON(!mutex_is_locked(&dev->struct_mutex));
3497
3496 pcbr = I915_READ(VLV_PCBR); 3498 pcbr = I915_READ(VLV_PCBR);
3497 if (pcbr) { 3499 if (pcbr) {
3498 /* BIOS set it up already, grab the pre-alloc'd space */ 3500 /* BIOS set it up already, grab the pre-alloc'd space */
@@ -3542,8 +3544,6 @@ static void valleyview_enable_rps(struct drm_device *dev)
3542 I915_WRITE(GTFIFODBG, gtfifodbg); 3544 I915_WRITE(GTFIFODBG, gtfifodbg);
3543 } 3545 }
3544 3546
3545 valleyview_setup_pctx(dev);
3546
3547 /* If VLV, Forcewake all wells, else re-direct to regular path */ 3547 /* If VLV, Forcewake all wells, else re-direct to regular path */
3548 gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL); 3548 gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
3549 3549
@@ -4395,6 +4395,8 @@ void intel_enable_gt_powersave(struct drm_device *dev)
4395 ironlake_enable_rc6(dev); 4395 ironlake_enable_rc6(dev);
4396 intel_init_emon(dev); 4396 intel_init_emon(dev);
4397 } else if (IS_GEN6(dev) || IS_GEN7(dev)) { 4397 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
4398 if (IS_VALLEYVIEW(dev))
4399 valleyview_setup_pctx(dev);
4398 /* 4400 /*
4399 * PCU communication is slow and this doesn't need to be 4401 * PCU communication is slow and this doesn't need to be
4400 * done at any specific time, so do this out of our fast path 4402 * done at any specific time, so do this out of our fast path
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index 2cec2ab02f80..607dc14d195e 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -1314,7 +1314,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
1314 } 1314 }
1315 if (is_dp) 1315 if (is_dp)
1316 args.v5.ucLaneNum = dp_lane_count; 1316 args.v5.ucLaneNum = dp_lane_count;
1317 else if (radeon_encoder->pixel_clock > 165000) 1317 else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock))
1318 args.v5.ucLaneNum = 8; 1318 args.v5.ucLaneNum = 8;
1319 else 1319 else
1320 args.v5.ucLaneNum = 4; 1320 args.v5.ucLaneNum = 4;
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index e6419ca7cd37..e22be8458d92 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -3046,7 +3046,7 @@ static u32 cik_create_bitmask(u32 bit_width)
3046} 3046}
3047 3047
3048/** 3048/**
3049 * cik_select_se_sh - select which SE, SH to address 3049 * cik_get_rb_disabled - computes the mask of disabled RBs
3050 * 3050 *
3051 * @rdev: radeon_device pointer 3051 * @rdev: radeon_device pointer
3052 * @max_rb_num: max RBs (render backends) for the asic 3052 * @max_rb_num: max RBs (render backends) for the asic
@@ -7902,7 +7902,8 @@ int cik_resume(struct radeon_device *rdev)
7902 /* init golden registers */ 7902 /* init golden registers */
7903 cik_init_golden_registers(rdev); 7903 cik_init_golden_registers(rdev);
7904 7904
7905 radeon_pm_resume(rdev); 7905 if (rdev->pm.pm_method == PM_METHOD_DPM)
7906 radeon_pm_resume(rdev);
7906 7907
7907 rdev->accel_working = true; 7908 rdev->accel_working = true;
7908 r = cik_startup(rdev); 7909 r = cik_startup(rdev);
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 8a2c010b7dc5..27b0ff16082e 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -5299,7 +5299,8 @@ int evergreen_resume(struct radeon_device *rdev)
5299 /* init golden registers */ 5299 /* init golden registers */
5300 evergreen_init_golden_registers(rdev); 5300 evergreen_init_golden_registers(rdev);
5301 5301
5302 radeon_pm_resume(rdev); 5302 if (rdev->pm.pm_method == PM_METHOD_DPM)
5303 radeon_pm_resume(rdev);
5303 5304
5304 rdev->accel_working = true; 5305 rdev->accel_working = true;
5305 r = evergreen_startup(rdev); 5306 r = evergreen_startup(rdev);
diff --git a/drivers/gpu/drm/radeon/evergreen_smc.h b/drivers/gpu/drm/radeon/evergreen_smc.h
index 76ada8cfe902..3a03ba37d043 100644
--- a/drivers/gpu/drm/radeon/evergreen_smc.h
+++ b/drivers/gpu/drm/radeon/evergreen_smc.h
@@ -57,7 +57,7 @@ typedef struct SMC_Evergreen_MCRegisters SMC_Evergreen_MCRegisters;
57 57
58#define EVERGREEN_SMC_FIRMWARE_HEADER_LOCATION 0x100 58#define EVERGREEN_SMC_FIRMWARE_HEADER_LOCATION 0x100
59 59
60#define EVERGREEN_SMC_FIRMWARE_HEADER_softRegisters 0x0 60#define EVERGREEN_SMC_FIRMWARE_HEADER_softRegisters 0x8
61#define EVERGREEN_SMC_FIRMWARE_HEADER_stateTable 0xC 61#define EVERGREEN_SMC_FIRMWARE_HEADER_stateTable 0xC
62#define EVERGREEN_SMC_FIRMWARE_HEADER_mcRegisterTable 0x20 62#define EVERGREEN_SMC_FIRMWARE_HEADER_mcRegisterTable 0x20
63 63
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index ea932ac66fc6..bf6300cfd62d 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -2105,7 +2105,8 @@ int cayman_resume(struct radeon_device *rdev)
2105 /* init golden registers */ 2105 /* init golden registers */
2106 ni_init_golden_registers(rdev); 2106 ni_init_golden_registers(rdev);
2107 2107
2108 radeon_pm_resume(rdev); 2108 if (rdev->pm.pm_method == PM_METHOD_DPM)
2109 radeon_pm_resume(rdev);
2109 2110
2110 rdev->accel_working = true; 2111 rdev->accel_working = true;
2111 r = cayman_startup(rdev); 2112 r = cayman_startup(rdev);
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index ef024ce3f7cc..3cc78bb66042 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -3942,8 +3942,6 @@ int r100_resume(struct radeon_device *rdev)
3942 /* Initialize surface registers */ 3942 /* Initialize surface registers */
3943 radeon_surface_init(rdev); 3943 radeon_surface_init(rdev);
3944 3944
3945 radeon_pm_resume(rdev);
3946
3947 rdev->accel_working = true; 3945 rdev->accel_working = true;
3948 r = r100_startup(rdev); 3946 r = r100_startup(rdev);
3949 if (r) { 3947 if (r) {
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 7c63ef840e86..0b658b34b33a 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -1430,8 +1430,6 @@ int r300_resume(struct radeon_device *rdev)
1430 /* Initialize surface registers */ 1430 /* Initialize surface registers */
1431 radeon_surface_init(rdev); 1431 radeon_surface_init(rdev);
1432 1432
1433 radeon_pm_resume(rdev);
1434
1435 rdev->accel_working = true; 1433 rdev->accel_working = true;
1436 r = r300_startup(rdev); 1434 r = r300_startup(rdev);
1437 if (r) { 1435 if (r) {
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 3768aab2710b..802b19220a21 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -325,8 +325,6 @@ int r420_resume(struct radeon_device *rdev)
325 /* Initialize surface registers */ 325 /* Initialize surface registers */
326 radeon_surface_init(rdev); 326 radeon_surface_init(rdev);
327 327
328 radeon_pm_resume(rdev);
329
330 rdev->accel_working = true; 328 rdev->accel_working = true;
331 r = r420_startup(rdev); 329 r = r420_startup(rdev);
332 if (r) { 330 if (r) {
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index e209eb75024f..98d6053c36c6 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -240,8 +240,6 @@ int r520_resume(struct radeon_device *rdev)
240 /* Initialize surface registers */ 240 /* Initialize surface registers */
241 radeon_surface_init(rdev); 241 radeon_surface_init(rdev);
242 242
243 radeon_pm_resume(rdev);
244
245 rdev->accel_working = true; 243 rdev->accel_working = true;
246 r = r520_startup(rdev); 244 r = r520_startup(rdev);
247 if (r) { 245 if (r) {
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index cdbc4171fe73..647ef4079217 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2968,7 +2968,8 @@ int r600_resume(struct radeon_device *rdev)
2968 /* post card */ 2968 /* post card */
2969 atom_asic_init(rdev->mode_info.atom_context); 2969 atom_asic_init(rdev->mode_info.atom_context);
2970 2970
2971 radeon_pm_resume(rdev); 2971 if (rdev->pm.pm_method == PM_METHOD_DPM)
2972 radeon_pm_resume(rdev);
2972 2973
2973 rdev->accel_working = true; 2974 rdev->accel_working = true;
2974 r = r600_startup(rdev); 2975 r = r600_startup(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index b012cbbc3ed5..044bc98fb459 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1521,13 +1521,16 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon)
1521 if (r) 1521 if (r)
1522 DRM_ERROR("ib ring test failed (%d).\n", r); 1522 DRM_ERROR("ib ring test failed (%d).\n", r);
1523 1523
1524 if (rdev->pm.dpm_enabled) { 1524 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
1525 /* do dpm late init */ 1525 /* do dpm late init */
1526 r = radeon_pm_late_init(rdev); 1526 r = radeon_pm_late_init(rdev);
1527 if (r) { 1527 if (r) {
1528 rdev->pm.dpm_enabled = false; 1528 rdev->pm.dpm_enabled = false;
1529 DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n"); 1529 DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n");
1530 } 1530 }
1531 } else {
1532 /* resume old pm late */
1533 radeon_pm_resume(rdev);
1531 } 1534 }
1532 1535
1533 radeon_restore_bios_scratch_regs(rdev); 1536 radeon_restore_bios_scratch_regs(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 77f5b0c3edb8..040a2a10ea17 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -714,6 +714,9 @@ int radeon_ttm_init(struct radeon_device *rdev)
714 DRM_ERROR("Failed initializing VRAM heap.\n"); 714 DRM_ERROR("Failed initializing VRAM heap.\n");
715 return r; 715 return r;
716 } 716 }
717 /* Change the size here instead of the init above so only lpfn is affected */
718 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
719
717 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, 720 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
718 RADEON_GEM_DOMAIN_VRAM, 721 RADEON_GEM_DOMAIN_VRAM,
719 NULL, &rdev->stollen_vga_memory); 722 NULL, &rdev->stollen_vga_memory);
@@ -935,7 +938,7 @@ static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
935 while (size) { 938 while (size) {
936 loff_t p = *pos / PAGE_SIZE; 939 loff_t p = *pos / PAGE_SIZE;
937 unsigned off = *pos & ~PAGE_MASK; 940 unsigned off = *pos & ~PAGE_MASK;
938 ssize_t cur_size = min(size, PAGE_SIZE - off); 941 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
939 struct page *page; 942 struct page *page;
940 void *ptr; 943 void *ptr;
941 944
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index b5c2369cda2f..130d5cc50d43 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -474,8 +474,6 @@ int rs400_resume(struct radeon_device *rdev)
474 /* Initialize surface registers */ 474 /* Initialize surface registers */
475 radeon_surface_init(rdev); 475 radeon_surface_init(rdev);
476 476
477 radeon_pm_resume(rdev);
478
479 rdev->accel_working = true; 477 rdev->accel_working = true;
480 r = rs400_startup(rdev); 478 r = rs400_startup(rdev);
481 if (r) { 479 if (r) {
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index fdcde7693032..72d3616de08e 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -1048,8 +1048,6 @@ int rs600_resume(struct radeon_device *rdev)
1048 /* Initialize surface registers */ 1048 /* Initialize surface registers */
1049 radeon_surface_init(rdev); 1049 radeon_surface_init(rdev);
1050 1050
1051 radeon_pm_resume(rdev);
1052
1053 rdev->accel_working = true; 1051 rdev->accel_working = true;
1054 r = rs600_startup(rdev); 1052 r = rs600_startup(rdev);
1055 if (r) { 1053 if (r) {
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 35950738bd5e..3462b64369bf 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -756,8 +756,6 @@ int rs690_resume(struct radeon_device *rdev)
756 /* Initialize surface registers */ 756 /* Initialize surface registers */
757 radeon_surface_init(rdev); 757 radeon_surface_init(rdev);
758 758
759 radeon_pm_resume(rdev);
760
761 rdev->accel_working = true; 759 rdev->accel_working = true;
762 r = rs690_startup(rdev); 760 r = rs690_startup(rdev);
763 if (r) { 761 if (r) {
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 98e8138ff779..237dd29d9f1c 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -586,8 +586,6 @@ int rv515_resume(struct radeon_device *rdev)
586 /* Initialize surface registers */ 586 /* Initialize surface registers */
587 radeon_surface_init(rdev); 587 radeon_surface_init(rdev);
588 588
589 radeon_pm_resume(rdev);
590
591 rdev->accel_working = true; 589 rdev->accel_working = true;
592 r = rv515_startup(rdev); 590 r = rv515_startup(rdev);
593 if (r) { 591 if (r) {
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 4e37a42305d8..fef310773aad 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1811,7 +1811,8 @@ int rv770_resume(struct radeon_device *rdev)
1811 /* init golden registers */ 1811 /* init golden registers */
1812 rv770_init_golden_registers(rdev); 1812 rv770_init_golden_registers(rdev);
1813 1813
1814 radeon_pm_resume(rdev); 1814 if (rdev->pm.pm_method == PM_METHOD_DPM)
1815 radeon_pm_resume(rdev);
1815 1816
1816 rdev->accel_working = true; 1817 rdev->accel_working = true;
1817 r = rv770_startup(rdev); 1818 r = rv770_startup(rdev);
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 83578324e5d1..9a124d0608b3 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -6618,7 +6618,8 @@ int si_resume(struct radeon_device *rdev)
6618 /* init golden registers */ 6618 /* init golden registers */
6619 si_init_golden_registers(rdev); 6619 si_init_golden_registers(rdev);
6620 6620
6621 radeon_pm_resume(rdev); 6621 if (rdev->pm.pm_method == PM_METHOD_DPM)
6622 radeon_pm_resume(rdev);
6622 6623
6623 rdev->accel_working = true; 6624 rdev->accel_working = true;
6624 r = si_startup(rdev); 6625 r = si_startup(rdev);