6 files changed, 108 insertions, 7 deletions

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 94468a64ce3a..eec2cf57539a 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -483,6 +483,7 @@ config I2C_MV64XXX
 config I2C_MXS
         tristate "Freescale i.MX28 I2C interface"
         depends on SOC_IMX28
+        select STMP_DEVICE
         help
           Say Y here if you want to use the I2C bus controller on
           the Freescale i.MX28 processors.
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index 7fa73eed84a7..58a338846f06 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -27,8 +27,7 @@
 #include <linux/jiffies.h>
 #include <linux/io.h>
 #include <linux/pinctrl/consumer.h>
-
-#include <mach/common.h>
+#include <linux/stmp_device.h>
 
 #define DRIVER_NAME "mxs-i2c"
 
@@ -112,13 +111,9 @@ struct mxs_i2c_dev {
         struct i2c_adapter adapter;
 };
 
-/*
- * TODO: check if calls to here are really needed. If not, we could get rid of
- * mxs_reset_block and the mach-dependency. Needs an I2C analyzer, probably.
- */
 static void mxs_i2c_reset(struct mxs_i2c_dev *i2c)
 {
-        mxs_reset_block(i2c->regs);
+        stmp_reset_block(i2c->regs);
         writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
         writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
                         i2c->regs + MXS_I2C_QUEUECTRL_SET);
diff --git a/include/linux/stmp_device.h b/include/linux/stmp_device.h
new file mode 100644
index 000000000000..6cf7ec9547cf
--- /dev/null
+++ b/include/linux/stmp_device.h
@@ -0,0 +1,20 @@
+/*
+ * basic functions for devices following the "stmp" style register layout
+ *
+ * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __STMP_DEVICE_H__
+#define __STMP_DEVICE_H__
+
+#define STMP_OFFSET_REG_SET     0x4
+#define STMP_OFFSET_REG_CLR     0x8
+#define STMP_OFFSET_REG_TOG     0xc
+
+extern int stmp_reset_block(void __iomem *);
+#endif /* __STMP_DEVICE_H__ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 98230ac3db29..3e63af089082 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -36,6 +36,9 @@ config GENERIC_IO
         boolean
         default n
 
+config STMP_DEVICE
+        bool
+
 config CRC_CCITT
         tristate "CRC-CCITT functions"
         help
diff --git a/lib/Makefile b/lib/Makefile
index b98df505f335..2a1d7f9d39a2 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -127,6 +127,8 @@ obj-$(CONFIG_DDR) += jedec_ddr_data.o
 
 obj-$(CONFIG_GENERIC_STRNCPY_FROM_USER) += strncpy_from_user.o
 
+obj-$(CONFIG_STMP_DEVICE) += stmp_device.o
+
 hostprogs-y     := gen_crc32table
 clean-files     := crc32table.h
 
diff --git a/lib/stmp_device.c b/lib/stmp_device.c
new file mode 100644
index 000000000000..8ac9bcc4289a
--- /dev/null
+++ b/lib/stmp_device.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 1999 ARM Limited
+ * Copyright (C) 2000 Deep Blue Solutions Ltd
+ * Copyright 2006-2007,2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
+ * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
+ * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/stmp_device.h>
+
+#define STMP_MODULE_CLKGATE     (1 << 30)
+#define STMP_MODULE_SFTRST      (1 << 31)
+
+/*
+ * Clear the bit and poll it cleared.  This is usually called with
+ * a reset address and mask being either SFTRST(bit 31) or CLKGATE
+ * (bit 30).
+ */
+static int stmp_clear_poll_bit(void __iomem *addr, u32 mask)
+{
+        int timeout = 0x400;
+
+        writel(mask, addr + STMP_OFFSET_REG_CLR);
+        udelay(1);
+        while ((readl(addr) & mask) && --timeout)
+                /* nothing */;
+
+        return !timeout;
+}
+
+int stmp_reset_block(void __iomem *reset_addr)
+{
+        int ret;
+        int timeout = 0x400;
+
+        /* clear and poll SFTRST */
+        ret = stmp_clear_poll_bit(reset_addr, STMP_MODULE_SFTRST);
+        if (unlikely(ret))
+                goto error;
+
+        /* clear CLKGATE */
+        writel(STMP_MODULE_CLKGATE, reset_addr + STMP_OFFSET_REG_CLR);
+
+        /* set SFTRST to reset the block */
+        writel(STMP_MODULE_SFTRST, reset_addr + STMP_OFFSET_REG_SET);
+        udelay(1);
+
+        /* poll CLKGATE becoming set */
+        while ((!(readl(reset_addr) & STMP_MODULE_CLKGATE)) && --timeout)
+                /* nothing */;
+        if (unlikely(!timeout))
+                goto error;
+
+        /* clear and poll SFTRST */
+        ret = stmp_clear_poll_bit(reset_addr, STMP_MODULE_SFTRST);
+        if (unlikely(ret))
+                goto error;
+
+        /* clear and poll CLKGATE */
+        ret = stmp_clear_poll_bit(reset_addr, STMP_MODULE_CLKGATE);
+        if (unlikely(ret))
+                goto error;
+
+        return 0;
+
+error:
+        pr_err("%s(%p): module reset timeout\n", __func__, reset_addr);
+        return -ETIMEDOUT;
+}
+EXPORT_SYMBOL(stmp_reset_block);