diff options
-rw-r--r-- | drivers/net/ethernet/altera/altera_msgdma.c | 7 | ||||
-rw-r--r-- | drivers/net/ethernet/altera/altera_msgdma.h | 3 | ||||
-rw-r--r-- | drivers/net/ethernet/altera/altera_sgdma.c | 105 | ||||
-rw-r--r-- | drivers/net/ethernet/altera/altera_sgdma.h | 3 | ||||
-rw-r--r-- | drivers/net/ethernet/altera/altera_tse.h | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/altera/altera_tse_main.c | 30 |
6 files changed, 101 insertions, 51 deletions
diff --git a/drivers/net/ethernet/altera/altera_msgdma.c b/drivers/net/ethernet/altera/altera_msgdma.c index 3df18669ea30..219a8a1e7ba0 100644 --- a/drivers/net/ethernet/altera/altera_msgdma.c +++ b/drivers/net/ethernet/altera/altera_msgdma.c | |||
@@ -29,6 +29,10 @@ void msgdma_uninitialize(struct altera_tse_private *priv) | |||
29 | { | 29 | { |
30 | } | 30 | } |
31 | 31 | ||
32 | void msgdma_start_rxdma(struct altera_tse_private *priv) | ||
33 | { | ||
34 | } | ||
35 | |||
32 | void msgdma_reset(struct altera_tse_private *priv) | 36 | void msgdma_reset(struct altera_tse_private *priv) |
33 | { | 37 | { |
34 | int counter; | 38 | int counter; |
@@ -154,7 +158,7 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv) | |||
154 | 158 | ||
155 | /* Put buffer to the mSGDMA RX FIFO | 159 | /* Put buffer to the mSGDMA RX FIFO |
156 | */ | 160 | */ |
157 | int msgdma_add_rx_desc(struct altera_tse_private *priv, | 161 | void msgdma_add_rx_desc(struct altera_tse_private *priv, |
158 | struct tse_buffer *rxbuffer) | 162 | struct tse_buffer *rxbuffer) |
159 | { | 163 | { |
160 | struct msgdma_extended_desc *desc = priv->rx_dma_desc; | 164 | struct msgdma_extended_desc *desc = priv->rx_dma_desc; |
@@ -175,7 +179,6 @@ int msgdma_add_rx_desc(struct altera_tse_private *priv, | |||
175 | iowrite32(0, &desc->burst_seq_num); | 179 | iowrite32(0, &desc->burst_seq_num); |
176 | iowrite32(0x00010001, &desc->stride); | 180 | iowrite32(0x00010001, &desc->stride); |
177 | iowrite32(control, &desc->control); | 181 | iowrite32(control, &desc->control); |
178 | return 1; | ||
179 | } | 182 | } |
180 | 183 | ||
181 | /* status is returned on upper 16 bits, | 184 | /* status is returned on upper 16 bits, |
diff --git a/drivers/net/ethernet/altera/altera_msgdma.h b/drivers/net/ethernet/altera/altera_msgdma.h index 7f0f5bf2bba2..42cf61c81057 100644 --- a/drivers/net/ethernet/altera/altera_msgdma.h +++ b/drivers/net/ethernet/altera/altera_msgdma.h | |||
@@ -25,10 +25,11 @@ void msgdma_disable_txirq(struct altera_tse_private *); | |||
25 | void msgdma_clear_rxirq(struct altera_tse_private *); | 25 | void msgdma_clear_rxirq(struct altera_tse_private *); |
26 | void msgdma_clear_txirq(struct altera_tse_private *); | 26 | void msgdma_clear_txirq(struct altera_tse_private *); |
27 | u32 msgdma_tx_completions(struct altera_tse_private *); | 27 | u32 msgdma_tx_completions(struct altera_tse_private *); |
28 | int msgdma_add_rx_desc(struct altera_tse_private *, struct tse_buffer *); | 28 | void msgdma_add_rx_desc(struct altera_tse_private *, struct tse_buffer *); |
29 | int msgdma_tx_buffer(struct altera_tse_private *, struct tse_buffer *); | 29 | int msgdma_tx_buffer(struct altera_tse_private *, struct tse_buffer *); |
30 | u32 msgdma_rx_status(struct altera_tse_private *); | 30 | u32 msgdma_rx_status(struct altera_tse_private *); |
31 | int msgdma_initialize(struct altera_tse_private *); | 31 | int msgdma_initialize(struct altera_tse_private *); |
32 | void msgdma_uninitialize(struct altera_tse_private *); | 32 | void msgdma_uninitialize(struct altera_tse_private *); |
33 | void msgdma_start_rxdma(struct altera_tse_private *); | ||
33 | 34 | ||
34 | #endif /* __ALTERA_MSGDMA_H__ */ | 35 | #endif /* __ALTERA_MSGDMA_H__ */ |
diff --git a/drivers/net/ethernet/altera/altera_sgdma.c b/drivers/net/ethernet/altera/altera_sgdma.c index 0ee96639ae44..4bcdd34f5d24 100644 --- a/drivers/net/ethernet/altera/altera_sgdma.c +++ b/drivers/net/ethernet/altera/altera_sgdma.c | |||
@@ -64,11 +64,15 @@ queue_rx_peekhead(struct altera_tse_private *priv); | |||
64 | 64 | ||
65 | int sgdma_initialize(struct altera_tse_private *priv) | 65 | int sgdma_initialize(struct altera_tse_private *priv) |
66 | { | 66 | { |
67 | priv->txctrlreg = SGDMA_CTRLREG_ILASTD; | 67 | priv->txctrlreg = SGDMA_CTRLREG_ILASTD | |
68 | SGDMA_CTRLREG_INTEN; | ||
68 | 69 | ||
69 | priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP | | 70 | priv->rxctrlreg = SGDMA_CTRLREG_IDESCRIP | |
71 | SGDMA_CTRLREG_INTEN | | ||
70 | SGDMA_CTRLREG_ILASTD; | 72 | SGDMA_CTRLREG_ILASTD; |
71 | 73 | ||
74 | priv->sgdmadesclen = sizeof(sgdma_descrip); | ||
75 | |||
72 | INIT_LIST_HEAD(&priv->txlisthd); | 76 | INIT_LIST_HEAD(&priv->txlisthd); |
73 | INIT_LIST_HEAD(&priv->rxlisthd); | 77 | INIT_LIST_HEAD(&priv->rxlisthd); |
74 | 78 | ||
@@ -93,6 +97,16 @@ int sgdma_initialize(struct altera_tse_private *priv) | |||
93 | return -EINVAL; | 97 | return -EINVAL; |
94 | } | 98 | } |
95 | 99 | ||
100 | /* Initialize descriptor memory to all 0's, sync memory to cache */ | ||
101 | memset(priv->tx_dma_desc, 0, priv->txdescmem); | ||
102 | memset(priv->rx_dma_desc, 0, priv->rxdescmem); | ||
103 | |||
104 | dma_sync_single_for_device(priv->device, priv->txdescphys, | ||
105 | priv->txdescmem, DMA_TO_DEVICE); | ||
106 | |||
107 | dma_sync_single_for_device(priv->device, priv->rxdescphys, | ||
108 | priv->rxdescmem, DMA_TO_DEVICE); | ||
109 | |||
96 | return 0; | 110 | return 0; |
97 | } | 111 | } |
98 | 112 | ||
@@ -130,26 +144,23 @@ void sgdma_reset(struct altera_tse_private *priv) | |||
130 | iowrite32(0, &prxsgdma->control); | 144 | iowrite32(0, &prxsgdma->control); |
131 | } | 145 | } |
132 | 146 | ||
147 | /* For SGDMA, interrupts remain enabled after initially enabling, | ||
148 | * so no need to provide implementations for abstract enable | ||
149 | * and disable | ||
150 | */ | ||
151 | |||
133 | void sgdma_enable_rxirq(struct altera_tse_private *priv) | 152 | void sgdma_enable_rxirq(struct altera_tse_private *priv) |
134 | { | 153 | { |
135 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | ||
136 | priv->rxctrlreg |= SGDMA_CTRLREG_INTEN; | ||
137 | tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN); | ||
138 | } | 154 | } |
139 | 155 | ||
140 | void sgdma_enable_txirq(struct altera_tse_private *priv) | 156 | void sgdma_enable_txirq(struct altera_tse_private *priv) |
141 | { | 157 | { |
142 | struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | ||
143 | priv->txctrlreg |= SGDMA_CTRLREG_INTEN; | ||
144 | tse_set_bit(&csr->control, SGDMA_CTRLREG_INTEN); | ||
145 | } | 158 | } |
146 | 159 | ||
147 | /* for SGDMA, RX interrupts remain enabled after enabling */ | ||
148 | void sgdma_disable_rxirq(struct altera_tse_private *priv) | 160 | void sgdma_disable_rxirq(struct altera_tse_private *priv) |
149 | { | 161 | { |
150 | } | 162 | } |
151 | 163 | ||
152 | /* for SGDMA, TX interrupts remain enabled after enabling */ | ||
153 | void sgdma_disable_txirq(struct altera_tse_private *priv) | 164 | void sgdma_disable_txirq(struct altera_tse_private *priv) |
154 | { | 165 | { |
155 | } | 166 | } |
@@ -219,11 +230,15 @@ u32 sgdma_tx_completions(struct altera_tse_private *priv) | |||
219 | return ready; | 230 | return ready; |
220 | } | 231 | } |
221 | 232 | ||
222 | int sgdma_add_rx_desc(struct altera_tse_private *priv, | 233 | void sgdma_start_rxdma(struct altera_tse_private *priv) |
223 | struct tse_buffer *rxbuffer) | 234 | { |
235 | sgdma_async_read(priv); | ||
236 | } | ||
237 | |||
238 | void sgdma_add_rx_desc(struct altera_tse_private *priv, | ||
239 | struct tse_buffer *rxbuffer) | ||
224 | { | 240 | { |
225 | queue_rx(priv, rxbuffer); | 241 | queue_rx(priv, rxbuffer); |
226 | return sgdma_async_read(priv); | ||
227 | } | 242 | } |
228 | 243 | ||
229 | /* status is returned on upper 16 bits, | 244 | /* status is returned on upper 16 bits, |
@@ -240,28 +255,52 @@ u32 sgdma_rx_status(struct altera_tse_private *priv) | |||
240 | unsigned int pktstatus = 0; | 255 | unsigned int pktstatus = 0; |
241 | struct tse_buffer *rxbuffer = NULL; | 256 | struct tse_buffer *rxbuffer = NULL; |
242 | 257 | ||
243 | dma_sync_single_for_cpu(priv->device, | 258 | u32 sts = ioread32(&csr->status); |
244 | priv->rxdescphys, | ||
245 | priv->rxdescmem, | ||
246 | DMA_BIDIRECTIONAL); | ||
247 | 259 | ||
248 | desc = &base[0]; | 260 | desc = &base[0]; |
249 | if ((ioread32(&csr->status) & SGDMA_STSREG_EOP) || | 261 | if (sts & SGDMA_STSREG_EOP) { |
250 | (desc->status & SGDMA_STATUS_EOP)) { | 262 | dma_sync_single_for_cpu(priv->device, |
263 | priv->rxdescphys, | ||
264 | priv->sgdmadesclen, | ||
265 | DMA_FROM_DEVICE); | ||
266 | |||
251 | pktlength = desc->bytes_xferred; | 267 | pktlength = desc->bytes_xferred; |
252 | pktstatus = desc->status & 0x3f; | 268 | pktstatus = desc->status & 0x3f; |
253 | rxstatus = pktstatus; | 269 | rxstatus = pktstatus; |
254 | rxstatus = rxstatus << 16; | 270 | rxstatus = rxstatus << 16; |
255 | rxstatus |= (pktlength & 0xffff); | 271 | rxstatus |= (pktlength & 0xffff); |
256 | 272 | ||
257 | desc->status = 0; | 273 | if (rxstatus) { |
274 | desc->status = 0; | ||
258 | 275 | ||
259 | rxbuffer = dequeue_rx(priv); | 276 | rxbuffer = dequeue_rx(priv); |
260 | if (rxbuffer == NULL) | 277 | if (rxbuffer == NULL) |
261 | netdev_err(priv->dev, | 278 | netdev_info(priv->dev, |
262 | "sgdma rx and rx queue empty!\n"); | 279 | "sgdma rx and rx queue empty!\n"); |
280 | |||
281 | /* Clear control */ | ||
282 | iowrite32(0, &csr->control); | ||
283 | /* clear status */ | ||
284 | iowrite32(0xf, &csr->status); | ||
263 | 285 | ||
264 | /* kick the rx sgdma after reaping this descriptor */ | 286 | /* kick the rx sgdma after reaping this descriptor */ |
287 | pktsrx = sgdma_async_read(priv); | ||
288 | |||
289 | } else { | ||
290 | /* If the SGDMA indicated an end of packet on recv, | ||
291 | * then it's expected that the rxstatus from the | ||
292 | * descriptor is non-zero - meaning a valid packet | ||
293 | * with a nonzero length, or an error has been | ||
294 | * indicated. if not, then all we can do is signal | ||
295 | * an error and return no packet received. Most likely | ||
296 | * there is a system design error, or an error in the | ||
297 | * underlying kernel (cache or cache management problem) | ||
298 | */ | ||
299 | netdev_err(priv->dev, | ||
300 | "SGDMA RX Error Info: %x, %x, %x\n", | ||
301 | sts, desc->status, rxstatus); | ||
302 | } | ||
303 | } else if (sts == 0) { | ||
265 | pktsrx = sgdma_async_read(priv); | 304 | pktsrx = sgdma_async_read(priv); |
266 | } | 305 | } |
267 | 306 | ||
@@ -319,13 +358,14 @@ static int sgdma_async_read(struct altera_tse_private *priv) | |||
319 | struct sgdma_descrip *cdesc = &descbase[0]; | 358 | struct sgdma_descrip *cdesc = &descbase[0]; |
320 | struct sgdma_descrip *ndesc = &descbase[1]; | 359 | struct sgdma_descrip *ndesc = &descbase[1]; |
321 | 360 | ||
322 | unsigned int sts = ioread32(&csr->status); | ||
323 | struct tse_buffer *rxbuffer = NULL; | 361 | struct tse_buffer *rxbuffer = NULL; |
324 | 362 | ||
325 | if (!sgdma_rxbusy(priv)) { | 363 | if (!sgdma_rxbusy(priv)) { |
326 | rxbuffer = queue_rx_peekhead(priv); | 364 | rxbuffer = queue_rx_peekhead(priv); |
327 | if (rxbuffer == NULL) | 365 | if (rxbuffer == NULL) { |
366 | netdev_err(priv->dev, "no rx buffers available\n"); | ||
328 | return 0; | 367 | return 0; |
368 | } | ||
329 | 369 | ||
330 | sgdma_descrip(cdesc, /* current descriptor */ | 370 | sgdma_descrip(cdesc, /* current descriptor */ |
331 | ndesc, /* next descriptor */ | 371 | ndesc, /* next descriptor */ |
@@ -337,17 +377,10 @@ static int sgdma_async_read(struct altera_tse_private *priv) | |||
337 | 0, /* read fixed: NA for rx dma */ | 377 | 0, /* read fixed: NA for rx dma */ |
338 | 0); /* SOP: NA for rx DMA */ | 378 | 0); /* SOP: NA for rx DMA */ |
339 | 379 | ||
340 | /* clear control and status */ | ||
341 | iowrite32(0, &csr->control); | ||
342 | |||
343 | /* If status available, clear those bits */ | ||
344 | if (sts & 0xf) | ||
345 | iowrite32(0xf, &csr->status); | ||
346 | |||
347 | dma_sync_single_for_device(priv->device, | 380 | dma_sync_single_for_device(priv->device, |
348 | priv->rxdescphys, | 381 | priv->rxdescphys, |
349 | priv->rxdescmem, | 382 | priv->sgdmadesclen, |
350 | DMA_BIDIRECTIONAL); | 383 | DMA_TO_DEVICE); |
351 | 384 | ||
352 | iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), | 385 | iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), |
353 | &csr->next_descrip); | 386 | &csr->next_descrip); |
@@ -374,7 +407,7 @@ static int sgdma_async_write(struct altera_tse_private *priv, | |||
374 | iowrite32(0x1f, &csr->status); | 407 | iowrite32(0x1f, &csr->status); |
375 | 408 | ||
376 | dma_sync_single_for_device(priv->device, priv->txdescphys, | 409 | dma_sync_single_for_device(priv->device, priv->txdescphys, |
377 | priv->txdescmem, DMA_TO_DEVICE); | 410 | priv->sgdmadesclen, DMA_TO_DEVICE); |
378 | 411 | ||
379 | iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)), | 412 | iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)), |
380 | &csr->next_descrip); | 413 | &csr->next_descrip); |
diff --git a/drivers/net/ethernet/altera/altera_sgdma.h b/drivers/net/ethernet/altera/altera_sgdma.h index 07d471729dc4..584977e29ef9 100644 --- a/drivers/net/ethernet/altera/altera_sgdma.h +++ b/drivers/net/ethernet/altera/altera_sgdma.h | |||
@@ -26,10 +26,11 @@ void sgdma_clear_rxirq(struct altera_tse_private *); | |||
26 | void sgdma_clear_txirq(struct altera_tse_private *); | 26 | void sgdma_clear_txirq(struct altera_tse_private *); |
27 | int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *); | 27 | int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *); |
28 | u32 sgdma_tx_completions(struct altera_tse_private *); | 28 | u32 sgdma_tx_completions(struct altera_tse_private *); |
29 | int sgdma_add_rx_desc(struct altera_tse_private *priv, struct tse_buffer *); | 29 | void sgdma_add_rx_desc(struct altera_tse_private *priv, struct tse_buffer *); |
30 | void sgdma_status(struct altera_tse_private *); | 30 | void sgdma_status(struct altera_tse_private *); |
31 | u32 sgdma_rx_status(struct altera_tse_private *); | 31 | u32 sgdma_rx_status(struct altera_tse_private *); |
32 | int sgdma_initialize(struct altera_tse_private *); | 32 | int sgdma_initialize(struct altera_tse_private *); |
33 | void sgdma_uninitialize(struct altera_tse_private *); | 33 | void sgdma_uninitialize(struct altera_tse_private *); |
34 | void sgdma_start_rxdma(struct altera_tse_private *); | ||
34 | 35 | ||
35 | #endif /* __ALTERA_SGDMA_H__ */ | 36 | #endif /* __ALTERA_SGDMA_H__ */ |
diff --git a/drivers/net/ethernet/altera/altera_tse.h b/drivers/net/ethernet/altera/altera_tse.h index 8feeed05de0e..6059a09bb8ae 100644 --- a/drivers/net/ethernet/altera/altera_tse.h +++ b/drivers/net/ethernet/altera/altera_tse.h | |||
@@ -390,10 +390,11 @@ struct altera_dmaops { | |||
390 | void (*clear_rxirq)(struct altera_tse_private *); | 390 | void (*clear_rxirq)(struct altera_tse_private *); |
391 | int (*tx_buffer)(struct altera_tse_private *, struct tse_buffer *); | 391 | int (*tx_buffer)(struct altera_tse_private *, struct tse_buffer *); |
392 | u32 (*tx_completions)(struct altera_tse_private *); | 392 | u32 (*tx_completions)(struct altera_tse_private *); |
393 | int (*add_rx_desc)(struct altera_tse_private *, struct tse_buffer *); | 393 | void (*add_rx_desc)(struct altera_tse_private *, struct tse_buffer *); |
394 | u32 (*get_rx_status)(struct altera_tse_private *); | 394 | u32 (*get_rx_status)(struct altera_tse_private *); |
395 | int (*init_dma)(struct altera_tse_private *); | 395 | int (*init_dma)(struct altera_tse_private *); |
396 | void (*uninit_dma)(struct altera_tse_private *); | 396 | void (*uninit_dma)(struct altera_tse_private *); |
397 | void (*start_rxdma)(struct altera_tse_private *); | ||
397 | }; | 398 | }; |
398 | 399 | ||
399 | /* This structure is private to each device. | 400 | /* This structure is private to each device. |
@@ -453,6 +454,7 @@ struct altera_tse_private { | |||
453 | u32 rxctrlreg; | 454 | u32 rxctrlreg; |
454 | dma_addr_t rxdescphys; | 455 | dma_addr_t rxdescphys; |
455 | dma_addr_t txdescphys; | 456 | dma_addr_t txdescphys; |
457 | size_t sgdmadesclen; | ||
456 | 458 | ||
457 | struct list_head txlisthd; | 459 | struct list_head txlisthd; |
458 | struct list_head rxlisthd; | 460 | struct list_head rxlisthd; |
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c index c70a29e0b9f7..dabba5ed67bd 100644 --- a/drivers/net/ethernet/altera/altera_tse_main.c +++ b/drivers/net/ethernet/altera/altera_tse_main.c | |||
@@ -224,6 +224,7 @@ static int tse_init_rx_buffer(struct altera_tse_private *priv, | |||
224 | dev_kfree_skb_any(rxbuffer->skb); | 224 | dev_kfree_skb_any(rxbuffer->skb); |
225 | return -EINVAL; | 225 | return -EINVAL; |
226 | } | 226 | } |
227 | rxbuffer->dma_addr &= (dma_addr_t)~3; | ||
227 | rxbuffer->len = len; | 228 | rxbuffer->len = len; |
228 | return 0; | 229 | return 0; |
229 | } | 230 | } |
@@ -425,9 +426,10 @@ static int tse_rx(struct altera_tse_private *priv, int limit) | |||
425 | priv->dev->stats.rx_bytes += pktlength; | 426 | priv->dev->stats.rx_bytes += pktlength; |
426 | 427 | ||
427 | entry = next_entry; | 428 | entry = next_entry; |
429 | |||
430 | tse_rx_refill(priv); | ||
428 | } | 431 | } |
429 | 432 | ||
430 | tse_rx_refill(priv); | ||
431 | return count; | 433 | return count; |
432 | } | 434 | } |
433 | 435 | ||
@@ -520,7 +522,6 @@ static irqreturn_t altera_isr(int irq, void *dev_id) | |||
520 | struct altera_tse_private *priv; | 522 | struct altera_tse_private *priv; |
521 | unsigned long int flags; | 523 | unsigned long int flags; |
522 | 524 | ||
523 | |||
524 | if (unlikely(!dev)) { | 525 | if (unlikely(!dev)) { |
525 | pr_err("%s: invalid dev pointer\n", __func__); | 526 | pr_err("%s: invalid dev pointer\n", __func__); |
526 | return IRQ_NONE; | 527 | return IRQ_NONE; |
@@ -868,13 +869,13 @@ static int init_mac(struct altera_tse_private *priv) | |||
868 | /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit | 869 | /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit |
869 | * start address | 870 | * start address |
870 | */ | 871 | */ |
871 | tse_clear_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); | 872 | tse_set_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); |
872 | tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | | 873 | tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | |
873 | ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); | 874 | ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); |
874 | 875 | ||
875 | /* Set the MAC options */ | 876 | /* Set the MAC options */ |
876 | cmd = ioread32(&mac->command_config); | 877 | cmd = ioread32(&mac->command_config); |
877 | cmd |= MAC_CMDCFG_PAD_EN; /* Padding Removal on Receive */ | 878 | cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */ |
878 | cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ | 879 | cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ |
879 | cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames | 880 | cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames |
880 | * with CRC errors | 881 | * with CRC errors |
@@ -882,6 +883,12 @@ static int init_mac(struct altera_tse_private *priv) | |||
882 | cmd |= MAC_CMDCFG_CNTL_FRM_ENA; | 883 | cmd |= MAC_CMDCFG_CNTL_FRM_ENA; |
883 | cmd &= ~MAC_CMDCFG_TX_ENA; | 884 | cmd &= ~MAC_CMDCFG_TX_ENA; |
884 | cmd &= ~MAC_CMDCFG_RX_ENA; | 885 | cmd &= ~MAC_CMDCFG_RX_ENA; |
886 | |||
887 | /* Default speed and duplex setting, full/100 */ | ||
888 | cmd &= ~MAC_CMDCFG_HD_ENA; | ||
889 | cmd &= ~MAC_CMDCFG_ETH_SPEED; | ||
890 | cmd &= ~MAC_CMDCFG_ENA_10; | ||
891 | |||
885 | iowrite32(cmd, &mac->command_config); | 892 | iowrite32(cmd, &mac->command_config); |
886 | 893 | ||
887 | if (netif_msg_hw(priv)) | 894 | if (netif_msg_hw(priv)) |
@@ -1085,17 +1092,19 @@ static int tse_open(struct net_device *dev) | |||
1085 | 1092 | ||
1086 | spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags); | 1093 | spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags); |
1087 | 1094 | ||
1088 | /* Start MAC Rx/Tx */ | ||
1089 | spin_lock(&priv->mac_cfg_lock); | ||
1090 | tse_set_mac(priv, true); | ||
1091 | spin_unlock(&priv->mac_cfg_lock); | ||
1092 | |||
1093 | if (priv->phydev) | 1095 | if (priv->phydev) |
1094 | phy_start(priv->phydev); | 1096 | phy_start(priv->phydev); |
1095 | 1097 | ||
1096 | napi_enable(&priv->napi); | 1098 | napi_enable(&priv->napi); |
1097 | netif_start_queue(dev); | 1099 | netif_start_queue(dev); |
1098 | 1100 | ||
1101 | priv->dmaops->start_rxdma(priv); | ||
1102 | |||
1103 | /* Start MAC Rx/Tx */ | ||
1104 | spin_lock(&priv->mac_cfg_lock); | ||
1105 | tse_set_mac(priv, true); | ||
1106 | spin_unlock(&priv->mac_cfg_lock); | ||
1107 | |||
1099 | return 0; | 1108 | return 0; |
1100 | 1109 | ||
1101 | tx_request_irq_error: | 1110 | tx_request_irq_error: |
@@ -1167,7 +1176,6 @@ static struct net_device_ops altera_tse_netdev_ops = { | |||
1167 | .ndo_validate_addr = eth_validate_addr, | 1176 | .ndo_validate_addr = eth_validate_addr, |
1168 | }; | 1177 | }; |
1169 | 1178 | ||
1170 | |||
1171 | static int request_and_map(struct platform_device *pdev, const char *name, | 1179 | static int request_and_map(struct platform_device *pdev, const char *name, |
1172 | struct resource **res, void __iomem **ptr) | 1180 | struct resource **res, void __iomem **ptr) |
1173 | { | 1181 | { |
@@ -1496,6 +1504,7 @@ struct altera_dmaops altera_dtype_sgdma = { | |||
1496 | .get_rx_status = sgdma_rx_status, | 1504 | .get_rx_status = sgdma_rx_status, |
1497 | .init_dma = sgdma_initialize, | 1505 | .init_dma = sgdma_initialize, |
1498 | .uninit_dma = sgdma_uninitialize, | 1506 | .uninit_dma = sgdma_uninitialize, |
1507 | .start_rxdma = sgdma_start_rxdma, | ||
1499 | }; | 1508 | }; |
1500 | 1509 | ||
1501 | struct altera_dmaops altera_dtype_msgdma = { | 1510 | struct altera_dmaops altera_dtype_msgdma = { |
@@ -1514,6 +1523,7 @@ struct altera_dmaops altera_dtype_msgdma = { | |||
1514 | .get_rx_status = msgdma_rx_status, | 1523 | .get_rx_status = msgdma_rx_status, |
1515 | .init_dma = msgdma_initialize, | 1524 | .init_dma = msgdma_initialize, |
1516 | .uninit_dma = msgdma_uninitialize, | 1525 | .uninit_dma = msgdma_uninitialize, |
1526 | .start_rxdma = msgdma_start_rxdma, | ||
1517 | }; | 1527 | }; |
1518 | 1528 | ||
1519 | static struct of_device_id altera_tse_ids[] = { | 1529 | static struct of_device_id altera_tse_ids[] = { |