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-rw-r--r--arch/powerpc/boot/dts/walnut.dts39
-rw-r--r--arch/powerpc/platforms/40x/Kconfig1
2 files changed, 40 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts
index 754fa3960f83..681633ec954f 100644
--- a/arch/powerpc/boot/dts/walnut.dts
+++ b/arch/powerpc/boot/dts/walnut.dts
@@ -190,6 +190,45 @@
190 virtual-reg = <f0300005>; 190 virtual-reg = <f0300005>;
191 }; 191 };
192 }; 192 };
193
194 PCI0: pci@ec000000 {
195 device_type = "pci";
196 #interrupt-cells = <1>;
197 #size-cells = <2>;
198 #address-cells = <3>;
199 compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
200 primary;
201 reg = <eec00000 8 /* Config space access */
202 eed80000 4 /* IACK */
203 eed80000 4 /* Special cycle */
204 ef480000 40>; /* Internal registers */
205
206 /* Outbound ranges, one memory and one IO,
207 * later cannot be changed. Chip supports a second
208 * IO range but we don't use it for now
209 */
210 ranges = <02000000 0 80000000 80000000 0 20000000
211 01000000 0 00000000 e8000000 0 00010000>;
212
213 /* Inbound 2GB range starting at 0 */
214 dma-ranges = <42000000 0 0 0 0 80000000>;
215
216 /* Walnut has all 4 IRQ pins tied together per slot */
217 interrupt-map-mask = <f800 0 0 0>;
218 interrupt-map = <
219 /* IDSEL 1 */
220 0800 0 0 0 &UIC0 1c 8
221
222 /* IDSEL 2 */
223 1000 0 0 0 &UIC0 1d 8
224
225 /* IDSEL 3 */
226 1800 0 0 0 &UIC0 1e 8
227
228 /* IDSEL 4 */
229 2000 0 0 0 &UIC0 1f 8
230 >;
231 };
193 }; 232 };
194 233
195 chosen { 234 chosen {
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index b8f0a6c16486..84551ab979f0 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -59,6 +59,7 @@ config WALNUT
59 depends on 40x 59 depends on 40x
60 default y 60 default y
61 select 405GP 61 select 405GP
62 select PCI
62 help 63 help
63 This option enables support for the IBM PPC405GP evaluation board. 64 This option enables support for the IBM PPC405GP evaluation board.
64 65