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-rw-r--r--arch/arm/mach-tegra/fuse.c18
-rw-r--r--arch/arm/mach-tegra/fuse.h3
2 files changed, 14 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 17fdd4086e6f..e2dd342e0b33 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -33,6 +33,7 @@
33int tegra_sku_id; 33int tegra_sku_id;
34int tegra_cpu_process_id; 34int tegra_cpu_process_id;
35int tegra_core_process_id; 35int tegra_core_process_id;
36static int tegra_chip_id;
36enum tegra_revision tegra_revision; 37enum tegra_revision tegra_revision;
37 38
38/* The BCT to use at boot is specified by board straps that can be read 39/* The BCT to use at boot is specified by board straps that can be read
@@ -65,12 +66,9 @@ static inline bool get_spare_fuse(int bit)
65 return tegra_fuse_readl(FUSE_SPARE_BIT + bit * 4); 66 return tegra_fuse_readl(FUSE_SPARE_BIT + bit * 4);
66} 67}
67 68
68static enum tegra_revision tegra_get_revision(void) 69static enum tegra_revision tegra_get_revision(u32 id)
69{ 70{
70 void __iomem *chip_id = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804;
71 u32 id = readl(chip_id);
72 u32 minor_rev = (id >> 16) & 0xf; 71 u32 minor_rev = (id >> 16) & 0xf;
73 u32 chipid = (id >> 8) & 0xff;
74 72
75 switch (minor_rev) { 73 switch (minor_rev) {
76 case 1: 74 case 1:
@@ -78,7 +76,8 @@ static enum tegra_revision tegra_get_revision(void)
78 case 2: 76 case 2:
79 return TEGRA_REVISION_A02; 77 return TEGRA_REVISION_A02;
80 case 3: 78 case 3:
81 if (chipid == 0x20 && (get_spare_fuse(18) || get_spare_fuse(19))) 79 if (tegra_chip_id == TEGRA20 &&
80 (get_spare_fuse(18) || get_spare_fuse(19)))
82 return TEGRA_REVISION_A03p; 81 return TEGRA_REVISION_A03p;
83 else 82 else
84 return TEGRA_REVISION_A03; 83 return TEGRA_REVISION_A03;
@@ -91,6 +90,8 @@ static enum tegra_revision tegra_get_revision(void)
91 90
92void tegra_init_fuse(void) 91void tegra_init_fuse(void)
93{ 92{
93 u32 id;
94
94 u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48)); 95 u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
95 reg |= 1 << 28; 96 reg |= 1 << 28;
96 writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48)); 97 writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
@@ -107,10 +108,13 @@ void tegra_init_fuse(void)
107 reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT); 108 reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT);
108 tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT; 109 tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT;
109 110
110 tegra_revision = tegra_get_revision(); 111 id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);
112 tegra_chip_id = (id >> 8) & 0xff;
113
114 tegra_revision = tegra_get_revision(id);
111 115
112 pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n", 116 pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
113 tegra_revision_name[tegra_get_revision()], 117 tegra_revision_name[tegra_revision],
114 tegra_sku_id, tegra_cpu_process_id, 118 tegra_sku_id, tegra_cpu_process_id,
115 tegra_core_process_id); 119 tegra_core_process_id);
116} 120}
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h
index d65d2abf803b..c55457281eed 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/fuse.h
@@ -35,6 +35,9 @@ enum tegra_revision {
35#define SKU_ID_AP25E 27 35#define SKU_ID_AP25E 27
36#define SKU_ID_T25E 28 36#define SKU_ID_T25E 28
37 37
38#define TEGRA20 0x20
39#define TEGRA30 0x30
40
38extern int tegra_sku_id; 41extern int tegra_sku_id;
39extern int tegra_cpu_process_id; 42extern int tegra_cpu_process_id;
40extern int tegra_core_process_id; 43extern int tegra_core_process_id;