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-rw-r--r--arch/sh/Kconfig43
-rw-r--r--arch/sh/Kconfig.debug1
-rw-r--r--arch/sh/cchips/Kconfig6
-rw-r--r--arch/sh/drivers/pci/Kconfig1
-rw-r--r--arch/sh/kernel/cpu/init.c15
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c3
-rw-r--r--arch/sh/kernel/process.c4
-rw-r--r--arch/sh/mm/Kconfig16
-rw-r--r--arch/sh/mm/init.c2
-rw-r--r--include/asm-sh/cache.h4
-rw-r--r--include/asm-sh/hd64461.h2
-rw-r--r--include/asm-sh/processor.h4
-rw-r--r--include/asm-sh/system.h2
-rw-r--r--include/asm-sh/ubc.h9
14 files changed, 57 insertions, 55 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 78f5f2305132..b16407c9f2c4 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -55,8 +55,21 @@ config GENERIC_TIME
55config GENERIC_CLOCKEVENTS 55config GENERIC_CLOCKEVENTS
56 def_bool n 56 def_bool n
57 57
58config SYS_SUPPORTS_PM
59 bool
60
58config SYS_SUPPORTS_APM_EMULATION 61config SYS_SUPPORTS_APM_EMULATION
59 bool 62 bool
63 select SYS_SUPPORTS_PM
64
65config SYS_SUPPORTS_SMP
66 bool
67
68config SYS_SUPPORTS_NUMA
69 bool
70
71config SYS_SUPPORTS_PCI
72 bool
60 73
61config ARCH_MAY_HAVE_PC_FDC 74config ARCH_MAY_HAVE_PC_FDC
62 bool 75 bool
@@ -102,7 +115,7 @@ endchoice
102 115
103config SH_FPU 116config SH_FPU
104 bool "FPU support" 117 bool "FPU support"
105 depends on !CPU_SH3 118 depends on CPU_SH4
106 default y 119 default y
107 help 120 help
108 Selecting this option will enable support for SH processors that 121 Selecting this option will enable support for SH processors that
@@ -236,6 +249,7 @@ config SH_7751_SOLUTION_ENGINE
236config SH_7780_SOLUTION_ENGINE 249config SH_7780_SOLUTION_ENGINE
237 bool "SolutionEngine7780" 250 bool "SolutionEngine7780"
238 select SOLUTION_ENGINE 251 select SOLUTION_ENGINE
252 select SYS_SUPPORTS_PCI
239 depends on CPU_SUBTYPE_SH7780 253 depends on CPU_SUBTYPE_SH7780
240 help 254 help
241 Select 7780 SolutionEngine if configuring for a Renesas SH7780 255 Select 7780 SolutionEngine if configuring for a Renesas SH7780
@@ -275,20 +289,16 @@ config SH_7751_SYSTEMH
275config SH_HP6XX 289config SH_HP6XX
276 bool "HP6XX" 290 bool "HP6XX"
277 select SYS_SUPPORTS_APM_EMULATION 291 select SYS_SUPPORTS_APM_EMULATION
292 select HD6446X_SERIES
278 depends on CPU_SUBTYPE_SH7709 293 depends on CPU_SUBTYPE_SH7709
279 help 294 help
280 Select HP6XX if configuring for a HP jornada HP6xx. 295 Select HP6XX if configuring for a HP jornada HP6xx.
281 More information (hardware only) at 296 More information (hardware only) at
282 <http://www.hp.com/jornada/>. 297 <http://www.hp.com/jornada/>.
283 298
284config SH_SATURN
285 bool "Saturn"
286 depends on CPU_SUBTYPE_SH7604
287 help
288 Select Saturn if configuring for a SEGA Saturn.
289
290config SH_DREAMCAST 299config SH_DREAMCAST
291 bool "Dreamcast" 300 bool "Dreamcast"
301 select SYS_SUPPORTS_PCI
292 depends on CPU_SUBTYPE_SH7091 302 depends on CPU_SUBTYPE_SH7091
293 help 303 help
294 Select Dreamcast if configuring for a SEGA Dreamcast. 304 Select Dreamcast if configuring for a SEGA Dreamcast.
@@ -307,6 +317,7 @@ config SH_MPC1211
307config SH_SH03 317config SH_SH03
308 bool "Interface CTP/PCI-SH03" 318 bool "Interface CTP/PCI-SH03"
309 depends on CPU_SUBTYPE_SH7751 && BROKEN 319 depends on CPU_SUBTYPE_SH7751 && BROKEN
320 select SYS_SUPPORTS_PCI
310 help 321 help
311 CTP/PCI-SH03 is a CPU module computer that is produced 322 CTP/PCI-SH03 is a CPU module computer that is produced
312 by Interface Corporation. 323 by Interface Corporation.
@@ -315,6 +326,7 @@ config SH_SH03
315config SH_SECUREEDGE5410 326config SH_SECUREEDGE5410
316 bool "SecureEdge5410" 327 bool "SecureEdge5410"
317 depends on CPU_SUBTYPE_SH7751R 328 depends on CPU_SUBTYPE_SH7751R
329 select SYS_SUPPORTS_PCI
318 help 330 help
319 Select SecureEdge5410 if configuring for a SnapGear SH board. 331 Select SecureEdge5410 if configuring for a SnapGear SH board.
320 This includes both the OEM SecureEdge products as well as the 332 This includes both the OEM SecureEdge products as well as the
@@ -337,6 +349,7 @@ config SH_7710VOIPGW
337config SH_RTS7751R2D 349config SH_RTS7751R2D
338 bool "RTS7751R2D" 350 bool "RTS7751R2D"
339 depends on CPU_SUBTYPE_SH7751R 351 depends on CPU_SUBTYPE_SH7751R
352 select SYS_SUPPORTS_PCI
340 help 353 help
341 Select RTS7751R2D if configuring for a Renesas Technology 354 Select RTS7751R2D if configuring for a Renesas Technology
342 Sales SH-Graphics board. 355 Sales SH-Graphics board.
@@ -344,6 +357,7 @@ config SH_RTS7751R2D
344config SH_HIGHLANDER 357config SH_HIGHLANDER
345 bool "Highlander" 358 bool "Highlander"
346 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 359 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
360 select SYS_SUPPORTS_PCI
347 361
348config SH_EDOSK7705 362config SH_EDOSK7705
349 bool "EDOSK7705" 363 bool "EDOSK7705"
@@ -359,12 +373,14 @@ config SH_SH4202_MICRODEV
359config SH_LANDISK 373config SH_LANDISK
360 bool "LANDISK" 374 bool "LANDISK"
361 depends on CPU_SUBTYPE_SH7751R 375 depends on CPU_SUBTYPE_SH7751R
376 select SYS_SUPPORTS_PCI
362 help 377 help
363 I-O DATA DEVICE, INC. "LANDISK Series" support. 378 I-O DATA DEVICE, INC. "LANDISK Series" support.
364 379
365config SH_TITAN 380config SH_TITAN
366 bool "TITAN" 381 bool "TITAN"
367 depends on CPU_SUBTYPE_SH7751R 382 depends on CPU_SUBTYPE_SH7751R
383 select SYS_SUPPORTS_PCI
368 help 384 help
369 Select Titan if you are configuring for a Nimble Microsystems 385 Select Titan if you are configuring for a Nimble Microsystems
370 NetEngine NP51R. 386 NetEngine NP51R.
@@ -378,6 +394,7 @@ config SH_SHMIN
378config SH_LBOX_RE2 394config SH_LBOX_RE2
379 bool "L-BOX RE2" 395 bool "L-BOX RE2"
380 depends on CPU_SUBTYPE_SH7751R 396 depends on CPU_SUBTYPE_SH7751R
397 select SYS_SUPPORTS_PCI
381 help 398 help
382 Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2. 399 Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
383 400
@@ -481,8 +498,10 @@ config SH_PCLK_FREQ
481 498
482config SH_CLK_MD 499config SH_CLK_MD
483 int "CPU Mode Pin Setting" 500 int "CPU Mode Pin Setting"
484 default 0
485 depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206 501 depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
502 default 6 if CPU_SUBTYPE_SH7206
503 default 5 if CPU_SUBTYPE_SH7619
504 default 0
486 help 505 help
487 MD2 - MD0 pin setting. 506 MD2 - MD0 pin setting.
488 507
@@ -554,6 +573,7 @@ config CRASH_DUMP
554 573
555config SMP 574config SMP
556 bool "Symmetric multi-processing support" 575 bool "Symmetric multi-processing support"
576 depends on SYS_SUPPORTS_SMP
557 ---help--- 577 ---help---
558 This enables support for systems with more than one CPU. If you have 578 This enables support for systems with more than one CPU. If you have
559 a system with only one CPU, like most personal computers, say N. If 579 a system with only one CPU, like most personal computers, say N. If
@@ -617,6 +637,7 @@ config BOOT_LINK_OFFSET
617 637
618config UBC_WAKEUP 638config UBC_WAKEUP
619 bool "Wakeup UBC on startup" 639 bool "Wakeup UBC on startup"
640 depends on CPU_SH4
620 help 641 help
621 Selecting this option will wakeup the User Break Controller (UBC) on 642 Selecting this option will wakeup the User Break Controller (UBC) on
622 startup. Although the UBC is left in an awake state when the processor 643 startup. Although the UBC is left in an awake state when the processor
@@ -645,8 +666,8 @@ menu "Bus options"
645# we're not using PCMCIA, so we make it dependent on 666# we're not using PCMCIA, so we make it dependent on
646# PCMCIA outright. -- PFM. 667# PCMCIA outright. -- PFM.
647config ISA 668config ISA
648 bool 669 def_bool y
649 default y if PCMCIA 670 depends on PCMCIA && HD6446X_SERIES
650 help 671 help
651 Find out whether you have ISA slots on your motherboard. ISA is the 672 Find out whether you have ISA slots on your motherboard. ISA is the
652 name of a bus system, i.e. the way the CPU talks to the other stuff 673 name of a bus system, i.e. the way the CPU talks to the other stuff
@@ -701,7 +722,7 @@ source "fs/Kconfig.binfmt"
701endmenu 722endmenu
702 723
703menu "Power management options (EXPERIMENTAL)" 724menu "Power management options (EXPERIMENTAL)"
704depends on EXPERIMENTAL 725depends on EXPERIMENTAL && SYS_SUPPORTS_PM
705 726
706source kernel/power/Kconfig 727source kernel/power/Kconfig
707 728
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index d849d47d6af9..52f6a99c8ecc 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -86,6 +86,7 @@ config SH_KGDB
86 bool "Include KGDB kernel debugger" 86 bool "Include KGDB kernel debugger"
87 select FRAME_POINTER 87 select FRAME_POINTER
88 select DEBUG_INFO 88 select DEBUG_INFO
89 depends on CPU_SH3 || CPU_SH4
89 help 90 help
90 Include in-kernel hooks for kgdb, the Linux kernel source level 91 Include in-kernel hooks for kgdb, the Linux kernel source level
91 debugger. See <http://kgdb.sourceforge.net/> for more information. 92 debugger. See <http://kgdb.sourceforge.net/> for more information.
diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig
index 0582ca8346b6..2e516e9a6ede 100644
--- a/arch/sh/cchips/Kconfig
+++ b/arch/sh/cchips/Kconfig
@@ -13,10 +13,8 @@ config VOYAGERGX
13 are additional GPIO bits that can be used to interface to 13 are additional GPIO bits that can be used to interface to
14 external as well. 14 external as well.
15 15
16# A board must have defined HD6446X_SERIES in order to see these
17config HD6446X_SERIES 16config HD6446X_SERIES
18 bool "HD6446x support" 17 bool
19 default n
20 18
21choice 19choice
22 prompt "HD6446x options" 20 prompt "HD6446x options"
@@ -25,7 +23,6 @@ choice
25 23
26config HD64461 24config HD64461
27 bool "Hitachi HD64461 companion chip support" 25 bool "Hitachi HD64461 companion chip support"
28 depends on CPU_SUBTYPE_SH7709
29 ---help--- 26 ---help---
30 The Hitachi HD64461 provides an interface for 27 The Hitachi HD64461 provides an interface for
31 the SH7709 CPU, supporting a LCD controller, 28 the SH7709 CPU, supporting a LCD controller,
@@ -40,7 +37,6 @@ config HD64461
40 37
41config HD64465 38config HD64465
42 bool "Hitachi HD64465 companion chip support" 39 bool "Hitachi HD64465 companion chip support"
43 depends on CPU_SUBTYPE_SH7750
44 ---help--- 40 ---help---
45 The Hitachi HD64465 provides an interface for 41 The Hitachi HD64465 provides an interface for
46 the SH7750 CPU, supporting a LCD controller, 42 the SH7750 CPU, supporting a LCD controller,
diff --git a/arch/sh/drivers/pci/Kconfig b/arch/sh/drivers/pci/Kconfig
index 6d1cbbe6745c..fbc6f2c8649f 100644
--- a/arch/sh/drivers/pci/Kconfig
+++ b/arch/sh/drivers/pci/Kconfig
@@ -1,5 +1,6 @@
1config PCI 1config PCI
2 bool "PCI support" 2 bool "PCI support"
3 depends on SYS_SUPPORTS_PCI
3 help 4 help
4 Find out whether you have a PCI motherboard. PCI is the name of a 5 Find out whether you have a PCI motherboard. PCI is the name of a
5 bus system, i.e. the way the CPU talks to the other stuff inside 6 bus system, i.e. the way the CPU talks to the other stuff inside
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 6451ad630174..9172e97dc26a 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -21,8 +21,7 @@
21#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22#include <asm/cache.h> 22#include <asm/cache.h>
23#include <asm/io.h> 23#include <asm/io.h>
24 24#include <asm/ubc.h>
25extern void detect_cpu_and_cache_system(void);
26 25
27/* 26/*
28 * Generic wrapper for command line arguments to disable on-chip 27 * Generic wrapper for command line arguments to disable on-chip
@@ -152,15 +151,6 @@ static void __init cache_init(void)
152 flags |= CCR_CACHE_CB; 151 flags |= CCR_CACHE_CB;
153#endif 152#endif
154 153
155#ifdef CONFIG_SH_OCRAM
156 /* Turn on OCRAM -- halve the OC */
157 flags |= CCR_CACHE_ORA;
158 current_cpu_data.dcache.sets >>= 1;
159
160 current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
161 current_cpu_data.dcache.linesz;
162#endif
163
164 ctrl_outl(flags, CCR); 154 ctrl_outl(flags, CCR);
165 back_to_P1(); 155 back_to_P1();
166} 156}
@@ -269,7 +259,6 @@ asmlinkage void __init sh_cpu_init(void)
269 } 259 }
270#endif 260#endif
271 261
272#ifdef CONFIG_UBC_WAKEUP
273 /* 262 /*
274 * Some brain-damaged loaders decided it would be a good idea to put 263 * Some brain-damaged loaders decided it would be a good idea to put
275 * the UBC to sleep. This causes some issues when it comes to things 264 * the UBC to sleep. This causes some issues when it comes to things
@@ -277,7 +266,5 @@ asmlinkage void __init sh_cpu_init(void)
277 * we wake it up and hope that all is well. 266 * we wake it up and hope that all is well.
278 */ 267 */
279 ubc_wakeup(); 268 ubc_wakeup();
280#endif
281
282 speculative_execution_init(); 269 speculative_execution_init();
283} 270}
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index 74765ae42929..abbf17427e52 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -9,9 +9,8 @@
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details. 10 * for more details.
11 */ 11 */
12
13
14#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/smp.h>
15#include <asm/processor.h> 14#include <asm/processor.h>
16#include <asm/cache.h> 15#include <asm/cache.h>
17 16
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 9ae3da00eaae..6334a4c54c7c 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -320,9 +320,7 @@ static void ubc_set_tracing(int asid, unsigned long pc)
320 ctrl_outl(pc, UBC_BARA); 320 ctrl_outl(pc, UBC_BARA);
321 321
322#ifdef CONFIG_MMU 322#ifdef CONFIG_MMU
323 /* We don't have any ASID settings for the SH-2! */ 323 ctrl_outb(asid, UBC_BASRA);
324 if (current_cpu_data.type != CPU_SH7604)
325 ctrl_outb(asid, UBC_BASRA);
326#endif 324#endif
327 325
328 ctrl_outl(0, UBC_BAMRA); 326 ctrl_outl(0, UBC_BAMRA);
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index b013a05fbc51..58bf6225d913 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -48,6 +48,7 @@ choice
48config CPU_SUBTYPE_SH7619 48config CPU_SUBTYPE_SH7619
49 bool "Support SH7619 processor" 49 bool "Support SH7619 processor"
50 select CPU_SH2 50 select CPU_SH2
51 select CPU_HAS_IPR_IRQ
51 52
52# SH-2A Processor Support 53# SH-2A Processor Support
53 54
@@ -208,6 +209,7 @@ config CPU_SUBTYPE_SH7722
208 select CPU_SHX2 209 select CPU_SHX2
209 select CPU_HAS_IPR_IRQ 210 select CPU_HAS_IPR_IRQ
210 select ARCH_SPARSEMEM_ENABLE 211 select ARCH_SPARSEMEM_ENABLE
212 select SYS_SUPPORTS_NUMA
211 213
212endchoice 214endchoice
213 215
@@ -292,7 +294,7 @@ config VSYSCALL
292 294
293config NUMA 295config NUMA
294 bool "Non Uniform Memory Access (NUMA) Support" 296 bool "Non Uniform Memory Access (NUMA) Support"
295 depends on MMU && SPARSEMEM && EXPERIMENTAL 297 depends on MMU && SYS_SUPPORTS_NUMA && EXPERIMENTAL
296 default n 298 default n
297 help 299 help
298 Some SH systems have many various memories scattered around 300 Some SH systems have many various memories scattered around
@@ -308,6 +310,7 @@ config NODES_SHIFT
308 310
309config ARCH_FLATMEM_ENABLE 311config ARCH_FLATMEM_ENABLE
310 def_bool y 312 def_bool y
313 depends on !NUMA
311 314
312config ARCH_SPARSEMEM_ENABLE 315config ARCH_SPARSEMEM_ENABLE
313 def_bool y 316 def_bool y
@@ -419,15 +422,4 @@ config SH_WRITETHROUGH
419 422
420 If unsure, say N. 423 If unsure, say N.
421 424
422config SH_OCRAM
423 bool "Operand Cache RAM (OCRAM) support"
424 help
425 Selecting this option will automatically tear down the number of
426 sets in the dcache by half, which in turn exposes a memory range.
427
428 The addresses for the OC RAM base will vary according to the
429 processor version. Consult vendor documentation for specifics.
430
431 If unsure, say N.
432
433endmenu 425endmenu
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 40d4e798e7fb..82b68c789a5f 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -300,6 +300,7 @@ int remove_memory(u64 start, u64 size)
300} 300}
301EXPORT_SYMBOL_GPL(remove_memory); 301EXPORT_SYMBOL_GPL(remove_memory);
302 302
303#ifdef CONFIG_NUMA
303int memory_add_physaddr_to_nid(u64 addr) 304int memory_add_physaddr_to_nid(u64 addr)
304{ 305{
305 /* Node 0 for now.. */ 306 /* Node 0 for now.. */
@@ -307,3 +308,4 @@ int memory_add_physaddr_to_nid(u64 addr)
307} 308}
308EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid); 309EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
309#endif 310#endif
311#endif
diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h
index 9a3cb6ba9d15..7a18649d1ccb 100644
--- a/include/asm-sh/cache.h
+++ b/include/asm-sh/cache.h
@@ -9,6 +9,7 @@
9#define __ASM_SH_CACHE_H 9#define __ASM_SH_CACHE_H
10#ifdef __KERNEL__ 10#ifdef __KERNEL__
11 11
12#include <linux/init.h>
12#include <asm/cpu/cache.h> 13#include <asm/cpu/cache.h>
13 14
14#define SH_CACHE_VALID 1 15#define SH_CACHE_VALID 1
@@ -48,6 +49,9 @@ struct cache_info {
48 49
49 unsigned long flags; 50 unsigned long flags;
50}; 51};
52
53int __init detect_cpu_and_cache_system(void);
54
51#endif /* __ASSEMBLY__ */ 55#endif /* __ASSEMBLY__ */
52#endif /* __KERNEL__ */ 56#endif /* __KERNEL__ */
53#endif /* __ASM_SH_CACHE_H */ 57#endif /* __ASM_SH_CACHE_H */
diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h
index 27e5c34e2659..c9050b2b5510 100644
--- a/include/asm-sh/hd64461.h
+++ b/include/asm-sh/hd64461.h
@@ -184,7 +184,7 @@
184#define HD64461_NIRR 0x15000 184#define HD64461_NIRR 0x15000
185#define HD64461_NIMR 0x15002 185#define HD64461_NIMR 0x15002
186 186
187#define HD64461_IRQBASE OFFCHIP_IRQ_BASE 187#define HD64461_IRQBASE 64
188#define HD64461_IRQ_NUM 16 188#define HD64461_IRQ_NUM 16
189 189
190#define HD64461_IRQ_UART (HD64461_IRQBASE+5) 190#define HD64461_IRQ_UART (HD64461_IRQBASE+5)
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index 1fc5eed1b22a..1a20db096196 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -228,11 +228,7 @@ static __inline__ void grab_fpu(struct pt_regs *regs)
228 regs->sr &= ~SR_FD; 228 regs->sr &= ~SR_FD;
229} 229}
230 230
231#ifdef CONFIG_CPU_SH4
232extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); 231extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
233#else
234#define save_fpu(tsk) do { } while (0)
235#endif
236 232
237#define unlazy_fpu(tsk, regs) do { \ 233#define unlazy_fpu(tsk, regs) do { \
238 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ 234 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index fb22fc3f87ad..7c75045ae22b 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -126,7 +126,7 @@ static inline void sched_cacheflush(void)
126#define smp_read_barrier_depends() do { } while(0) 126#define smp_read_barrier_depends() do { } while(0)
127#endif 127#endif
128 128
129#define set_mb(var, value) do { xchg(&var, value); } while (0) 129#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
130 130
131/* 131/*
132 * Jump to P2 area. 132 * Jump to P2 area.
diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h
index ae9bbdeefbe1..38d46e01b846 100644
--- a/include/asm-sh/ubc.h
+++ b/include/asm-sh/ubc.h
@@ -51,9 +51,14 @@
51#define BRCR_UBDE (1 << 0) 51#define BRCR_UBDE (1 << 0)
52 52
53#ifndef __ASSEMBLY__ 53#ifndef __ASSEMBLY__
54/* arch/sh/kernel/ubc.S */ 54/* arch/sh/kernel/cpu/ubc.S */
55extern void ubc_wakeup(void);
56extern void ubc_sleep(void); 55extern void ubc_sleep(void);
56
57#ifdef CONFIG_UBC_WAKEUP
58extern void ubc_wakeup(void);
59#else
60#define ubc_wakeup() do { } while (0)
61#endif
57#endif 62#endif
58 63
59#endif /* __KERNEL__ */ 64#endif /* __KERNEL__ */