diff options
-rw-r--r-- | drivers/pci/host/pci-rcar-gen2.c | 31 |
1 files changed, 28 insertions, 3 deletions
diff --git a/drivers/pci/host/pci-rcar-gen2.c b/drivers/pci/host/pci-rcar-gen2.c index 967997b2890b..fd3e3ab56509 100644 --- a/drivers/pci/host/pci-rcar-gen2.c +++ b/drivers/pci/host/pci-rcar-gen2.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/pci.h> | 18 | #include <linux/pci.h> |
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/pm_runtime.h> | 20 | #include <linux/pm_runtime.h> |
21 | #include <linux/sizes.h> | ||
21 | #include <linux/slab.h> | 22 | #include <linux/slab.h> |
22 | 23 | ||
23 | /* AHB-PCI Bridge PCI communication registers */ | 24 | /* AHB-PCI Bridge PCI communication registers */ |
@@ -98,6 +99,7 @@ struct rcar_pci_priv { | |||
98 | struct resource mem_res; | 99 | struct resource mem_res; |
99 | struct resource *cfg_res; | 100 | struct resource *cfg_res; |
100 | int irq; | 101 | int irq; |
102 | unsigned long window_size; | ||
101 | }; | 103 | }; |
102 | 104 | ||
103 | /* PCI configuration space operations */ | 105 | /* PCI configuration space operations */ |
@@ -241,10 +243,31 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys) | |||
241 | iowrite32(val, reg + RCAR_USBCTR_REG); | 243 | iowrite32(val, reg + RCAR_USBCTR_REG); |
242 | udelay(4); | 244 | udelay(4); |
243 | 245 | ||
244 | /* De-assert reset and set PCIAHB window1 size to 1GB */ | 246 | /* De-assert reset and reset PCIAHB window1 size */ |
245 | val &= ~(RCAR_USBCTR_PCIAHB_WIN1_MASK | RCAR_USBCTR_PCICLK_MASK | | 247 | val &= ~(RCAR_USBCTR_PCIAHB_WIN1_MASK | RCAR_USBCTR_PCICLK_MASK | |
246 | RCAR_USBCTR_USBH_RST | RCAR_USBCTR_PLL_RST); | 248 | RCAR_USBCTR_USBH_RST | RCAR_USBCTR_PLL_RST); |
247 | iowrite32(val | RCAR_USBCTR_PCIAHB_WIN1_1G, reg + RCAR_USBCTR_REG); | 249 | |
250 | /* Setup PCIAHB window1 size */ | ||
251 | switch (priv->window_size) { | ||
252 | case SZ_2G: | ||
253 | val |= RCAR_USBCTR_PCIAHB_WIN1_2G; | ||
254 | break; | ||
255 | case SZ_1G: | ||
256 | val |= RCAR_USBCTR_PCIAHB_WIN1_1G; | ||
257 | break; | ||
258 | case SZ_512M: | ||
259 | val |= RCAR_USBCTR_PCIAHB_WIN1_512M; | ||
260 | break; | ||
261 | default: | ||
262 | pr_warn("unknown window size %ld - defaulting to 256M\n", | ||
263 | priv->window_size); | ||
264 | priv->window_size = SZ_256M; | ||
265 | /* fall-through */ | ||
266 | case SZ_256M: | ||
267 | val |= RCAR_USBCTR_PCIAHB_WIN1_256M; | ||
268 | break; | ||
269 | } | ||
270 | iowrite32(val, reg + RCAR_USBCTR_REG); | ||
248 | 271 | ||
249 | /* Configure AHB master and slave modes */ | 272 | /* Configure AHB master and slave modes */ |
250 | iowrite32(RCAR_AHB_BUS_MODE, reg + RCAR_AHB_BUS_CTR_REG); | 273 | iowrite32(RCAR_AHB_BUS_MODE, reg + RCAR_AHB_BUS_CTR_REG); |
@@ -255,7 +278,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys) | |||
255 | RCAR_PCI_ARBITER_PCIBP_MODE; | 278 | RCAR_PCI_ARBITER_PCIBP_MODE; |
256 | iowrite32(val, reg + RCAR_PCI_ARBITER_CTR_REG); | 279 | iowrite32(val, reg + RCAR_PCI_ARBITER_CTR_REG); |
257 | 280 | ||
258 | /* PCI-AHB mapping: 0x40000000-0x80000000 */ | 281 | /* PCI-AHB mapping: 0x40000000 base */ |
259 | iowrite32(0x40000000 | RCAR_PCIAHB_PREFETCH16, | 282 | iowrite32(0x40000000 | RCAR_PCIAHB_PREFETCH16, |
260 | reg + RCAR_PCIAHB_WIN1_CTR_REG); | 283 | reg + RCAR_PCIAHB_WIN1_CTR_REG); |
261 | 284 | ||
@@ -341,6 +364,8 @@ static int rcar_pci_probe(struct platform_device *pdev) | |||
341 | return priv->irq; | 364 | return priv->irq; |
342 | } | 365 | } |
343 | 366 | ||
367 | priv->window_size = SZ_1G; | ||
368 | |||
344 | hw_private[0] = priv; | 369 | hw_private[0] = priv; |
345 | memset(&hw, 0, sizeof(hw)); | 370 | memset(&hw, 0, sizeof(hw)); |
346 | hw.nr_controllers = ARRAY_SIZE(hw_private); | 371 | hw.nr_controllers = ARRAY_SIZE(hw_private); |