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-rw-r--r--drivers/spi/spi-pxa2xx.c33
-rw-r--r--include/linux/spi/pxa2xx_spi.h18
2 files changed, 20 insertions, 31 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index a241891355db..304cf6eb50e6 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -30,6 +30,7 @@
30#include <linux/delay.h> 30#include <linux/delay.h>
31#include <linux/gpio.h> 31#include <linux/gpio.h>
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/clk.h>
33 34
34#include <asm/io.h> 35#include <asm/io.h>
35#include <asm/irq.h> 36#include <asm/irq.h>
@@ -114,6 +115,9 @@ struct driver_data {
114 u32 clear_sr; 115 u32 clear_sr;
115 u32 mask_sr; 116 u32 mask_sr;
116 117
118 /* Maximun clock rate */
119 unsigned long max_clk_rate;
120
117 /* Message Transfer pump */ 121 /* Message Transfer pump */
118 struct tasklet_struct pump_transfers; 122 struct tasklet_struct pump_transfers;
119 123
@@ -891,9 +895,12 @@ static int set_dma_burst_and_threshold(struct chip_data *chip,
891 return retval; 895 return retval;
892} 896}
893 897
894static unsigned int ssp_get_clk_div(struct ssp_device *ssp, int rate) 898static unsigned int ssp_get_clk_div(struct driver_data *drv_data, int rate)
895{ 899{
896 unsigned long ssp_clk = clk_get_rate(ssp->clk); 900 unsigned long ssp_clk = drv_data->max_clk_rate;
901 const struct ssp_device *ssp = drv_data->ssp;
902
903 rate = min_t(int, ssp_clk, rate);
897 904
898 if (ssp->type == PXA25x_SSP || ssp->type == CE4100_SSP) 905 if (ssp->type == PXA25x_SSP || ssp->type == CE4100_SSP)
899 return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8; 906 return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8;
@@ -908,7 +915,6 @@ static void pump_transfers(unsigned long data)
908 struct spi_transfer *transfer = NULL; 915 struct spi_transfer *transfer = NULL;
909 struct spi_transfer *previous = NULL; 916 struct spi_transfer *previous = NULL;
910 struct chip_data *chip = NULL; 917 struct chip_data *chip = NULL;
911 struct ssp_device *ssp = drv_data->ssp;
912 void __iomem *reg = drv_data->ioaddr; 918 void __iomem *reg = drv_data->ioaddr;
913 u32 clk_div = 0; 919 u32 clk_div = 0;
914 u8 bits = 0; 920 u8 bits = 0;
@@ -1005,7 +1011,7 @@ static void pump_transfers(unsigned long data)
1005 if (transfer->bits_per_word) 1011 if (transfer->bits_per_word)
1006 bits = transfer->bits_per_word; 1012 bits = transfer->bits_per_word;
1007 1013
1008 clk_div = ssp_get_clk_div(ssp, speed); 1014 clk_div = ssp_get_clk_div(drv_data, speed);
1009 1015
1010 if (bits <= 8) { 1016 if (bits <= 8) {
1011 drv_data->n_bytes = 1; 1017 drv_data->n_bytes = 1;
@@ -1214,7 +1220,6 @@ static int setup(struct spi_device *spi)
1214 struct pxa2xx_spi_chip *chip_info = NULL; 1220 struct pxa2xx_spi_chip *chip_info = NULL;
1215 struct chip_data *chip; 1221 struct chip_data *chip;
1216 struct driver_data *drv_data = spi_master_get_devdata(spi->master); 1222 struct driver_data *drv_data = spi_master_get_devdata(spi->master);
1217 struct ssp_device *ssp = drv_data->ssp;
1218 unsigned int clk_div; 1223 unsigned int clk_div;
1219 uint tx_thres = TX_THRESH_DFLT; 1224 uint tx_thres = TX_THRESH_DFLT;
1220 uint rx_thres = RX_THRESH_DFLT; 1225 uint rx_thres = RX_THRESH_DFLT;
@@ -1296,7 +1301,7 @@ static int setup(struct spi_device *spi)
1296 } 1301 }
1297 } 1302 }
1298 1303
1299 clk_div = ssp_get_clk_div(ssp, spi->max_speed_hz); 1304 clk_div = ssp_get_clk_div(drv_data, spi->max_speed_hz);
1300 chip->speed_hz = spi->max_speed_hz; 1305 chip->speed_hz = spi->max_speed_hz;
1301 1306
1302 chip->cr0 = clk_div 1307 chip->cr0 = clk_div
@@ -1312,12 +1317,12 @@ static int setup(struct spi_device *spi)
1312 /* NOTE: PXA25x_SSP _could_ use external clocking ... */ 1317 /* NOTE: PXA25x_SSP _could_ use external clocking ... */
1313 if (!pxa25x_ssp_comp(drv_data)) 1318 if (!pxa25x_ssp_comp(drv_data))
1314 dev_dbg(&spi->dev, "%ld Hz actual, %s\n", 1319 dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
1315 clk_get_rate(ssp->clk) 1320 drv_data->max_clk_rate
1316 / (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)), 1321 / (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)),
1317 chip->enable_dma ? "DMA" : "PIO"); 1322 chip->enable_dma ? "DMA" : "PIO");
1318 else 1323 else
1319 dev_dbg(&spi->dev, "%ld Hz actual, %s\n", 1324 dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
1320 clk_get_rate(ssp->clk) / 2 1325 drv_data->max_clk_rate / 2
1321 / (1 + ((chip->cr0 & SSCR0_SCR(0x0ff)) >> 8)), 1326 / (1 + ((chip->cr0 & SSCR0_SCR(0x0ff)) >> 8)),
1322 chip->enable_dma ? "DMA" : "PIO"); 1327 chip->enable_dma ? "DMA" : "PIO");
1323 1328
@@ -1470,7 +1475,9 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
1470 } 1475 }
1471 1476
1472 /* Enable SOC clock */ 1477 /* Enable SOC clock */
1473 clk_enable(ssp->clk); 1478 clk_prepare_enable(ssp->clk);
1479
1480 drv_data->max_clk_rate = clk_get_rate(ssp->clk);
1474 1481
1475 /* Load default SSP configuration */ 1482 /* Load default SSP configuration */
1476 write_SSCR0(0, drv_data->ioaddr); 1483 write_SSCR0(0, drv_data->ioaddr);
@@ -1499,7 +1506,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
1499 return status; 1506 return status;
1500 1507
1501out_error_clock_enabled: 1508out_error_clock_enabled:
1502 clk_disable(ssp->clk); 1509 clk_disable_unprepare(ssp->clk);
1503 1510
1504out_error_dma_alloc: 1511out_error_dma_alloc:
1505 if (drv_data->tx_channel != -1) 1512 if (drv_data->tx_channel != -1)
@@ -1527,7 +1534,7 @@ static int pxa2xx_spi_remove(struct platform_device *pdev)
1527 1534
1528 /* Disable the SSP at the peripheral and SOC level */ 1535 /* Disable the SSP at the peripheral and SOC level */
1529 write_SSCR0(0, drv_data->ioaddr); 1536 write_SSCR0(0, drv_data->ioaddr);
1530 clk_disable(ssp->clk); 1537 clk_disable_unprepare(ssp->clk);
1531 1538
1532 /* Release DMA */ 1539 /* Release DMA */
1533 if (drv_data->master_info->enable_dma) { 1540 if (drv_data->master_info->enable_dma) {
@@ -1571,7 +1578,7 @@ static int pxa2xx_spi_suspend(struct device *dev)
1571 if (status != 0) 1578 if (status != 0)
1572 return status; 1579 return status;
1573 write_SSCR0(0, drv_data->ioaddr); 1580 write_SSCR0(0, drv_data->ioaddr);
1574 clk_disable(ssp->clk); 1581 clk_disable_unprepare(ssp->clk);
1575 1582
1576 return 0; 1583 return 0;
1577} 1584}
@@ -1590,7 +1597,7 @@ static int pxa2xx_spi_resume(struct device *dev)
1590 DRCMR_MAPVLD | drv_data->tx_channel; 1597 DRCMR_MAPVLD | drv_data->tx_channel;
1591 1598
1592 /* Enable the SSP clock */ 1599 /* Enable the SSP clock */
1593 clk_enable(ssp->clk); 1600 clk_prepare_enable(ssp->clk);
1594 1601
1595 /* Start the queue running */ 1602 /* Start the queue running */
1596 status = spi_master_resume(drv_data->master); 1603 status = spi_master_resume(drv_data->master);
diff --git a/include/linux/spi/pxa2xx_spi.h b/include/linux/spi/pxa2xx_spi.h
index 6b99f09b717d..053b5ba51b25 100644
--- a/include/linux/spi/pxa2xx_spi.h
+++ b/include/linux/spi/pxa2xx_spi.h
@@ -133,23 +133,5 @@ static inline void pxa_free_dma(int dma_ch)
133{ 133{
134} 134}
135 135
136/*
137 * The CE4100 does not have the clk framework implemented and SPI clock can
138 * not be switched on/off or the divider changed.
139 */
140static inline void clk_disable(struct clk *clk)
141{
142}
143
144static inline int clk_enable(struct clk *clk)
145{
146 return 0;
147}
148
149static inline unsigned long clk_get_rate(struct clk *clk)
150{
151 return 3686400;
152}
153
154#endif 136#endif
155#endif 137#endif