diff options
| -rw-r--r-- | arch/arm/mach-exynos/exynos.c | 39 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/map.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/pm.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/regs-sys.h | 22 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/suspend.c | 7 |
5 files changed, 4 insertions, 70 deletions
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index c13d0837fa8c..2c844393cc4b 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c | |||
| @@ -27,20 +27,16 @@ | |||
| 27 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
| 28 | #include <asm/memory.h> | 28 | #include <asm/memory.h> |
| 29 | 29 | ||
| 30 | #include <mach/map.h> | ||
| 31 | |||
| 30 | #include "common.h" | 32 | #include "common.h" |
| 31 | #include "mfc.h" | 33 | #include "mfc.h" |
| 32 | #include "regs-pmu.h" | 34 | #include "regs-pmu.h" |
| 33 | #include "regs-sys.h" | ||
| 34 | 35 | ||
| 35 | void __iomem *pmu_base_addr; | 36 | void __iomem *pmu_base_addr; |
| 36 | 37 | ||
| 37 | static struct map_desc exynos4_iodesc[] __initdata = { | 38 | static struct map_desc exynos4_iodesc[] __initdata = { |
| 38 | { | 39 | { |
| 39 | .virtual = (unsigned long)S3C_VA_SYS, | ||
| 40 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON), | ||
| 41 | .length = SZ_64K, | ||
| 42 | .type = MT_DEVICE, | ||
| 43 | }, { | ||
| 44 | .virtual = (unsigned long)S5P_VA_SROMC, | 40 | .virtual = (unsigned long)S5P_VA_SROMC, |
| 45 | .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), | 41 | .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), |
| 46 | .length = SZ_4K, | 42 | .length = SZ_4K, |
| @@ -70,11 +66,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { | |||
| 70 | 66 | ||
| 71 | static struct map_desc exynos5_iodesc[] __initdata = { | 67 | static struct map_desc exynos5_iodesc[] __initdata = { |
| 72 | { | 68 | { |
| 73 | .virtual = (unsigned long)S3C_VA_SYS, | ||
| 74 | .pfn = __phys_to_pfn(EXYNOS5_PA_SYSCON), | ||
| 75 | .length = SZ_64K, | ||
| 76 | .type = MT_DEVICE, | ||
| 77 | }, { | ||
| 78 | .virtual = (unsigned long)S5P_VA_SROMC, | 69 | .virtual = (unsigned long)S5P_VA_SROMC, |
| 79 | .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC), | 70 | .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC), |
| 80 | .length = SZ_4K, | 71 | .length = SZ_4K, |
| @@ -213,32 +204,6 @@ static void __init exynos_init_irq(void) | |||
| 213 | 204 | ||
| 214 | static void __init exynos_dt_machine_init(void) | 205 | static void __init exynos_dt_machine_init(void) |
| 215 | { | 206 | { |
| 216 | struct device_node *i2c_np; | ||
| 217 | const char *i2c_compat = "samsung,s3c2440-i2c"; | ||
| 218 | unsigned int tmp; | ||
| 219 | int id; | ||
| 220 | |||
| 221 | /* | ||
| 222 | * Exynos5's legacy i2c controller and new high speed i2c | ||
| 223 | * controller have muxed interrupt sources. By default the | ||
| 224 | * interrupts for 4-channel HS-I2C controller are enabled. | ||
| 225 | * If node for first four channels of legacy i2c controller | ||
| 226 | * are available then re-configure the interrupts via the | ||
| 227 | * system register. | ||
| 228 | */ | ||
| 229 | if (soc_is_exynos5()) { | ||
| 230 | for_each_compatible_node(i2c_np, NULL, i2c_compat) { | ||
| 231 | if (of_device_is_available(i2c_np)) { | ||
| 232 | id = of_alias_get_id(i2c_np, "i2c"); | ||
| 233 | if (id < 4) { | ||
| 234 | tmp = readl(EXYNOS5_SYS_I2C_CFG); | ||
| 235 | writel(tmp & ~(0x1 << id), | ||
| 236 | EXYNOS5_SYS_I2C_CFG); | ||
| 237 | } | ||
| 238 | } | ||
| 239 | } | ||
| 240 | } | ||
| 241 | |||
| 242 | /* | 207 | /* |
| 243 | * This is called from smp_prepare_cpus if we've built for SMP, but | 208 | * This is called from smp_prepare_cpus if we've built for SMP, but |
| 244 | * we still need to set it up for PM and firmware ops if not. | 209 | * we still need to set it up for PM and firmware ops if not. |
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 1ad3f496ef56..de3ae59e1cfb 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h | |||
| @@ -24,9 +24,6 @@ | |||
| 24 | 24 | ||
| 25 | #define EXYNOS_PA_CHIPID 0x10000000 | 25 | #define EXYNOS_PA_CHIPID 0x10000000 |
| 26 | 26 | ||
| 27 | #define EXYNOS4_PA_SYSCON 0x10010000 | ||
| 28 | #define EXYNOS5_PA_SYSCON 0x10050100 | ||
| 29 | |||
| 30 | #define EXYNOS4_PA_CMU 0x10030000 | 27 | #define EXYNOS4_PA_CMU 0x10030000 |
| 31 | #define EXYNOS5_PA_CMU 0x10010000 | 28 | #define EXYNOS5_PA_CMU 0x10010000 |
| 32 | 29 | ||
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 86f3ecd88f78..dfc8594e5b1f 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c | |||
| @@ -23,12 +23,13 @@ | |||
| 23 | #include <asm/smp_scu.h> | 23 | #include <asm/smp_scu.h> |
| 24 | #include <asm/suspend.h> | 24 | #include <asm/suspend.h> |
| 25 | 25 | ||
| 26 | #include <mach/map.h> | ||
| 27 | |||
| 26 | #include <plat/pm-common.h> | 28 | #include <plat/pm-common.h> |
| 27 | 29 | ||
| 28 | #include "common.h" | 30 | #include "common.h" |
| 29 | #include "exynos-pmu.h" | 31 | #include "exynos-pmu.h" |
| 30 | #include "regs-pmu.h" | 32 | #include "regs-pmu.h" |
| 31 | #include "regs-sys.h" | ||
| 32 | 33 | ||
| 33 | static inline void __iomem *exynos_boot_vector_addr(void) | 34 | static inline void __iomem *exynos_boot_vector_addr(void) |
| 34 | { | 35 | { |
diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h deleted file mode 100644 index 84332b0dd7a6..000000000000 --- a/arch/arm/mach-exynos/regs-sys.h +++ /dev/null | |||
| @@ -1,22 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2014 Samsung Electronics Co., Ltd. | ||
| 3 | * http://www.samsung.com | ||
| 4 | * | ||
| 5 | * EXYNOS - system register definition | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef __ASM_ARCH_REGS_SYS_H | ||
| 13 | #define __ASM_ARCH_REGS_SYS_H __FILE__ | ||
| 14 | |||
| 15 | #include <mach/map.h> | ||
| 16 | |||
| 17 | #define S5P_SYSREG(x) (S3C_VA_SYS + (x)) | ||
| 18 | |||
| 19 | /* For EXYNOS5 */ | ||
| 20 | #define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234) | ||
| 21 | |||
| 22 | #endif /* __ASM_ARCH_REGS_SYS_H */ | ||
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c index f8e7dcd17055..342797b9bf3b 100644 --- a/arch/arm/mach-exynos/suspend.c +++ b/arch/arm/mach-exynos/suspend.c | |||
| @@ -34,7 +34,6 @@ | |||
| 34 | 34 | ||
| 35 | #include "common.h" | 35 | #include "common.h" |
| 36 | #include "regs-pmu.h" | 36 | #include "regs-pmu.h" |
| 37 | #include "regs-sys.h" | ||
| 38 | #include "exynos-pmu.h" | 37 | #include "exynos-pmu.h" |
| 39 | 38 | ||
| 40 | #define S5P_CHECK_SLEEP 0x00000BAD | 39 | #define S5P_CHECK_SLEEP 0x00000BAD |
| @@ -53,10 +52,6 @@ struct exynos_wkup_irq { | |||
| 53 | u32 mask; | 52 | u32 mask; |
| 54 | }; | 53 | }; |
| 55 | 54 | ||
| 56 | static struct sleep_save exynos5_sys_save[] = { | ||
| 57 | SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), | ||
| 58 | }; | ||
| 59 | |||
| 60 | static struct sleep_save exynos_core_save[] = { | 55 | static struct sleep_save exynos_core_save[] = { |
| 61 | /* SROM side */ | 56 | /* SROM side */ |
| 62 | SAVE_ITEM(S5P_SROM_BW), | 57 | SAVE_ITEM(S5P_SROM_BW), |
| @@ -497,8 +492,6 @@ static const struct exynos_pm_data exynos5250_pm_data = { | |||
| 497 | .wkup_irq = exynos5250_wkup_irq, | 492 | .wkup_irq = exynos5250_wkup_irq, |
| 498 | .wake_disable_mask = ((0xFF << 8) | (0x1F << 1)), | 493 | .wake_disable_mask = ((0xFF << 8) | (0x1F << 1)), |
| 499 | .release_ret_regs = exynos_release_ret_regs, | 494 | .release_ret_regs = exynos_release_ret_regs, |
| 500 | .extra_save = exynos5_sys_save, | ||
| 501 | .num_extra_save = ARRAY_SIZE(exynos5_sys_save), | ||
| 502 | .pm_suspend = exynos_pm_suspend, | 495 | .pm_suspend = exynos_pm_suspend, |
| 503 | .pm_resume = exynos_pm_resume, | 496 | .pm_resume = exynos_pm_resume, |
| 504 | .pm_prepare = exynos_pm_prepare, | 497 | .pm_prepare = exynos_pm_prepare, |
