3 files changed, 3 insertions, 14 deletions

diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 64b0d11ddc49..b3f3284bf6ba 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -74,19 +74,6 @@ struct omap_uart_state {
 static LIST_HEAD(uart_list);
 static u8 num_uarts;
 
-/*
- * Internal UARTs need to be initialized for the 8250 autoconfig to work
- * properly. Note that the TX watermark initialization may not be needed
- * once the 8250.c watermark handling code is merged.
- */
-
-static inline void __init omap_uart_reset(struct omap_uart_state *uart)
-{
-        serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
-        serial_write_reg(uart, UART_OMAP_SCR, 0x08);
-        serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
-}
-
 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 
 /*
@@ -521,7 +508,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
 
         omap_device_enable(uart->pdev);
         omap_uart_idle_init(uart);
-        omap_uart_reset(uart);
         omap_hwmod_enable_wakeup(uart->oh);
         omap_device_idle(uart->pdev);
 
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 70e7738dd3a0..5b913c71cd7f 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -33,6 +33,8 @@
 
 #define OMAP_MODE13X_SPEED      230400
 
+#define OMAP_UART_SCR_TX_EMPTY  0x08
+
 /* WER = 0x7F
  * Enable module level wakeup in WER reg
  */
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 5327ff0b008e..f5a5ed676825 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -770,6 +770,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
         serial_out(up, UART_IER, up->ier);
         serial_out(up, UART_LCR, cval);         /* reset DLAB */
         up->lcr = cval;
+        up->scr = OMAP_UART_SCR_TX_EMPTY;
 
         /* FIFOs and DMA Settings */