3 files changed, 42 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi
index c2554219f7a4..3c5fa3388997 100644
--- a/arch/arm/boot/dts/at91sam9x25.dtsi
+++ b/arch/arm/boot/dts/at91sam9x25.dtsi
@@ -10,6 +10,7 @@
 #include "at91sam9x5_usart3.dtsi"
 #include "at91sam9x5_macb0.dtsi"
 #include "at91sam9x5_macb1.dtsi"
+#include "at91sam9x5_can.dtsi"
 
 / {
         model = "Atmel AT91SAM9X25 SoC";
diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi
index 8eac66ce0ab7..499cdc81f4c0 100644
--- a/arch/arm/boot/dts/at91sam9x35.dtsi
+++ b/arch/arm/boot/dts/at91sam9x35.dtsi
@@ -8,6 +8,7 @@
 
 #include "at91sam9x5.dtsi"
 #include "at91sam9x5_macb0.dtsi"
+#include "at91sam9x5_can.dtsi"
 
 / {
         model = "Atmel AT91SAM9X35 SoC";
diff --git a/arch/arm/boot/dts/at91sam9x5_can.dtsi b/arch/arm/boot/dts/at91sam9x5_can.dtsi
index ebe4147529bb..8eb2f9c1b978 100644
--- a/arch/arm/boot/dts/at91sam9x5_can.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_can.dtsi
@@ -26,6 +26,46 @@
                                         };
                                 };
                         };
+
+                        can0: can@f8000000 {
+                                compatible = "atmel,at91sam9x5-can";
+                                reg = <0xf8000000 0x300>;
+                                interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_can0_rx_tx>;
+                                clocks = <&can0_clk>;
+                                clock-names = "can_clk";
+                                status = "disabled";
+                        };
+
+                        can1: can@f8004000 {
+                                compatible = "atmel,at91sam9x5-can";
+                                reg = <0xf8004000 0x300>;
+                                interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_can1_rx_tx>;
+                                clocks = <&can1_clk>;
+                                clock-names = "can_clk";
+                                status = "disabled";
+                        };
+
+                        pinctrl@fffff400 {
+                                can0 {
+                                        pinctrl_can0_rx_tx: can0_rx_tx {
+                                                atmel,pins =
+                                                        <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* CANRX0, conflicts with DRXD */
+                                                        AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* CANTX0, conflicts with DTXD */
+                                        };
+                                };
+
+                                can1 {
+                                        pinctrl_can1_rx_tx: can1_rx_tx {
+                                                atmel,pins =
+                                                        <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE    /* CANRX1, conflicts with RXD1 */
+                                                        AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;   /* CANTX1, conflicts with TXD1 */
+                                        };
+                                };
+                        };
                 };
         };
 };