2 files changed, 116 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 8e73b67fd628..d1759bf5202f 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -653,4 +653,112 @@
                 samsung,sysreg = <&sys_reg>;
                 status = "disabled";
         };
+
+        ppmu_dmc0: ppmu_dmc0@106a0000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x106a0000 0x2000>;
+                clocks = <&clock CLK_PPMUDMC0>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_dmc1: ppmu_dmc1@106b0000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x106b0000 0x2000>;
+                clocks = <&clock CLK_PPMUDMC1>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_cpu: ppmu_cpu@106c0000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x106c0000 0x2000>;
+                clocks = <&clock CLK_PPMUCPU>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_acp: ppmu_acp@10ae0000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x106e0000 0x2000>;
+                status = "disabled";
+        };
+
+        ppmu_rightbus: ppmu_rightbus@112a0000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x112a0000 0x2000>;
+                clocks = <&clock CLK_PPMURIGHT>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_leftbus: ppmu_leftbus0@116a0000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x116a0000 0x2000>;
+                clocks = <&clock CLK_PPMULEFT>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_camif: ppmu_camif@11ac0000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x11ac0000 0x2000>;
+                clocks = <&clock CLK_PPMUCAMIF>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_lcd0: ppmu_lcd0@11e40000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x11e40000 0x2000>;
+                clocks = <&clock CLK_PPMULCD0>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_fsys: ppmu_g3d@12630000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x12630000 0x2000>;
+                status = "disabled";
+        };
+
+        ppmu_image: ppmu_image@12aa0000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x12aa0000 0x2000>;
+                clocks = <&clock CLK_PPMUIMAGE>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_tv: ppmu_tv@12e40000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x12e40000 0x2000>;
+                clocks = <&clock CLK_PPMUTV>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_g3d: ppmu_g3d@13220000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x13220000 0x2000>;
+                clocks = <&clock CLK_PPMUG3D>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_mfc_left: ppmu_mfc_left@13660000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x13660000 0x2000>;
+                clocks = <&clock CLK_PPMUMFC_L>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
+
+        ppmu_mfc_right: ppmu_mfc_right@13670000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x13670000 0x2000>;
+                clocks = <&clock CLK_PPMUMFC_R>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 6728aaa2af9d..7c15880bc8ba 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -193,4 +193,12 @@
                         samsung,lcd-wb;
                 };
         };
+
+        ppmu_lcd1: ppmu_lcd1@12240000 {
+                compatible = "samsung,exynos-ppmu";
+                reg = <0x12240000 0x2000>;
+                clocks = <&clock CLK_PPMULCD1>;
+                clock-names = "ppmu";
+                status = "disabled";
+        };
 };