aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 075eb894648f..ad6c2d4520ae 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -3659,6 +3659,21 @@ int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, b
3659 break; 3659 break;
3660 } 3660 }
3661 3661
3662 /* Dell Latitude D620 reports a too-high value for the dual-link
3663 * transition freq, causing us to program the panel incorrectly.
3664 *
3665 * It doesn't appear the VBIOS actually uses its transition freq
3666 * (90000kHz), instead it uses the "Number of LVDS channels" field
3667 * out of the panel ID structure (http://www.spwg.org/).
3668 *
3669 * For the moment, a quirk will do :)
3670 */
3671 if ((dev->pdev->device == 0x01d7) &&
3672 (dev->pdev->subsystem_vendor == 0x1028) &&
3673 (dev->pdev->subsystem_device == 0x01c2)) {
3674 bios->fp.duallink_transition_clk = 80000;
3675 }
3676
3662 /* set dual_link flag for EDID case */ 3677 /* set dual_link flag for EDID case */
3663 if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) 3678 if (pxclk && (chip_version < 0x25 || chip_version > 0x28))
3664 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); 3679 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);