diff options
-rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 09df74b8e917..424e62197787 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c | |||
@@ -1134,6 +1134,12 @@ static int gen8_init_common_ring(struct intel_engine_cs *ring) | |||
1134 | I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask)); | 1134 | I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask)); |
1135 | I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff); | 1135 | I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff); |
1136 | 1136 | ||
1137 | if (ring->status_page.obj) { | ||
1138 | I915_WRITE(RING_HWS_PGA(ring->mmio_base), | ||
1139 | (u32)ring->status_page.gfx_addr); | ||
1140 | POSTING_READ(RING_HWS_PGA(ring->mmio_base)); | ||
1141 | } | ||
1142 | |||
1137 | I915_WRITE(RING_MODE_GEN7(ring), | 1143 | I915_WRITE(RING_MODE_GEN7(ring), |
1138 | _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) | | 1144 | _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) | |
1139 | _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE)); | 1145 | _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE)); |