106 files changed, 269 insertions, 204 deletions
diff --git a/CREDITS b/CREDITS
index 646a0a9ad6d1..9416a9a8b95e 100644
--- a/CREDITS
+++ b/CREDITS
@@ -637,14 +637,13 @@ S: 14509 NE 39th Street #1096
 S: Bellevue, Washington 98007
 S: USA
-N: Christopher L. Cheney
+N: Chris Cheney
-E: ccheney@debian.org
+E: chris.cheney@gmail.com
-E: ccheney@cheney.cx
+E: ccheney@redhat.com
-W: http://www.cheney.cx
 P: 1024D/8E384AF2 2D31 1927 87D7 1F24 9FF9  1BC5 D106 5AB3 8E38 4AF2
 D: Vista Imaging usb webcam driver
-S: 314 Prince of Wales
+S: 2308 Therrell Way
-S: Conroe, TX 77304
+S: McKinney, TX 75070
 S: USA
 N: Stuart Cheshire
diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX
index 0c4cc688e89a..38f8444bdd0e 100644
--- a/Documentation/00-INDEX
+++ b/Documentation/00-INDEX
@@ -40,7 +40,7 @@ IPMI.txt
 IRQ-affinity.txt
        - how to select which CPU(s) handle which interrupt events on SMP.

diff --git a/CREDITS b/CREDITS index 646a0a9ad6d1..9416a9a8b95e 100644 --- a/CREDITS +++ b/CREDITS
@@ -637,14 +637,13 @@ S: 14509 NE 39th Street #1096
637	S: Bellevue, Washington 98007	637	S: Bellevue, Washington 98007
638	S: USA	638	S: USA
639		639
640	N: Christopher L. Cheney	640	N: Chris Cheney
641	E: ccheney@debian.org	641	E: chris.cheney@gmail.com
642	E: ccheney@cheney.cx	642	E: ccheney@redhat.com
643	W: http://www.cheney.cx
644	P: 1024D/8E384AF2 2D31 1927 87D7 1F24 9FF9 1BC5 D106 5AB3 8E38 4AF2	643	P: 1024D/8E384AF2 2D31 1927 87D7 1F24 9FF9 1BC5 D106 5AB3 8E38 4AF2
645	D: Vista Imaging usb webcam driver	644	D: Vista Imaging usb webcam driver
646	S: 314 Prince of Wales	645	S: 2308 Therrell Way
647	S: Conroe, TX 77304	646	S: McKinney, TX 75070
648	S: USA	647	S: USA
649		648
650	N: Stuart Cheshire	649	N: Stuart Cheshire


diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX index 0c4cc688e89a..38f8444bdd0e 100644 --- a/Documentation/00-INDEX +++ b/Documentation/00-INDEX
@@ -40,7 +40,7 @@ IPMI.txt
40	IRQ-affinity.txt	40	IRQ-affinity.txt
41	- how to select which CPU(s) handle which interrupt events on SMP.	41	- how to select which CPU(s) handle which interrupt events on SMP.